8-Bit Registers
CY54/74FCT374T
CY54/74FCT574T
SCCS022 - May 1994 - Revised February 2000
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
Copyright
©
2000, Texas Instruments Incorporated
Features
· Function, pinout, and drive compatible with FCT and
F logic
· FCT-C speed at 5.2 ns max. (Com'l)
FCT-A speed at 6.5 ns max. (Com'l)
· Reduced V
OH
(typically = 3.3V) versions of equivalent
FCT functions
· Edge-rate control circuitry for significantly improved
noise characteristics
· Power-off disable feature
· Matched rise and fall times
· Fully compatible with TTL input and output logic levels
· ESD > 2000V
· Extended commercial range of
-
40°C to +85°C
· Sink Current
64 mA (Com'l), 32 mA (Mil)
Source Current
32 mA (Com'l), 12 mA (Mil)
· Edge-triggered D-type inputs
· 250 MHz typical toggle rate
1CY54/74FCT574T
Logic Block Diagram
Pin Configurations
FCT374T1
4
8
9
10
11
12
7 6 5
1516 17 18
3
2
1
20
13
14
19
D
3
D
2
O
1
D
6
D
5
D
7
CP
V
CC
GND
O
5
Top View
D
1
LCC
OE
O
0
D
0
O
3
D
4
O
4
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
13
14
V
CC
FCT374T2
15
DIP/SOIC/QSOP
Top View
O
6
O
2
O
7
O
0
D
0
D
1
O
2
D
2
D
3
O
3
D
7
D
6
O
6
O
5
D
5
D
4
O
4
CP
OE
GND
O
7
O
1
FCT374T3
4
8
9
10
11
12
7 6 5
1516 17 18
3
2
1
20
13
14
19
D
6
D
5
D
3
O
2
O
5
O
1
CP
V
CC
GND
O
4
Top View
D
2
LCC
OE
D
0
D
1
D
7
O
6
O
7
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
13
14
V
CC
FCT374T4
15
DIP/SOIC/QSOP
Top View
O
3
D
4
O
0
D
0
D
1
D
2
D
4
D
5
D
6
D
7
O
1
O
2
O
3
O
4
O
5
O
6
O
7
CP
OE
GND
O
0
D
3
FCT374T
FCT374T5
CP
OE
D
0
O
0
D
1
O
1
D
2
O
2
D
3
O
3
D
4
O
4
D
5
O
5
D
6
O
6
D
7
O
7
FCT374T6
CP
D
O
0
D
0
CP
OE
CP
D
O
1
D
1
CP
D
O
2
D
2
CP
D
O
3
D
3
CP
D
O
4
D
4
CP
D
O
5
D
5
CP
D
O
6
D
6
CP
D
O
7
D
7
Q
Q
Q
Q
Q
Q
Q
Q
Logic Symbol
FCT374T
FCT574T
FCT574T
CY54/74FCT374T
CY54/74FCT574T
2
Functional Description
The FCT374T and FCT574T are high-speed low-power octal
D-type flip-flops featuring separate D-type inputs for each
flip-flop. Both devices have three-state outputs for bus oriented
applications. A buffered clock (CP) and output enable (OE) are
common to all flip-flops. The FCT574T is identical to FCT374T
except for flow-through pinout to simplify board design. The
eight flip-flops contained in the FCT374T and FCT574T will
store the state of their individual D inputs that meet the set-up
and hold time requirements on the LOW-to-HIGH clock (CP)
transition. When OE is LOW, the contents of the eight flip-flops
are available at the outputs. When OE is HIGH, the outputs will
be in the high-impedance state. The state of output enable
does not affect the state of the flip-flops.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Maximum Ratings
[2, 3]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................. -65
°
C to +150
°
C
Ambient Temperature with
Power Applied............................................. 65
°
C to +135
°
C
Supply Voltage to Ground Potential ............... 0.5V to +7.0V
DC Input Voltage ........................................... 0.5V to +7.0V
DC Output Voltage......................................... 0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ...... 120 mA
Power Dissipation .......................................................... 0.5W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Function Table
[1]
Inputs
Outputs
D
CP
OE
O
H
L
H
L
L
L
X
X
H
Z
Operating Range
Range
Range
Ambient
Temperature
V
CC
Commercial
T, AT, CT
40
°
C to +85
°
C
5V
±
5%
Military
[4]
All
55
°
C to +125
°
C
5V
±
10%
Electrical Characteristics
Over the Operating Range
Parameter
Description
Test Conditions
Min.
Typ.
[5]
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
=Min., I
OH
=32 mA
Com'l
2.0
V
V
CC
=Min., I
OH
=15 mA
Com'l
2.4
3.3
V
V
CC
=Min., I
OH
=12 mA
Mil
2.4
3.3
V
V
OL
Output LOW Voltage
V
CC
=Min., I
OL
=64 mA
Com'l
0.3
0.55
V
V
CC
=Min., I
OL
=32 mA
Mil
0.3
0.55
V
V
IH
Input HIGH Voltage
2.0
V
V
IL
Input LOW Voltage
0.8
V
V
H
Hysteresis
[6]
All inputs
0.2
V
V
IK
Input Clamp Diode Voltage
V
CC
=Min., I
IN
=18 mA
0.7
1.2
V
I
I
Input HIGH Current
V
CC
=Max., V
IN
=V
CC
5
µ
A
I
IH
Input HIGH Current
V
CC
=Max., V
IN
=2.7V
±
1
µ
A
I
IL
Input LOW Current
V
CC
=Max., V
IN
=0.5V
±
1
µ
A
I
OZH
Off State HIGH-Level Output
Current
V
CC
= Max., V
OUT
= 2.7V
10
µ
A
I
OZL
Off State LOW-Level
Output Current
V
CC
= Max., V
OUT
= 0.5V
10
µ
A
I
OS
Output Short Circuit Current
[7]
V
CC
=Max., V
OUT
=0.0V
60
120
225
mA
I
OFF
Power-Off Disable
V
CC
=0V, V
OUT
=4.5V
±
1
µ
A
Notes:
1.
H = HIGH Voltage Level. L = LOW Voltage Level X = Don't Care Z = HIGH Impedance = LOW-to-HIGH clock transition
2.
Unless otherwise noted, these limits are over the operating free-air temperature range.
3.
Unused inputs must always be connected to an appropriate logic voltage level, preferably either V
CC
or ground.
4.
T
A
is the "instant on" case temperature.
5.
Typical values are at V
CC
=5.0V, T
A
=+25°C ambient.
6.
This parameter is specified but not tested.
7.
Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameters tests. In any sequence of parameter
tests, I
OS
tests should be performed last.
CY54/74FCT374T
CY54/74FCT574T
3
Capacitance
[2]
Parameter
Description
Typ.
[5]
Max.
Unit
C
IN
Input Capacitance
5
10
pF
C
OUT
Output Capacitance
9
12
pF
Power Supply Characteristics
Parameter
Description
Test Conditions
Typ.
[5]
Max.
Unit
I
CC
Quiescent Power Supply Current
V
CC
=Max., V
IN
0.2V, V
IN
V
CC
0.2V
0.1
0.2
mA
I
CC
Quiescent Power Supply Current
(TTL inputs HIGH)
V
CC
=Max., V
IN
=3.4V,
[8]
f
1
=0, Outputs Open
0.5
2.0
mA
I
CCD
Dynamic Power Supply Current
[9]
V
CC
=Max., One Bit Toggling,
50% Duty Cycle, Outputs Open,
OE=GND, V
IN
0.2V or V
IN
V
CC
0.2V
0.06
0.12
mA/MHz
I
C
Total Power Supply Current
[10]
V
CC
=Max., f
0
=10 MHz,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f
1
=5 MHz,
OE=GND, V
IN
0.2V or V
IN
V
CC
0.2V
0.7
1.4
mA
V
CC
=Max., f
0
=10 MHz,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f
1
=5 MHz,
OE=GND, V
IN
=3.4V or V
IN
=GND
1.2
3.4
mA
V
CC
=Max., f
0
=10 MHz,
50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f
1
=2.5 MHz,
OE=GND, V
IN
0.2V or V
IN
V
CC
0.2V
1.6
3.2
[11]
mA
V
CC
=Max., f
0
=10 MHz,
50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f
1
=2.5 MHz,
OE=GND, V
IN
=3.4V or V
IN
=GND
3.9
12.2
[11]
mA
Notes:
8.
Per TTL driven input (V
IN
=3.4V); all other inputs at V
CC
or GND.
9.
This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. I
C
=
I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
=
I
CC
+
I
CC
D
H
N
T
+I
CCD
(f
0
/2 + f
1
N
1
)
I
CC
=
Quiescent Current with CMOS input levels
I
CC
=
Power Supply Current for a TTL HIGH input (V
IN
=3.4V)
D
H
=
Duty Cycle for TTL inputs HIGH
N
T
=
Number of TTL inputs at D
H
I
CCD
=
Dynamic Current caused by an input transition pair (HLH or LHL)
f
0
=
Clock frequency for registered devices, otherwise zero
f
1
=
Input signal frequency
N
1
=
Number of inputs changing at f
1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the I
CC
formula. These limits are specified but not tested.
CY54/74FCT374T
CY54/74FCT574T
4
Switching Characteristics
[12]
Over the Operating Range
Parameter
Description
FCT374T/FCT574T
FCT374AT/FCT574AT
Unit
Fig.
No.
[13]
Military
Commercial
Military
Commercial
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay
Clock to Output
2.0
11.0
2.0
10.0
2.0
7.2
2.0
6.5
ns
1, 5
t
PZH
t
PZL
Output Enable Time
1.5
14.0
1.5
12.5
1.5
7.5
1.5
6.5
ns
1, 7, 8
t
PHZ
t
PLZ
Output Disable
Time
1.5
8.0
1.5
8.0
1.5
6.5
1.5
5.5
ns
1, 7, 8
t
S
SetUp Time
HIGH or LOW
D to CP
2.0
2.0
2.0
2.0
ns
4
t
H
Hold Time
HIGH or LOW
D to CP
1.5
1.5
1.5
1.5
ns
4
t
W
Clock Pulse
Width
[14]
HIGH or
LOW
7.0
7.0
6.0
5.0
ns
5
Parameter
Description
FCT374CT/FCT574CT
Unit
Fig.
No.
[13]
Military
Commercial
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay Clock to Output
2.0
6.2
2.0
5.2
ns
1, 5
t
PZH
t
PZL
Output Enable Time
1.5
6.2
1.5
5.5
ns
1, 7, 8
t
PHZ
t
PLZ
Output Disable Time
1.5
5.7
1.5
5.0
ns
1, 7, 8
t
S
Set-Up Time, HIGH or LOW D to CP
2.0
2.0
ns
4
t
H
Hold Time, HIGH or LOW D to CP
1.5
1.5
ns
4
t
W
Clock Pulse Width
[14]
HIGH or LOW
6.0
5.0
ns
5
Notes:
12. Minimum limits are specified but not tested on Propagation Delays.
13. See "Parameter Measurement Information" in the General Information section.
14. With one data channel toggling, t
W
(L)=t
W
(H)=4.0 ns and t
r
=t
f
=1.0 ns.
CY54/74FCT374T
CY54/74FCT574T
5
Ordering Information--FCT374T
Speed
(ns)
Ordering Code
Package
Name
Package Type
Operating
Range
5.2
CY74FCT374CTQCT
Q5
20-Lead (150-Mil) QSOP
Commercial
CY74FCT374CTSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
6.2
CY54FCT374CTDMB
D6
20-Lead (300-Mil) CerDIP
Military
CY54FCT374CTLMB
L61
20-Pin Square Leadless Chip Carrier
6.5
CY74FCT374ATPC
P5
20-Lead (300-Mil) Molded DIP
Commercial
CY74FCT374ATQCT
Q5
20-Lead (150-Mil) QSOP
CY74FCT374ATSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
7.2
CY54FCT374ATLMB
L61
20-Pin Square Leadless Chip Carrier
Military
CY54FCT374ATDMB
D6
20-Lead (300-Mil) CerDIP
10.0
CY74FCT374TQCT
Q5
20-Lead (150-Mil) QSOP
Commercial
CY74FCT374TSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
11.0
CY54FCT374TDMB
D6
20-Lead (300-Mil) CerDIP
Military
CY54FCT374TLMB
L61
20-Pin Square Leadless Chip Carrier
Ordering Information--FCT574T
Speed
(ns)
Ordering Code
Package
Name
Package Type
Operating
Range
5.2
CY74FCT574CTQCT
Q5
20-Lead (150-Mil) QSOP
Commercial
CY74FCT574CTSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
6.2
CY54FCT574CTDMB
D6
20-Lead (300-Mil) CerDIP
Military
6.5
CY74FCT574ATQCT
Q5
20-Lead (150-Mil) QSOP
Commercial
CY74FCT574ATSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
7.2
CY54FCT574ATDMB
D6
20-Lead (300-Mil) CerDIP
Military
CY54FCT574ATLMB
L61
20-Pin Square Leadless Chip Carrier
10.0
CY74FCT574TQCT
Q5
20-Lead (150-Mil) QSOP
Commercial
CY74FCT574TSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
Document #: 38-00278-B
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