HCC/HCF40102B

HCC/HCF40103B

8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS

DESCRIPTION

SYNCHRONOUS

ASYNCHRONOUS

PRESET

MEDIUM-SPEED OPERATION : f

= 3.6MHz

(TYP.) @ V

= 10V

CASCADABLE

QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE

5V, 10V AND 15V PARAMETRIC RATINGS

INPUT CURRENT OF 100 nA AT 18V AND 25

FOR HCC DEVICE

100% TESTED FOR QUIESCENT CURRENT

MEETS ALL REQUIREMENTS OF JEDEC TEN-
TATIVE STANDARD N

. 13 A, "STANDARD

SPECIFICATIONS FOR DESCRIPTION OF "B"
SERIES CMOS DEVICES"

June 1989

The HCC40102B, HCC40103B, (extended tempera-
ture range) and the HCF40102B, HCF40103B (inter-
mediate temperature range) are monolithic integrated
circuits, available in 16-lead dual in-line plastic or ce-
ramic

package.

The

HCC/HCF40102B,

and

HCC/HCF40103B consist of an 8-stage synchronous
down counter with a single output which is active when
the internal count is zero. The HCC/HCF40102B is
configured as two cascaded 4-bit BCD counters, and
the HCC/HCF40103B contains a single 8-bit binary
counter. Each type has control inputs for enabling or
disabling the clock, for clearing the counter to its
maximum count, and for presetting the counter
either synchronously or asynchronously. All control
inputs and the CARRY-OUT/ZERO-DETECT out-
put are active-low logic. In normal operation, the
counter is decremented by one count on each posi-
tive transition of the CLOCK. Counting is inhibited
when the CARRY-IN/COUNTER ENABLE (CI/CE)
input is high. The CARRY-OUT/ZERO-DETEC
(CO/ZD) output goes low when the count reaches
zero if the CI/CE input is low, and remains low for
one full clock period. When the SYNCHRONOUS
PRESET-ENABLE (SPE) input is low, data at the
JAM input is clocked into the counter on the next
positive clock transition regardless of the state of the
CI/CE

input.

When

the

ASYNCHRONOUS

PRESET-ENABLE (APE) input is low, data at the

(Plastic Package)

(Ceramic Package)

(Chip Carrier)

ORDER CODES :

HCC401XXBF

HCF401XXBEY
HCF401XXBC1

PIN CONNECTIONS

40102B 2-DECADE BCD TYPE
40103B 8-BIT BINARY TYPE

1/13

FUNCTIONAL DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

Supply Voltage : HC C Types

H C F Types

0.5 to + 20
0.5 to + 18

V
V

Input Voltage

0.5 to V

+ 0.5

DC Input Current (any one input)

t o t

Total Power Dissipation (per package)
Dissipation per Output Transistor
for T

o p

= Full Package-temperature Range

200

100

o p

Operating Temperature : HCC Types

H CF Types

55 to + 125

40 to + 85

s t g

Storage Temperature

65 to + 150

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Value

Unit

Supply Voltage : H CC Types

H C F Types

3 to 18
3 to 15

V
V

Input Voltage

0 to V

o p

Operating Temperature : HCC Types

H CF Types

55 to + 125

40 to + 85

Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.
* All voltages are with respect to V

(GND).

JAM inputs is asynchronously forced into the
counter regardless of the state of the SPE, CI/CE,
or CLOCK inputs. JAM inputs JO-J7 represent two
4-bit BCD words for the HCC/HCF40102B and a
single 8-bit binary word for the HCC/HCF40103B.
When the CLEAR (CLR) input is low, the counter
is asynchronously cleared to its maximum count
(99

for the HCC/HCF40102B and 255

for

theHCC/HCF40103B) regardless of the state of
any other input. The precedence relationship be-
tween control input is indicated in the truth table. If
all control inputs are high at the tieme of zero count,
the counters will jump to the maximum count, giving
a counting sequence of 100 or 256 clock pulses
long. The HCC/HCF40102B and HCC/HCF40103B
may be cascaded using the CI/CE input and the

HCC/HCF40102B/40103B

2/13

LOGIC DIAGRAMS (continued)

40102B

TRUTH TABLE

Control Inputs

CLR

APE

SPE

CI / CE

Preset Mode

Action

Inhibit Counter

Count Down

Synchronous

Preset on Next Positive Clock Transition

Preset Asynchrounously

Asynchronous

Clear to Maximum Count

Timing Diagram for 40102B and 40103B

Notes :

1. 0 = Low level

1 = High level
X = Don't care

2. Clock connected to clock input.
3. Synchronous operation : changes occur on negative-to-positive clock transitions..

JAM inputs : HCC/HCF010B ; MSD = J7, J6, J5, J4 (J7 is MSB)

LSD = J3, J2, J1, J0 (J3 is MSB)

HCC/HCF40103B Binary ; MSB = J7, LSB = J0

HCC/HCF40102B/40103B

4/13

STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)

Test Conditions

Value

D D

L o w

Hi g h

Symbol

Parameter

(V)

(

(V)

Min. Max. Min. Typ. Max. Min. Max.

Unit

Quiescent
Current

HCC
Types

0/ 5

0.04

150

0/10

0.04

300

0/15

0.04

600

0/20

100

0.08

100

3000

HCF
Types

0/ 5

0.04

150

0/10

0.04

300

0/15

0.04

600

O H

Output High
Voltage

0/ 5

< 1

4.95

0/10

< 1

9.95

0/15

< 1

14.95

O L

Output Low
Voltage

5/0

< 1

0.05

10/0

< 1

0.05

15/0

< 1

0.05

Input High
Voltage

0.5/4.5

< 1

3.5

1/9

< 1

1.5/13.5

< 1

Input Low
Voltage

4.5/0.5

< 1

1.5

9/1

< 1

13.5/1.5

< 1

O H

Output
Drive
Current

HCC
Types

0/ 5

2.5

1.6 3.2

1.15

0/ 5

4.6

0.64

0.51 1

0.36

0/10

9.5

1.6

1.3 2.6

0.9

0/15

13.5

4.2

3.4 6.8

2.4

HCF
Types

0/ 5

2.5

1.53

1.36 3.2

1.1

0/ 5

4.6

0.52

0.44 1

0.36

0/10

9.5

1.3

1.1 2.6

0.9

0/15

13.5

3.6

3.0 6.8

2.4

O L

Output
Sink
Current

HCC
Types

0/ 5

0.4

0.64

0.51

0.36

0/10

0.5

1.6

1.3

2.6

0.9

0/15

1.5

4.2

3.4

6.8

2.4

HCF
Types

0/ 5

0.4

0.52

0.44

0.36

0/10

0.5

1.3

1.1

2.6

0.9

0/15

1.5

3.6

3.0

6.8

2.4

, I

Input
Leakage
Current

HCC

Types

0/18

Any Input

0.1

HCF

Types

0/15

0.3

Input Capacitance

Any Input

7.5

* T

Low

= 55

C for HCC device : 40

C for HCF device.

* T

High

= + 125

C for HCC device : + 85

C for HCF device.

The Noise Margin for both "1" and "0" level is : 1V min. with V

= 5V, 2V min. with V

= 10V, 2.5 V min. with V

= 15V.

HCC/HCF40102B/40103B

5/13

DYNAMIC ELECTRICAL CHARACTERISTICS (T

amb

= 25

C, C

= 50pF, R

= 200k

typical temperature coefficient for all V

values is 0.3%/

C, all input rise and fall time = 20ns)

Test Conditions

Val ue

Symbol

Parameter

D D

(V)

Min.

Typ.

Max.

Unit

PHL

P L H

Propagation
Delay Time

Clock to-out

300

600

130

260

190

Carry In/Counter
Enable-to-output

200

400

180

130

Asynchronous
Preset
Enable-to-output

650

1300

300

600

200

400

Clear-to-output

375

750

180

360

100

200

THL

, t

T L H

Transition Time

100

200

100

Pulse Width

Clock Pulse
Width

300

150

180

CLR Pulse
Width

320

160

100

APE Pulse Width

360

180

160

120

se t u p

Setup Time

SPE Setup Time

280

140

100

JAM Setup Time

200

100

Maximum Clock Input Frequency

0.7

1.4

1.8

3.6

MHz

2.4

4.8

HCC/HCF40102B/40103B

6/13

TYPICAL APPLICATIONS

Divide-by-"N" Counter.

Programmable Timer.

Microprocessor Interrupt Timer.

Synchronous Cascading.

An output spike (160ns @ V

= 5V) occurs whenever two or

more devices are cascaded in the parallel-clocked mode be-
cause the clock-to-carry out delay is greater than the carry-in-to-
carry out delay. This spike is eliminated by gating the out

put

of the last device with the clock as shown.

HCC/HCF40102B/40103B

8/13

Ceramic DIP16/1 MECHANICAL DATA

DIM.

inch

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

0.787

0.276

3.3

0.130

0.38

0.015

17.78

0.700

2.29

2.79

0.090

0.110

0.4

0.55

0.016

0.022

1.17

1.52

0.046

0.060

0.22

0.31

0.009

0.012

0.51

1.27

0.020

0.050

10.3

0.406

7.8

8.05

0.307

0.317

5.08

0.200

P053D

HCC/HCF40102B/40103B

11/13

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.

SGS-THOMSON Microelectronics GROUP OF COMPANIES

Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -

Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A

HCC/HCF40102B/40103B

13/13

Part Number HCC40102B