1
E00X23A2Z-PS
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any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXG1104TN
10 pin TSSOP (Plastic)
High Power SPDT Switch with Logic Control
Description
The CXG1104TN is a high power antenna switch
MMIC for use in cellular handsets, for example, CDMA.
The CXG1104TN has on-chip logic, which enables
the switch circuit to operate by 1 CMOS control line.
The Sony JFET process is used for low insertion
loss and on-chip logic circuit.
Features
· Low insertion loss: 0.3dB @900MHz, 0.4dB @1.9GHz
· High linearity: IIP3 (Typ.) = 70dBm
· 1 CMOS compatible control line
· Small package size: 10-pin TSSOP
Applications
Cellular handsets, for example, narrow band CDMA and wide band CDMA
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings (Ta = 25°C)
· Bias voltage
V
DD
7
V
· Control voltage
Vctl
5
V
· Operating temperature
Topr
35 to +85
°C
· Storage temperature
Tstg
65 to +150
°C
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.
The actual ESD test data will be available later.
2
CXG1104TN
Block Diagram and Recommended Circuit
When using this IC, the following external components should be used:
Rctl:
This resistor is used to improve ESD performance. 1k
is recommended.
C
RF
:
This capacitor is used for RF decoupling and must be used for all applications.
100pF is recommended.
Cbypass: This capacitor is used for DC line filtering. 100pF is recommended.
Truth Table
Item
Vctl (H)
Vctl (L)
V
DD
Min.
2.0
0
2.6
Typ.
3.0
--
3.0
Max.
3.6
0.8
4.5
Unit
V
V
V
1
2
3
4
5
6
7
8
9
10
GND
GND
V
DD
Cbypass
(100pF)
RF3
C
RF
(100pF)
RF1
C
RF
(100pF)
RF2
GND
GND
GND
Rctl (1k
)
C
RF
(100pF)
Cbypass
(100pF)
CTL
DC Bias Condition
(Ta = 25°C)
On Pass
RF1 RF2
RF1 RF3
CTL
L
H
3
CXG1104TN
Electrical Characteristics
(Ta = 25°C)
Unit
dB
dB
dB
dB
--
dBc
dBc
dBm
dBm
µs
µA
µA
Max.
0.55
0.65
1.4
5
80
200
Typ.
0.30
0.40
23
16.5
1.2
75
75
35
70
2
40
100
Min.
20
14
60
60
32
60
Symbol
IL
ISO.
VSWR
2fo
3fo
P1dB
IIP3
TSW
Ictl
I
DD
Item
Insertion loss
Isolation
VSWR
Harmonics
1dB compression input power
Input IP3
Switching speed
Control current
Bias current
1
Pin = 29dBm, 900MHz, V
DD
= 3.0V, 0/3V control
2
Pin = 25dBm (900MHz) + 25dBm (901MHz), V
DD
= 3.0V, 0/3V control
Condition
900MHz
1.9GHz
900MHz
1.9GHz
900MHz, 1.9GHz
1
1
V
DD
= 3.0V, 0/3V control
2
Vctl (High) = 3V
V
DD
= 3V
4
CXG1104TN
Sony Corporation
Package Outline Unit: mm
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE MASS
EPOXY RESIN
SOLDER PLATING
COPPER ALLOY
PACKAGE STRUCTURE
0.22 0.07
0.5
5
1.2MAX
2.8 ± 0.1
10
6
2.2 ±
0.1
3.2 ±
0.2
0.1 0.05
+ 0.15
0.45 ±
0.15
0° to 10°
1
A
(0.2)
0.22 0.07
+ 0.08
(0.1)
0.12 0.015
+ 0.025
DETAIL A
0.02g
TSSOP-10P-L01
10PIN TSSOP (PLASTIC)
0.1
0.1
M
NOTE: Dimension "
" does not include mold protrusion.
0.25
+ 0.08
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE MASS
EPOXY RESIN
SOLDER PLATING
COPPER ALLOY
PACKAGE STRUCTURE
0.22 0.07
0.5
5
1.2MAX
2.8 ± 0.1
10
6
2.2 ±
0.1
3.2 ±
0.2
0.1 0.05
+ 0.15
0.45 ±
0.15
0° to 10°
1
A
(0.2)
0.22 0.07
+ 0.08
(0.1)
0.12
0.015
+ 0.025
DETAIL A
0.02g
TSSOP-10P-L01
10PIN TSSOP (PLASTIC)
0.1
0.1
M
NOTE: Dimension "
" does not include mold protrusion.
0.25
+ 0.08
LEAD PLATING SPECIFICATIONS
ITEM
LEAD MATERIAL
COPPER ALLOY
SOLDER COMPOSITION
Sn-Bi Bi:1-4wt%
PLATING THICKNESS
5-18µm
SPEC.
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