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FUJITSU SEMICONDUCTOR
DATA SHEET
DS04213531E
ASSP
Dual Serial Input
PLL Frequency Synthesizer
MB15F02L
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DESCRIPTION
The Fujitsu MB15F02L is a serial input Phase Locked Loop (PLL) frequency synthesizer with a 1.2 GHz and a 250
MHz prescalers. A 64/65 or a 128/129 for the 1.2 GHz prescaler, and a 16/17 or a 32/33 for 250 MHz prescaler can
be selected that enables pulse swallow operation.
The latest BiCMOS process technology is used, resuItantly a supply current is limited as low as 4.0 mA typ. at a
supply voltage of 3.0 V.
Furthermore, a super charger circuit is included to provide a fast tuning as well as low noise performance. As a result
of this, MB15F02L is ideally suitable for digital mobile communications, such as GSM (Global System for Mobile
Communications).
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FEATURES
· High frequency operation
RF synthesizer: 1.2 GHz max. / IF synthesizer: 250 MHz max.
· Low power supply voltage: V
CC
= 2.7 to 3.6 V
· Very Low power supply current : I
CC
= 4.0 mA typ. (V
CC
= 3 V)
· Power saving function : Supply current at power saving mode Typ.0.1
µ
A (V
CC
= 3 V), Max.10
µ
A (I
PS1
= I
PS2
)
· Dual modulus prescaler : 1.2 GHz prescaler (64/65,128/129) , 250 MHz prescaler (16/17,32/33)
· Serial input 14-bit programmable reference divider: R = 5 to 16,383
· Serial input 18-bit programmable divider consisting of:
- Binary 7-bit swallow counter: 0 to 127
- Binary 11-bit programmable counter: 5 to 2,047
· Onchip high performance charge pump circuit and phase comparator, achieving highspeed lockup and low
phase noise
· Onchip phase control for phase comparator
· Wide operating temperature: Ta = 40 to 85
°
C
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PACKAGES
16-pin, Plastic SSOP
(FPT-16P-M05)
16-pin, Plastic BCC
(LCC-16P-M03)
2
MB15F02L
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PIN ASSIGNMENTS
TOP
1
2
3
4
5
6
16
15
14
13
12
11
7
8
10
9
VIEW
GND
RF
GND
IF
fin
IF
OSCin
Vcc
IF
PS
IF
Do
IF
LD/fout
Clock
Data
LE
fin
RF
Vcc
RF
Xfin
RF
PS
RF
Do
RF
Top view
GND
IF
fin
IF
OSCin
VCC
IF
Date
LE
fin
RF
V
CCRF
PS
IF
Xfin
RF
PS
RF
LD/fout
(LCC-16P-M03)
GND
RF
Clock
1
2
3
4
5
6
7
8
9
10
11
12
13
14
16
15
BCC-16 pin
(FPT-16P-M05)
SSOP-16 pin
Do
IF
Do
RF
3
MB15F02L
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PIN DESCRIPTIONS
Pin no.
Pin name
I/O
Descriptions
SSOP
BCC
1
16
GND
RF
Ground for RF-PLL section.
2
1
OSCin
I
The programmable reference divider input. TCXO should be connected
with a AC coupling capacitor.
3
2
GND
IF
Ground for the IF-PLL section.
4
3
fin
IF
I
Prescaler input pin for the IF-PLL.
The connection with VCO should be AC coupling.
5
4
V
CCIF
Power supply voltage input pin for the IF-PLL section.
6
5
LD/fout
O
Lock detect signal output (LD) / phase comparator monitoring output (fout)
The output signal is selected by a LDS bit in a serial data.
LDS bit = "H" ; outputs fout signal
LDS bit = "L" ; outputs LD signal
7
6
PS
IF
I
Power saving mode control for the IF-PLL section. This pin must be set
at "L" Power-ON. (Open is prohibited.)
PS
IF
= "H" ; Normal mode
PS
IF
= "L" ; Power saving mode
8
7
D
OIF
O
Charge pump output for the IF-PLL section.
Phase characteristics of the phase detector can be reversed by FC-bit.
9
8
DO
RF
O
Charge pump output for the RF-PLL section.
Phase characteristics of the phase detector can be reversed by FC-bit.
10
9
PS
RF
I
Power saving mode control for the RF-PLL section. This pin must be set
at "L" Power-ON. (Open is prohibited.)
PS
RF
= "H" ; Normal mode
PS
RF
= "L" ; Power saving mode
11
10
Xfin
RF
I
Prescaler complimentary input for the RF-PLL section.
This pin should be grounded via a capacitor.
12
11
V
CCRF
Power supply voltage input pin for the RF-PLL section, the shift register and
the oscillator input buffer. When power is OFF, latched data of RF-PLL is
cancelled.
13
12
fin
RF
I
Prescaler input pin for the RF-PLL.
The connection with VCO should be AC coupling.
14
13
LE
I
Load enable signal input (with the schmitt trigger circuit.)
When LE is "H", data in the shift register is transferred to the corresponding
latch according to the control bit in a serial data.
15
14
Data
I
Serial data input (with the schmitt trigger circuit.)
A data is transferred to the corresponding latch (IF-ref counter, IF-prog.
counter, RF-ref. counter, RF-prog. counter) according to the control bit in a
serial data.
16
15
Clock
I
Clock input for the 23-bit shift register (with the schmitt trigger circuit.)
One bit data is shifted into the shift register on a rising edge of the clock.
4
MB15F02L
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BLOCK DIAGRAM
PS
RF
2
4
14
Schmitt
circuit
15
Schmitt
circuit
16
Schmitt
circuit
C
N
1
23-bit shift
register
Latch selector
1
V
CCRF
12
GND
RF
fin
IF
OSCin
LE
Data
Clock
5
V
CCIF
Prescaler
(IFPLL)
16/17,32/33
Intermittent
mode
control
(IFPLL)
C
N
2
3-bit latch
LDS SW
IF
FC
IF
Binary 7-bit
swallow counter
(IFPLL)
Binary 11-bit
programmable
counter(IFPLL)
Phase
comp.
(IFPLL)
Charge
pump
(IFPLL)
Super
charger
7
PS
IF
7-bit latch
11-bit latch
2-bit latch
14-bit latch
Binary 14bit pro-
grammable ref.
counter
(IFPLL)
10
13
fin
RF
Prescaler
(RFPLL)
64/65,
128/129
3-bit latch
LDS SW
RF
FC
RF
Binary 7-bit
swallow counter
(RFPLL)
Binary 11-bit
programmable
counter
(RFPLL)
Charge
pump
(RFPLL)
Super
charger
7-bit latch
11-bit latch
T1
T2
2-bit latch
14-bit latch
Binary 14-bit pro-
grammable ref.
counter
(RFPLL)
T1
T2
OR
Lock
Det.
(IFPLL)
Lock
Det.
Selector
LD
fr
IF
fr
RF
fp
IF
fp
RF
9 Do
RF
8 Do
IF
AND
6
LD/fout
11
Xfin
RF
3
GND
IF
fr
IF
fr
RF
LD
IF
fp
RF
fp
IF
Intermittent
mode
control
(RFPLL)
Phase
comp.
(RFPLL)
LD
RF
Note : SSOP-16 pin
5
MB15F02L
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ABSOLUTE MAXIMUM RATINGS (See WARNING)
WARNING:
Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
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RECOMMENDED OPERATING CONDITIONS
WARNING:
Recommended operating conditions are normal operating ranges for the semiconductor device. All
the device's electrical characteristics are warranted when operated within these ranges.
Always use semiconductor devices within the recommended operating conditions. Operation outside
these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representative beforehand.
Handling Precautions
· This device should be transported and stored in anti-static containers.
· This is a static-sensitive device; take proper anti-ESD precautions. Ensure that personnel and equipment are
properly grounded. Cover workbenches with grounded conductive mats.
· Always turn the power supply off before inserting or removing the device from its socket.
· Protect leads with a conductive sheet when handling or transporting PC boards with devices.
Parameter
Symbol
Rating
Unit
Remark
Min.
Max.
Power supply voltage
V
CC
0.5
+4.0
V
Input voltage
V
I
0.5
V
CC
+0.5
V
Output voltage
V
O
0.5
V
CC
+0.5
V
Output current
I
O
10
+10
mA
Except Do output
I
do
25
+25
mA
Do output
Storage temperature
T
STG
55
+125
°
C
Parameter
Symbol
Value
Unit
Remark
Min.
Typ.
Max.
Power supply voltage
V
CC
2.7
3.0
3.6
V
Input voltage
V
I
GND
V
CC
V
Operating temperature
Ta
40
+85
°
C
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