© 2000 Fairchild Semiconductor Corporation
DS006399
www.fairchildsemi.com
August 1986
Revised March 2000
DM74LS165
8-
Bit
Par
a
ll
el
I
n
/Ser
ial
Out
put
Shif
t
Regis
t
er
s
DM74LS165
8-Bit Parallel In/Serial Output Shift Registers
General Description
This device is an 8-bit serial shift register which shifts data
in the direction of Q
A
toward Q
H
when clocked. Parallel-in
access is made available by eight individual direct data
inputs, which are enabled by a low level at the shift/load
input. These registers also feature gated clock inputs and
complementary outputs from the eighth bit.
Clocking is accomplished through a 2-input NOR gate, per-
mitting one input to be used as a clock-inhibit function.
Holding either of the clock inputs HIGH inhibits clocking,
and holding either clock input LOW with the load input
HIGH enables the other clock input. The clock-inhibit input
should be changed to the high level only while the clock
input is HIGH. Parallel loading is inhibited as long as the
load input is HIGH. Data at the parallel inputs are loaded
directly into the register on a HIGH-to-LOW transition of the
shift/load input, regardless of the logic levels on the clock,
clock inhibit, or serial inputs.
Features
s
Complementary outputs
s
Direct overriding (data) inputs
s
Gated clock inputs
s
Parallel-to-serial data conversion
s
Typical frequency 35 MHz
s
Typical power dissipation 105 mW
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Function Table
H
=
HIGH Level (steady state)
L
=
LOW Level (steady state)
X
=
Don't Care (any input, including transitions)
=
Transition from LOW-to-HIGH level
a...h
=
The level of steady-state input at inputs A through H, respectively.
Q
A0
, Q
B0
, Q
H0
=
The level of Q
A
, Q
B
, or Q
H
, respectively, before the
indicated steady-state input conditions were established.
Q
An
, Q
Gn
=
The level of Q
A
or Q
G
, respectively, before the most recent
transition of the clock.
Order Number
Package Number
Package Description
DM74LS165M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS165WM
M16B
16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS165N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Internal
Shift/ Clock Clock Serial Parallel Outputs Output
Load Inhibit
A...H
Q
A
Q
B
Q
H
L
X
X
X
a...h
a
b
h
H
L
L
X
X
Q
A0
Q
B0
Q
H0
H
L
H
X
H
Q
An
Q
Gn
H
L
L
X
L
Q
An
Q
Gn
H
H
X
X
X
Q
A0
Q
B0
Q
H0
3
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DM74LS165
Absolute Maximum Ratings
(Note 1)
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 2: C
L
=
15 pF, R
L
=
2 k
, T
A
=
25
°
C and V
CC
=
5V
Note 3: C
L
=
50 pF, R
L
=
2 k
, T
A
=
25
°
C and V
CC
=
5V
Note 4: T
A
=
25
°
C and V
CC
=
5V.
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 5: All typicals are at V
CC
=
5V, T
A
=
25
°
C.
Note 6: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 7: With all outputs OPEN, clock inhibit and shift/load at 4.5V, and a clock pulse applied to the CLOCK input, I
CC
is measured first with the parallel inputs
at 4.5V, then again grounded.
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
0
°
C to
+
70
°
C
Storage Temperature Range
-
65
°
C to
+
150
°
C
Symbol
Parameter
Min
Nom
Max
Units
V
CC
Supply Voltage
4.75
5
5.25
V
V
IH
HIGH Level Input Voltage
2
V
V
IL
LOW Level Input Voltage
0.8
V
I
OH
HIGH Level Output Current
-
0.4
mA
I
OL
LOW Level Output Current
8
mA
f
CLK
Clock Frequency (Note 2)
0
25
MHz
f
CLK
Clock Frequency (Note 3)
0
20
MHz
t
W
Pulse Width
Clock
25
ns
(Note 3)
Load
15
t
SU
Setup Time
Parallel
10
(Note 4)
Serial
20
ns
Enable
30
Shift
45
t
H
Hold Time (Note 4)
0
ns
T
A
Free Air Operating Temperature
0
70
°
C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 5)
V
I
Input Clamp Voltage
V
CC
=
Min, I
I
=
-
18 mA
-
1.5
V
V
OH
HIGH Level
V
CC
=
Min, I
OH
=
Max
2.7
3.4
V
Output Voltage
V
IL
=
Max, V
IH
=
Min
V
OL
LOW
Level V
CC
=
Min, I
OL
=
Max
0.4
Output Voltage
V
IL
=
Max, V
IH
=
Min
0.35
0.5
V
I
OL
=
4 mA, V
CC
=
Min
0.25
0.4
I
I
Input Current @ Max
V
CC
=
Max, V
I
=
7V
Shift/Load
0.3
mA
Input Voltage
Others
0.1
I
IH
HIGH Level
V
CC
=
Max
Shift/Load
60
µ
A
Input Current
V
I
=
2.7V
Others
20
I
IL
LOW
Level V
CC
=
Max
Shift/Load
-
1.2
mA
Input Current
V
I
=
0.4V
Others
-
0.4
I
OS
Short Circuit Output Current
V
CC
=
Max (Note 6)
-
20
-
100
mA
I
CC
Supply Current
V
CC
=
Max (Note 7)
21
36
mA
5
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DM74LS165
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M16B
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