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Apr 15, 2023 · [P4C1024L only] Common Data I/O Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology Automatic Power Down Packages – 32-Pin 400 or 600 mil Ceramic DIP – 32-Pin 300 mil Ceramic SOJ – 32-Pin Ceramic LCC (400x820 mil) [2-sided] – 32-Pin Ceramic LCC (450x550 mil) – 32-Pin Solder Seal Ceramic Flatpack
The P4C1024L is a 1,048,576-bit low power CMOS static RAM organized as 128Kx8. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs are fully TTL-compatible. The RAM operates from a single 5V±10% tolerance power supply. Access times of 55 ns, 70 ns, and 100 ns are available.
Inputs are fully TTL-compatible. The RAM operates from a single 5V±10% tolerance power supply. Access times 55 ns and 70 ns are availale. CMOS is utilized to reduce power consumption to a low level. The P4C1024L device provides asynchronous operation with matching access and cycle times. Memory locations are specified on address pins to A16.
- Memory => SRAM
- P4C1024L
- Performance Semiconductor Corp.
- SRAM
Part #: P4C1024L. Download. File Size: 281Kbytes. Page: 11 Pages. Description: LOW POWER 128K x 8 CMOS STATIC RAM. Manufacturer: Pyramid Semiconductor Corporation.
- P4C1024L Download
- 11 Pages
- 281.04 Kbytes
- P4C1024L
The P4C1024L device provides asynchronous operation with matching access and cycle times. Memory locations are specified on address pins A0 to A16. Reading is accomplished by device selection (CE1 low and CE2 high) and output enabling (OE) while write enable (WE) remains HIGH.
Inputs are fully TTL-compatible. The RAM operates from a single 5V±10% tolerance power supply. Access times 55 ns and 70 ns are availale. CMOS is utilized to reduce power consumption to a low level. The P4C1024L device provides asynchronous operation with matching access and cycle times. Memory locations are specified on address pins to A16.
The P4C1024/L is a 1,048,576-bit high speed CMOS static RAM organised as 128K x 8. The CMOS memory requires no clock or refreshing and has equal access and cycle times. Inputs and outputs are fully TTL-compatible. The RAM operates from a single 5V±10% tolerance power supply. Access times of 17 to 70 nanoseconds are available. CMOS is utilised to reduce power consumption to a low level. The ...
