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Jul 15, 2008 · Features. 150MHz (6.67 ns) SIMD SHARC Core, capable of 900MFLOPS peak performance. Code compatible with all SHARC Processors. Supports IEEE-compatible 32-bit floating-point, 40-bit floating-point and 32-bit fixed-point data types. 1Mbit on-chip dual-ported SRAM; 3Mbits mask-programmable ROM.
6 days ago · ADSP-21261SKBCZ150 Analog Devices Digital Signal Processors & Controllers - DSP, DSC 150 MHz, 32Bit DSP Processor datasheet, inventory, & pricing.
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This data sheet provides a general overview of the ADSP-2126x architecture and functionality. For detailed information on the ADSP-2126x family core architecture and instruction set, refer to the ADSP-2126x SHARC DSP Core Manual and the ADSP-21160 SHARC DSP Instruction Set Reference.
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ADSP-21261SKBCZ150 Analog Devices Digital Signal Processors & Controllers - DSP, DSC 150 MHz, 32Bit DSP Processor datasheet, inventory & pricing.