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1 day ago · ADSP-21161NCCA-100 Analog Devices Digital Signal Processors & Controllers - DSP, DSC High Perf 32B 100MHz datasheet, inventory, & pricing.
Oct 4, 2002 · 100 MHz (10 ns) SIMD SHARC DSP core. 600 MFLOPS (32-bit floating-point data), 600 MOPS (32-bit fixed-point data) Code-compatible with all SHARC DSPs. Supports IEEE-compatible 32-bit floating-point, 40-bit floating-point and 32-bit fixed-point math.
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mance DSP applications. The ADSP-21161N includes a 100 MHz or 110 MHz core, a dual-ported on-chip SRAM, an integrated I/O processor with multiprocessing support, and multiple internal buses to eliminate I/O bottlenecks. As was first offered in the ADSP-21160, the ADSP-21161N offers a single-instruction multiple-data (SIMD) architecture.
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ADSP-21161NCCA-100 Product details. The ADSP-21161N SHARC® DSP is a low cost derivative of the ADSP-21160 featuring Analog Devices Super Harvard Architecture. Easing portability, the ADSP-21161N is source code compatible with the ADSP-21160 and with first generation ADSP-2106x SHARC processors in SISD (Single-Instruction, Single-Data) mode.
