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  1. The AD1892 combines a CP-1201, CP-340, IEC-958, AES/EBU, S/PDIF compatible Digital Audio Receiver (DAR) with an asynchronous sample rate converter, allowing the user to specify the output sample rate of the received digital audio infor-mation. The DAR block features support for both Q-channel subcode information (to support CD, CD-R, MD and DAT ...

  2. The AD1892 is a clock master device; the audio data clocks, bit clock (BCLK, Pin 26) and left/right clock are outputs only. LRCLK runs continuously and transitions twice per stereo sample period. BCLK also runs continuously and is used only to clock the audio data from the AD1892’s serial data output port.

  3. The AD1892 combines a CP-1201, CP-340, IEC-958, AES/EBU, S/PDIF compatible Digital Audio Receiver (DAR) with an asynchronous sample rate converter, allowing the user to specify the output sample rate of the received digital audio information.

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  4. AD1892 Analog Devices Inc. Interface parts available at DigiKey.

  5. May 5, 2001 · The AD1895 is a 24-bit, high-performance, single-chip, second-generation asynchronous sample rate converter. Based upon Analog Devices experience with its first family of asynchronous sample rate converters (the AD1890 to AD1893), the AD1895 offers improved performance and additional features. This improved performance includes a minimum THD+N ...

  6. on status output pins on the AD1892, so the AD1892 may be used in systems that do not include a microcontroller or micropro cessor. The asynchronous sample rate converter block is based on market leading AD 1890 family SamplePort rate conversion tech-nology. The AD1892 offers a 1:5 upsampling range, and will downsample from 48 kHz to 44.1 kHz.

  7. Mar 23, 2005 · The AD1892 offers a 1:5 upsampling range, and will downsample from 48 kHz to 44.1 kHz. Input audio word widths up to 20 bits are supported, and output audio word widths of 16 or 20 are supported, with 120 dB of dynamic range and –113 dB THD+N.