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Feb 20, 2013 · Mt9042cp: Filesize: 54.51 kB: Filetype: ibs (Mime Type: application/octet-stream) Document Group: Everybody: Last updated on: 02/20/2013 00:12
Mt9042cp. Typical Applications. Synchronization and timing control for multitrunk T1 and E1 systems. ST-BUS clock and frame pulse sources. Primary Trunk Rate Converters. MT9042CPR1.
Description. The MT9042C Multitrunk System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9042C generates ST-BUS clock and framing signals that are phase locked to either a 2.048 MHz, 1.544 MHz, or 8 kHz input reference.
Description. The MT9042C Multitrunk System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9042C generates ST-BUS clock and framing signals that are phase locked to either a 2.048MHz, 1.544MHz, or 8kHz input reference.
- MT9042CP Download
- 28 Pages
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- MT9042CP
Description. The MT9042C Multitrunk System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9042C generates ST-BUS clock and framing signals that are phase locked to either or 8kHz input reference.
- Timing Circuits => PLL (Phase locked loop)
- MT9042CP
- Zarlink Semiconductor
- Digital PLL->DS1 & E1
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The MT9042 is a digital phase-locked loop (PLL) designed to provide timing and synchronization signals for T1 and E1 primary rate transmission links that are compatible with ST-BUS/GCI frame alignment timing requirements. The PLL outputs can be synchronized to either a 2.048 MHz, 1.544 MHz, or 8 kHz reference.
