Dual D Flip-Flop High-Voltage Silicon-Gate CMOS · IW4013BD datasheet pdf INTEGRAL Semiconductor Devices Download IW4013BD datasheet from
IW4013BD SOIC. IZ4013B Chip. • Noise margin (over full package temperature range):. 1.0 V min @ 5.0 V supply. 2.0 V min @ 10.0 V supply. TA = -55° to 125° C for ...
IW4013BD, Dual D flip-flop, high-voltage silicon-gate CMOS in 14-pin SOIC package. Operational temperature range from -55°C to 125°C. Datasheet*).
IW4013BD · INTEGRAL-IW4013BD Datasheet 177Kb/5P, Dual D Flip-Flop High-Voltage Silicon-Gate CMOS. IW4013BN · INTEGRAL-IW4013BN Datasheet 177Kb/5P, Dual D Flip- ...