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  1. 8.1 Overview. The SNx4HC138 devices are 3-to-8 decoders and demultiplexers. The three input pins, A, B, and C, select which output is active. The selected output is pulled LOW, while the remaining outputs are all HIGH. The conditions at the binary-select inputs at the three enable inputs select one of eight output lines.

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  2. TI’s CD74HC138 is a High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer Inverting and Non-Inverting. Find parameters, ordering and quality information.

  3. IN74HC138AD Product details. The IN74HC138A is identical in pinout to the LS/ALS138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The IN74HC138A decodes a three-bit Address to one-of-eight active low outputs.

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  4. Order today, ships today. MC74HC138AD – Decoder/Demultiplexer 1 x 3:8 16-SOIC from onsemi. Pricing and Availability on millions of electronic components from Digi-Key Electronics.

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  5. Demultiplexing capability. Multiple input enable for easy expansion. Ideal for memory chip select decoding. Active LOW mutually exclusive outputs. Input levels: For 74HC138: CMOS level. For 74HCT138: TTL level. Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) ESD protection:

  6. Product data sheet. General description. The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH.

  7. Documentation. Support. Ordering. Features and benefits. Wide supply voltage range from 2.0 to 6.0 V. CMOS low power dissipation. High noise immunity. Latch-up performance exceeds 100 mA per JESD 78 Class II Level B. Demultiplexing capability. Multiple input enable for easy expansion. Ideal for memory chip select decoding.