Dual J-K flip-flop with set and reset high-speed silicon-gate CMOS · IN74AC112D datasheet pdf INTEGRAL Download IN74AC112D datasheet from. INTEGRAL, pdf

IN74AC112D · IKSEMICON-IN74AC112D Datasheet 223Kb / 6P, Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS. IN74AC112N · IKSEMICON-IN74AC112N ...

IN74AC11D, Triple 3-input AND gate high-performance silicon-gate CMOS in 14-pin SOIC package. Operational temperature range from -40°C to 85°C. Datasheet*).

Both outputs will remain low as long as Set and Reset are low, but the output states are unpredictable if Set and Reset go high simultaneously

Details, datasheet, quote on part number: IN74AC112D ; Category, Logic ; Description, Dual J-k Negative-edge-triggered Flip-flop 16 ; Company, IK Semiconductor.

INTEGRAL-IN74AC112D Datasheet 179Kb/5P, Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS. logo. IK Semicon Co., Ltd, IN74AC112D · IKSEMICON ...

IN74AC112N Plastic. IN74AC112D SOIC. TA = -40° to 85° C for all packages. FUNCTION TABLE. Inputs. Outputs. Set. Reset. Clock. J. K. Q. Q. L. H. X. X. X. H. L. H.

ORDERING INFORMATION. IN74AC112N Plastic. IN74AC112D SOIC. TA = -40° to 85° C for all packages. PIN ASSIGNMENT. LOGIC DIAGRAM. www.datasheetPP4IINNu81.=6c=GVoNC ...

IN74AC112D : Dual J-k Negative-edge-triggered Flip-flop 16. IN74ACT574AN : Octal D-type Flip-Flop, Ninv (3-State) 20. IN74HC125AD : Quad 3-state Noninverting ...