Search Results
EPF10K100A Product details. General Description. Altera’s FLEX 10K devices are the industry’s first embedded PLDs. Based on reconfigurable CMOS SRAM elements, the Flexible Logic Element MatriX (FLEX) architecture incorporates all features necessary to implement common gate array megafunctions.
EPF10K100A Product details. The Altera enhanced configuration device is a single-device, high-speed, advanced configuration solution for very high-density FPGAs. The core of an enhanced configuration device is divided into two major blocks, a configuration controller and a flash memory.
- EPF10K100A Click to view
- 34 Pages
- 456.96 Kbytes
- EPF10K100A
EPF10K100A EPF10K130V EPF10K250A Typical gates (logic and RAM), Note (1) 70,000 100,000 130,000 250,000 Usable gates 46,000 to 118,000 62,000 to 158,000 82,000 to 211,000 149,000 to 310,000 LEs 3,744 4,992 6,656 12,160 LABs 468 624 832 1,520 EABs 9 12 16 20 Total RAM bits 18,432 24,576 32,768 40,960 Maximum user I/O pins 358 406 470 470 Table 3 ...
To maintain pin compatibility when transferring from the EPF10K100 to the EPF10K70 in the 503-pin PGA package, do not use these pins as user I/O pins. This pin shows the status of the ClockLock and ClockBoost circuitry. When the ClockLock and ClockBoost circuitry are locked to the incoming clock and generate an internal clock, LOCK is driven high.
EPF10K100A Device Pin-Outs ver. 1.0 Pin Name 240-Pin PQFP/RQFP 356-Pin BGA 484-Pin FineLine BGA 600-Pin BGA GNDINT 10, 22, 32, 42, 52, 69, 85, 93, 104, 125, 135, 145, 155, 165, 176, 197, 216, 232 A2, A10, A20, B1, B13, B22, B25, B26, C2, C9, C13, C25, H23, J26, K1, M1, N26, R1, R26, T1, U26, W1, AD2, AD14, AD20, AE1, AE2, AE7, AE25, AE26, AF11,
Part #: EPF10K100A. Click to download. File Size: 1MbKbytes. Page: 128 Pages. Description: Embedded Programmable Logic Device Family. Manufacturer: Altera Corporation.
FLEX 10KE Embedded Programmable Logic Devices Data Sheet. Typical gates (1) Maximum system gates Logic elements (LEs) EABs Total RAM bits Maximum user I/O pins Note to tables: (1) (2) The embedded IEEE Std. 1149.1 JTAG circuitry adds to 31,250 gates in addition to the listed typical or maximum system gates.
