×
Delete A23L0616/A23L06161/A23L06162-100 part. June 20, 2005. Change tACE from 70ns to 75ns(max.) 1.0. Final version release. April 9, 2007.
DDR 256M bit, die C, based on 110nm design rules. Double data rate architecture: two data transfers per clock cycle. Bidirectional data strobe (DQS) is ...
A23L06161 1M X 16 / 2M X 8 BIT CMOS MASK ROM 1M x 16 bit or 2M x 8 bit organization #1048708; Supply voltage range: 2.7V~3.6V #1048708; Access time: 70 ns ...
A23L06161 from www.alldatasheet.com
Manufacturer, Part #, Datasheet, Description. AMIC Technology, A23L06161 · AMICC-A23L06161 Datasheet 259Kb / 11P, 1M X 16 / 2M X 8 BIT CMOS MASK ROM.
A23L06161, A23L06161 Selling Leads, Summary: Features: 1M x 16 bit or 2M x 8 bit organization Supply voltage range: 2.7V~3.6V Access time: 70 ns (max.)
A23L06161 1M X 16 / 2M X 8 BIT CMOS MASK ROM1M x 16 bit or 2M x 8 bit organization􀂄 Supply voltage range: 2.7V~3.6V􀂄 Access time: 70 ns (max.)/2.7V~3.6V ...
A23L06161 1M X 16 / 2M X 8 BIT CMOS MASK ROM1M x 16 bit or 2M x 8 bit organization􀂄 Supply voltage range: 2.7V~3.6V􀂄 Access time: 70 ns (max.)/2.7V~3.6V ...
A23L Datasheet. Part #: A23L0616. Datasheet: 259Kb/11P. Manufacturer: AMIC Technology. Description: 1M X 16 / 2M X 8 BIT CMOS MASK ROM. 115 Results.
A23L06161 · AMICC-A23L06161 Datasheet 259Kb/11P, 1M X 16 / 2M X 8 BIT CMOS MASK ROM. A23L06161V · AMICC-A23L06161V Datasheet 259Kb/11P, 1M X 16 / 2M X 8 BIT ...