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Order today, ships today. 74F564PC – Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-DIP (0.300", 7.62mm) from onsemi. Pricing and Availability on millions of electronic components from Digi-Key Electronics.
- IC FF D-TYPE SNGL 8BIT 20DIP
- onsemi
- 74F564PC-ND
- 74F564PC
View 74F564 by onsemi datasheet for technical specifications, dimensions and more at DigiKey. 74F564 by onsemi Datasheet | DigiKey Login or REGISTER Hello, {0} Account & Lists
The 74F564 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold times requirements on the LOW-to-HIGH Clock (CP) transition.
• 74F564 is broadside pinout version of 74F534 • Inputs and Outputs on opposite side of package allow easy interface to Microprocessors • Useful as an Input or Ouput port for Microprocessors • 3-State Ouputs for Bus interfacing • Common Output Enable • 74F574 is a non-inverting version of 74F564
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- 74F564
The 74F564 is a high-speed, low power octal flip-flop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is sorted in the flip-flops on the LOW-to-HIGH Clock (CP) transition. This device is functionally identical to the 74F574, but has inverted outputs. Features
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- 74F564
The 74F564 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold times requirements on the LOW-to-HIGH Clock (CP) transition.
The 74F564 has a broadside pinout configuration to facilitate PC board layout and allows easy interface with microprocessors. an 8-bit, edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by the clock (CP) and Output Enable (OE) control gates.