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9.1 Overview. These circuits are positive-edge-triggered D-type flip-flops with a direct clear (CLR) input. Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse.
- SN74HCT273 data sheet, product information and support | TI.com
TI’s SN74HCT273 is a Octal D-Type Flip-Flops With Clear....
- CD74HCT273 data sheet, product information and support | TI.com
TI’s CD74HCT273 is a High Speed CMOS Logic Octal D-Type...
- SN74HCT273 data sheet, product information and support | TI.com
The 74AHC273; 74AHCT273 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC273; 74AHCT273 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs.
The 74AHC273; 74AHCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition.
Integrated Circuits (ICs) | Flip Flops. 74AHCT273 Nexperia USA Inc. Logic parts available at DigiKey.
General description. The 74AHC273; 74AHCT273 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC273; 74AHCT273 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs.