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Part Number TLV320AIC27

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TLV320AIC27
STEREO AUDIO CODEC
SLAS253 ­ MARCH 2000
1
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
D
3.3-V or 5-V Operation
D
18-Bit Stereo Codec
D
S/N Ratio >95 dB
D
Multiple Stereo Input Mixer
D
Mono and Stereo Volume Control
D
48-Pin TQFP Package
D
Power Management Features
D
Low-Power Implementation
D
Four DAC Channels, Stereo ADC
D
Balanced Mixer Architecture
D
Variable Rate Audio and Modem Support
D
Analog 3D Stereo Enhancement
D
Line Level Outputs
D
Master/Slave ID Selection
D
AC97 Rev. 2.1 Compliant
D
Complete TI-DSP-CODEC Solution
description
The TLV320AIC27 comprises a stereo 18-bit codec (that is, 2 ADCs and 4 DACs), plus a comprehensive analog
mixer with four sets of stereo inputs, plus one phone input, two microphone inputs, and one PC-beep input.
Additionally, on-chip reference circuits generate the necessary bias voltages for the device, and a bidirectional
serial interface allows transfer of control data, DAC, and ADC words to and from the AC'97 controller. The
TLV320AIC27 is fully compliant with Revision 2.1 of the AC'97 specification.
The TLV320AIC27 has the ADC and DAC functions implemented using oversampled, or sigma-delta,
converters and uses on-chip digital filters to convert these one-bit signals to and from the 48 ksps, 16/18-bit PCM
words that the AC'97 controller requires. The digital and analog sections of the device are powered separately
to optimize performance, and 3.3-V digital and 5-V analog supplies may be used on the same device to further
optimize performance. Digital IOs are 5-V tolerant when the analog supplies are 5 V. Therefore, the
TLV320AIC27 may be connected to a controller running on 5-V supplies, but use 3.3 V for the digital section
of the TLV320AIC27. The TLV320AIC27 is also capable of operating with a 3.3-V supply only (digital and
analog).
When using the TLV320AIC27 codec, the AC'97 controller may be selected from Texas Instruments family of
DSPs. The combination of the computing power of the TI DSP and the high audio performance of the
TLV320AIC27 constitutes a complete solution for various applications. The ability to power down sections of
the device selectively, and the option to alternate the master clock, and hence sample rates, makes such
applications as telecommunications, audio, teleconferencing, and USB, possible.
Additional features added to the Intel
TM
AC'97 specification, such as the EAPD (external amplifier power down)
bit and internal connection of PC beep to the outputs when the device is reset are supported, as well as optional
features such as variable sample rate support.
There are four modes of operation.
D
Basic (2-channel)
D
6-channel I
2
S
D
Quad
D
Modem
ESD Sensitive Device. This device is manufactured on a CMOS process. It it therefore generically susceptible to damage from
excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. As per JEDEC
specifications A112-A and A113-B, this product requires specific storage conditions prior to surface mount assembly. It has been
classified as having a Moisture Sensitivity Level of 2 and as such will be supplied in vacuum-sealed moisture barrier bags.
Copyright
©
2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Intel is a trademark of Intel Corporation.
TLV320AIC27
STEREO AUDIO CODEC
SLAS253 ­ MARCH 2000
2
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
terminal assignments
2
3
LINEINR
LINEINL
MIC2
MIC1
CDR
CDGND
CDL
VIDEOR
VIDEOL
AUXR
AUXL
PHONE
24
23
22
21
20
19
18
17
16
15
14
13
4
37
38
39
40
41
42
43
44
45
46
47
48
MONOOUT
AV
DD2
LNLVLOUTL
MODE1
LNLVLOUTR
AV
SS2
GPIO
GPIO
CID0
CID1
EAPD
GPIO
5
6
7
8
AFIL
T1
VREFOUT
VREF
AV
35 34 33 32 31
36
30
LINEOUTR
LINEOUTL
CX3D2
CX3D1
CAP2
SYNC
RESETB
PCBEEP
XTLOUT
SDA
T
AOUT
BITCLK
SS2
SDA
T
AIN
DD2
28 27 26
29
9 10 11 12
25
1
AV
CAP1
MODE0
XTLIN
DD1
SS1
PFB PACKAGE
(TOP VIEW)
DV
DV
DV
DV
SS1
DD1
ORDERING INFORMATION
TA
PACKAGE
TA
48-TQFP PFB
0
°
C to 70
°
C
TLV320AIC27CPFB
­40
°
C to 85
°
C
TLV320AIC27IPFB
TLV320AIC27
STEREO AUDIO CODEC
SLAS253 ­ MARCH 2000
3
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
functional block diagram--two-channel mode
VOL/
MUTE
VOL/
MUTE
VOL/
MUTE
VOL/
MUTE
VOL/
MUTE
VOL/
MUTE
(37)
MONOOUT
(39,41)
LNLVLOUT
(35,36)
LINEOUT
CD (18,20)
LINEIN (23,24)
VIDEO (16,17)
AUX (14,15)
PHONE (13)
PCBEEP (12)
MIC[1] (21)
MIC[2] (22)
0dB/
20dB
MASTER/
SLAVE
SELECT
(45) CID[0]
(46) CID[1]
(6) BITCLK
(10) SYNC
(8) SDATAIN
(5)
SDATAOUT
(11)RESETB
(47) EAPD
VOL/
MUTE
OSC
(2) XTLIN
(3) XTLOUT
VOL
STEREO
DAC
SRC
VOL
SRC
VOL/
MUTE
MUX
VOL/
MUTE
VOL/
MUTE
MUX
KEY:
MONO
STEREO
RECORD
MUX
AND
MUTE
SERIAL
I/F
3D
STEREO
DAC
TLV320AIC27
STEREO AUDIO CODEC
SLAS253 ­ MARCH 2000
4
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
functional block diagram--6-channel I
2
S, quad, and modem modes
VOL/
MUTE
VOL/
MUTE
VOL/
MUTE
VOL/
MUTE
VOL/
MUTE
(37)
MONOOUT
(39,41)
LINEOUT
(35,36)
LINEOUT
CD (18,20)
LINEIN (23,24)
VIDEO (16,17)
AUX (14,15)
PHONE (13)
PCBEEP (12)
MIC[1] (21)
MIC[2] (22)
0dB/
20dB
MASTER/
SLAVE
SELECT
(45) CID[0]
(46) CID[1]
(6) BITCLK
(10) SYNC
(8) SDATAIN
(5)
SDATAOUT
(11)RESETB
(47) EAPD
VOL/
MUTE
OSC
(2) XTLIN
(3) XTLOUT
FRONT
STEREO
SRC
VOL
SRC
VOL/
MUTE
MUX
VOL/
MUTE
MUX
KEY:
MONO
STEREO
RECORD
MUX
AND
MUTE
SERIAL
I/F
3D
STEREO
ADC
General
(43,44,48)
IO
Supprt
GPIO[1:3]
DAC
VOL/
REAR
STEREO
SRC
DAC
MUTE
VOL/
MUTE
(30) MODE0
(40) MODE1
VOL/
MUTE
(REAR)
(FRONT)
REV. 2.1
SWITCH
VOL/
MUTE
VOL/
MUTE
VOL/
MUTE
TLV320AIC27
STEREO AUDIO CODEC
SLAS253 ­ MARCH 2000
5
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
TYPE
DESCRIPTION
NAME
NO.
TYPE
DESCRIPTION
AFILT1
29
Analog output
Buffered CAP2. This terminal has an internal connection.
VIDEOL
16
Analog input
Mixer input, typically for VIDEO signal
VIDEOR
17
Analog input
Mixer input, typically for VIDEO signal
AUXL
14
Analog input
Mixer input, typically for AUX signal
AUXR
15
Analog input
Mixer input, typically for AUX signal
AVDD1
25
Supply
Analog positive supply
AVDD2
38
Supply
Analog positive supply
AVSS1
26
Supply
Analog ground supply, chip substrate
AVSS2
42
Supply
Analog ground supply, chip substrate
BITCLK
6
Digital output
Serial interface clock output to AC'97 controller
CAP1
31
Analog output
Buffered CAP2. This terminal has an internal connection.
CAP2
32
Analog input
Reference input/output; pulls to midrail if not driven
CDGND
19
Analog input
CD input common-mode reference (ground)
CDL
18
Analog input
Mixer input, typically for CD signal
CDR
20
Analog input
Mixer input, typically for CD signal
CID0
45
Digital input
Master/slave ID select (internal pullup)
CID1
46
Digital input
Master/slave ID select (internal pullup)
CX3D1
33
Analog output
Output pin for 3D difference signal
CX3D2
34
Analog input
Input pin for 3D difference signal
DVDD1
1
Supply
Digital positive supply
DVDD2
9
Supply
Digital positive supply
DVSS1
4
Supply
Digital ground supply
DVSS2
7
Supply
Digital ground supply
EAPD
47
Digital output
External amplifier power down/GPO
GPIO
43, 44, 48
General-purpose I/O
LINEINL
23
Analog input
Mixer input, typically for LINE signal
LINEINR
24
Analog input
Mixer input, typically for LINE signal
LINEOUTL
35
Analog output
Main analog output for left channel
LINEOUTR
36
Analog output
Main analog output for right channel
LNLVLOUTL
39
Analog output
Left channel line-level output
LNLVLOUTR
41
Analog output
Right channel line-level output
MIC1
21
Analog input
Mixer input with extra gain, if required
MIC2
22
Analog input
Mixer input with extra gain, if required
MONOOUT
37
Analog output
Main mono output
MODE0
30
Digital input
Mode select pin, internal pulldown
MODE1
40
Digital input
Mode select pin, internal pulldown
PCBEEP
12
Analog input
Mixer input, typically for PCBEEP signal
PHONE
13
Analog input
Mixer input, typically for PHONE signal
RESETB
11
Digital input
NOT reset input (active low, resets registers)
SDATAIN
8
Digital output
Serial-data output to AC'97 controller
SDATAOUT
5
Digital input
Serial-data input
SYNC
10
Digital input
Serial-interface sync pulse from AC'97 controller
VREF
27
Analog output
Buffered CAP2. This terminal has an internal connection.
VREFOUT
28
Analog output
Reference for microphones; buffered CAP2
XTLIN
2
Digital input
Clock-crystal connection or clock input (XTAL not used)
XTLOUT
3
Digital output
Clock-crystal connection