®
1/2
DATA BRIEFING
This is Brief Data from STMicroelectronics. Details are subject to change without notice. For complete data, please contact
your nearest Sales Office or SmartCard Products Divison, Rousset, France. Fax: (+33) 4 42 25 87 29
ST16RF58
Smartcard MCU
With 8176 Bytes EEPROM for Contactless/Contact Applications
s
8 BIT ARCHITECTURE CPU
s
22 KBytes of USER ROM, SECTOR
COMBINATIVE
s
5 KBytes of SYSTEM ROM
s
512 Bytes of RAM
s
8176 Bytes of EEPROM, SECTOR
COMBINATIVE
Highly reliable CMOS EEPROM technology
10 year data retention
300,000 Erase/Write cycle endurance
Protected One Time Programmable block (32
or 64 bytes)
1 to 32 bytes block either Erase or Write in
single cycle programming
s
POWER SAVING STANDBY MODE
s
VERY HIGH SECURITY FEATURES
INCLUDING EEPROM FLASH ERASE
s
ESD PROTECTION GREATER THAN 5000V
s
2 OPERATING CONFIGURATIONS
ISSUER
USER
CONTACTLESS SPECIFIC FEATURES
s
13.56 MHZ OPERATION
s
106 KBIT/S DATA TRANSFER
s
AMPLITUDE MODULATION READER TO
CARD
s
LOAD MODULATION CARD TO READER
s
3V OPERATION
CONTACT SPECIFIC FEATURES
s
EXTENDED VOLTAGE OPERATION, Vcc
Range: 2.7V to 5.5V
s
SERIAL ACCESS, ISO 7816-3 COMPATIBLE
s
UP TO 5 MHz INTERNAL OPERATING
FREQUENCY
s
CONTACT ASSIGNMENT COMPATIBLE ISO
7816-2
2
2
2
2
Micromodule (D5)
Wafer
1
BD.RF58/9809VP2
ST16RF58
2/2
DESCRIPTION
The ST16RF58, a member of the standard ST16
device family, is a serial access microcontroller
especially designed for large volume contactless/
contact Smartcard applications.
The ST16RF58 is based on 8 bit CPU core and in-
cludes on chip memories: 512 Bytes of RAM, 22
KBytes of USER ROM, 5 KBytes of SYSTEM
ROM, and 8176 Bytes of EEPROM.
Both ROM and EEPROM memories can be con-
figured into two sectors. Access rules from any
memory section or sector to any other are set-up
by the User's defined Memory Access Control Ma-
trix (MACM).
Reliability data related to the ST16RF58 product,
manufactured using STMicroelectronics' ad-
vanced CMOS EEPROM technology, confirm
data retention of up to 10 years and endurance up
to 300,000 Erase/Write cycles.
Contact operation is fully compatible with the ISO
standards for Smartcard applications.
Figure 1 Block Diagram
SCP 076c/DS
MEMORY ACCESS CONTROL MATRIX
8 BIT
CPU
SERIAL I/0
INTERFACE
NUMBER
GENERATOR
INTERNAL BUS
RAM
SECT.
A
SECT.
B
SECTOR
A
SECTOR
B
SECTORS
COMBIN.
ROM
V GENERATION
EEPROM
SECTORS COMBINATIVE
RST
GND
V
I/O1
CLK
SYSTEM
ROM
SECT.
S
SECURITY
LOGIC
AC0
AC1
RF INTERFACE
CC
CC
8176 Bytes
22 KBytes
5 KBytes
512 Bytes
PDF 
ZIP