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Part Number M491B

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M491B
SINGLE-CHIP VOLTAGE SYNTHESIS TUNING SYSTEM
WITH 1 ANALOG CONTROL
September 1992
.
16-STATION MEMORY - 7-SEGMENT LED
DISPLAY
.
VOLTAGE SYNTHESIZER : 13 BITS
.
4-BAND PRESET CAPABILITY
.
NON-VOLATILE MEMORY : 304 BITS
- 16 WORDS OF 19 BITS FOR TUNING VOLT-
AGE (13 bits) - BAND (2 bits) - FINE DETUN-
ING (4 bits)
- 10
4
MODIFY CYCLES PER WORD
- MIN 10 YEARS DATA RETENTION
.
PCM REMOTE CONTROL RECEIVER : DE-
CODES SIGNAL TRANSMITTED BY M708
.
VOLUME D/A : 6-BIT RESOLUTION / 8kHz
.
MEMORY SKIP FUNCTION
.
AUTOMATIC SEARCH WITH DIGITAL AFT
CONTROL
.
FINE DETUNING D/A ACTING ON AFT DIS-
CRIMINATOR (16 steps) WITH SEPARATE
STORAGE FOR EACH MEMORY POSITION.
ALTERNATIVELY IT CAN BE USED TO CON-
TROL BRIGHTNESS OR COLOUR SATURA-
TION
.
MANUAL SEARCH WITH DIGITAL AFT CON-
TROL
.
MANUAL SEARCH WITH LINEAR AFT
.
SWEEP SEARCH DISPLAY OUTPUT
.
SUPPLY VOLTAGES : V
DD
= + 5V,
V
PP
= + 25V FOR THE MEMORY
.
CLOCK OSCILLATOR : 445 TO 510kHz
.
INTEGRATED DIGITAL POWER ON RESET
(no external initialization circuitry required)
DIP40
(Plastic Package)
ORDER CODE : M491B1
DESCRIPTION
The M491B is a monolithic N-MOS LSI circuit in-
cluding a Floating-gate Non-Volatile Memory for
storage of up to 16 stations. Tuning of the station
is performed with a 8192 step D/A converter, using
the principle of voltage synthesis. It is designed for
7-segment LED displays. Direct memory selection
is possible only from remote control while Up/Down
memory scanning is possible on the set and also
from remote control. An option input for 8 or 16
stations is available. The circuit also includes a
PCM remote control receiver operating in conjunc-
tion with the transmitter M708. The highly reliable
transmission code ensures error-free signal detec-
tion even in presence of high noise conditions.
Search of the station is possible in automatic or
manual modes. The circuit can operate with a
Digital or Linear AFT control. The Digital AFT mode
is necessary for automatic search and requires an
external circuit (TDA4433 or equivalent, e.g. dual
comparator plus TV station detector) to convert the
AFC-S-curve into an Up/Down command. Fine tun-
ing (detuning) is also possible with different modes
of operation. The circuit is assembled in 40-pindual
in-line plastic package.
1
2
3
4
5
6
7
8
9
10
11
12
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
13
14
15
16
17
18
19
20
24
23
22
21
(GND)
MEMORY SUPPLY
MEMORY TIMING
FINE TUNING D/A
TUNING D/A
DIGITAL AFT STATUS
OSC. IN
OSC. OUT
TEST
AFT 1
AFT 2
SWEEP DISPLAY OUT
VOLUME D/A
DIGITAL AFT EN.
V3
V2
V1
X4
X3
X2
X1
MAINS ON OPTION
MAINSON/OFF
SEGM. a
SEGM. b
SEGM.c
SEGM. d
OPT. 8/16
SEGM. e
SEGM.f
SEGM. g
SEGM.h + i
UHF
CATV
VHF III
VHF I
V
S S
V
DD
V
SS
(GND)
LINEAR AFT DEF.
I.R. INPUT
491B-01.EPS
PIN CONNECTIONS
1/16
M491B
1
2
3
4
5
7
8
9
10
11
14
18
19
20
21
22
23
24
31
32
37
38
39
40
TDA2320
or
8160
M708
445
to
5
10MHz
V
DD
R
I
V
SS
MT
MS
O
SC
IN
OSC
OUT
TEST
+5
V
445
to
510MHz
PP
V
(25V)
OPT.
8/16
V
SS
TUNING
D/A
FINE
TUNING
D/A
6
12
13
15
16
17
25
26
27
28
29
30
33
34
35
36
VHF
I
VHF
III
CAT
V
UHF
AFT1
AFT2
SWEEP
DISPLAY
OUT
DIGITAL
AFT
STATUS
DIGITAL
AFT
ENABLE
LINEAR
AFT
DEFEAT
VOLUME
D/A
MAINS
ON/OFF
MAINS
ON
OPTION
BAND
OUT
AUTO
SEARCH
STOP
DIGITAL
AFT
V1
V2
V3
X1
X2
X3
X4
a
b
c
d
e
f
g
h
i
4.5
to
13.2V
UP
(AFT1)
(AFT2)
DOWN
+12V
a
b
c
d
e
f
g
h
-
i
AFC-S
curve
491B-02.EPS
FUNCTIONAL DIAGRAM
M491B
2/16
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
DD
Supply Voltage
­ 0.3, + 7
V
V
PP
Memory Supply Voltage
­ 0.3, + 26
V
V
I
Input Voltage
­ 0.3, + 15
V
V
O (off)
Off State Input Voltage (except pin 3)
Pin 3
15
28
V
V
I
OL
Output Low Current
Led Driver Outputs
Pins 6 ­ 14
Pins 4 ­ 5
All Other Outputs
20
20
7.5
5
mA
t
pd
Max. Delay between Memory Timing and Memory Supply Pulses
5
µ
s
P
to t
Total Package Power Dissipation
1
W
T
stg
Storage Teperature
­ 25, + 125
°
C
T
op
Operating Temperature
0, + 70
°
C
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
491B-01.TBL
DC ELECTRICAL CHARACTERISTICS
(T
amb
= 0 to + 70
°
C, V
DD
= +5V unless otherwise specified)
Pin
Symbol
Parameter
Test Conditions
Min.
Typ. Max. Unit
2-Memory Supply
I
PP
Memory Supply Current
V
PP
= 25V
Write
Peak
Average
Erase
Peak
Average
Read
Peak
Average
42
12
9
5
8
2.5
mA
R
Pull Down Resistor
25
k
3­Write Timing Out
V
OL
Output Low Voltage
V
DD
= 4.75 V, I
OL
= 2.5 mA
8
V
I
O (off)
Output Leakage Current
V
DD
= 4.75 V, V
OUT
= 26 V
100
µ
A
4­Fine Tuning D/A
5­Tuning D/A
I
O (off)
V
DD
= 5.25 V, V
O (off)
= 13.2 V
50
µ
A
V
OL
V
DD
= 4.75 V, I
OL
= 5 mA
1
V
6­Digital AFT Out
V
OL
V
DD
= 4.75 V, I
OL
= 20 mA
1.5
V
I
O (off)
V
DD
= 5.25 V, V
O (off)
= 13.2 V
100
µ
A
9­Power Supply
I
DD
Supply Current
V
DD
= 5.25 V
100
mA
11­I.R. Input
V
IPP
Peak-to-Peak Voltage
0.5
13.2
V
12­AFT1
13­AFT2
V
IL
Input low Voltage
V
DD
= 5.25 V
1.5
V
V
IH
Input High Voltage
V
DD
= 5.25 V
3.5
V
I
IL
Input Low Current
V
DD
= 5.25 V, V
IL
= 1.5 V
­0.4
mA
R
Pull-up Resistor
30
k
14--Display Out
V
OL
V
DD
= 4.75 V, I
OL
= 20 mA
1.5
V
I
O (off)
V
DD
= 5.25 V, V
O (off)
= 13.2 V
100
µ
A
15­Volume D/A
V
OL
V
DD
= 4.75 V, I
OL
= 4 mA
1
V
I
O (off)
V
DD
= 5.25 V, V
O (off)
= 13.2 V
50
µ
A
16­Linear AFT Out
V
OL
V
DD
= 4.75 V, I
OL
= 1 mA
0.4
V
I
O (off)
V
DD
= 5.25 V, V
O (off)
= 13.2 V
50
µ
A
17­Digital AFT En-
able
V
IL
0.8
V
V
IH
2.0
V
I
IL
V
DD
= 5.25 V, V
IL
= 0.8 V
­0.4
mA
R
Pull-up Resistor
30
k
491B-02.TBL
M491B
3/16
DC ELECTRICAL CHARACTERISTICS (continued)
Pin
Symbol
Parameter
Test Conditions
Min.
Typ. Max.
Unit
18­19­20
V3
V2
V1
V
IL
1.5
V
V
IH
3.5
V
I
IL
V
DD
= 5.25 V, V
IL
= 0.8 V
­0.4
mA
R
Pull-up Resistor
30
k
21­22­23­24
X4
X3
X2
X1
V
OL
V
DD
= 4.75 V, I
OL
= 1 mA
0.4
V
I
O (off)
V
O (off)
= 5.5 V
25
µ
A
25­Mains On En-
able
V
IL
0.8
V
V
IH
2.4
V
I
IL
V
DD
= 5.25 V
­0.4
mA
R
Pull-up Resistor
V
IL
= 0.8 V
30
k
26­Mains On/Off
V
OL
V
DD
= 4.75 V, I
OL
= 100
µ
A
0.4
V
I
O
V
DD
= 4.75 V, V
O
= 0.7 V
­1.6
mA
31­Z2
32­Z1
MPX for
Display Out
V
OL
V
DD
= 4.75 V, I
OL
= 1 mA
0.4
V
I
O (off)
V
DD
= 5.25 V, V
O (off)
= 13.2 V
50
µ
A
37­UHF
38­CATV
39­VHFIII
40­VHFI
V
OL
V
DD
= 4.75 V, I
OL
= 1 mA
3
V
V
OH
V
DD
= 4.75 V, I
OH
= ­ 150
µ
A
2.4
V
V
IL
0.3
V
V
IH
3
V
I
O (off)
V
DD
= 5.25 V, V
O (off)
= 13.2 V
50
µ
A
27-28-29-30-33-
34-35 Display Out
V
OL
V
DD
= 4.75 V, I
OL
= 20 mA
1.5
V
36-Display Out
V
OL
V
DD
= 4.75 V, I
OL
= 30 mA
1.5
V
31-Memory 8/16
V
IH
2.0
V
V
IL
0.8
V
Keyboard
In
}
Keyboard
Out
}
B
A
N
D
}
491B-03.TBL
DESCRIPTION (All timings at f
clock
= 500kHz)
PIN 1 : V
SS
The substrate of the IC is connected to this pin. This
is the reference pin for all parameters of the IC.
PIN 2 : MEMORY SUPPLY VOLTAGE
A supply voltage of 25
±
1 V has to be applied to
this pin during the modify and read cycles.
MODIFY CYCLE
A modify cycle consists of three steps :
1. All "1"s are written in the bits of the selected word.
2. All bits of the selected word are erased (all "0"s)
3. The new content is written.
Thus a constant aging of all the bits of the word is
obtained.
During both write and erase cycles the memory
status is checked continuously ; therefore after
each write or erase pulsea read operationis carried
out. The write or the erase operations are stopped
as soon as the result of the read operation is valid.
WRITE CYCLE. The peak of the current flowing
through pin 2 during a write operation is shown in
fig. 1, while fig. 2 shows the envelope of the same
current.
The typical write time is 3-4 ms for the first cycles
and increases to about 30 ms after 1000 cycles.
M491B
4/16
40
12
5
I (mA)
Typ. max. 20msec
Typ. max. 8msec
t (ms)
491B-04.EPS
Figure 2
ERASE CYCLE
Figure 3 shows the timing and the waveform of the
current flowing through Pin 2 during the erase
operation. The peak current is 7mA (max) during
the erase cycle and 6mA (max) during the read
cycle. The typical erase time is 10ms for a new
device and increases with the number of modify
operations up to 200ms after 1000 cycles.
In order to protect the memory in case of failure of
some bits the modify operation is stopped after
1sec.
READ CYCLE
Figure 4 shows the waveform of the current during
a read operation.
32 44
256
µ
s
6mA
7mA
128
µ
s
52
491B-05.EPS
Figure 3
64
32 44
116
µ
s
256
µ
s
40mA
6mA
12mA
After about 30msec
491B-03.EPS
Figure 1
44
6mA
128
µ
s
84
µ
s
480
µ
s
491B-06.EPS
Figure 4
M491B
5/16
PIN 3 : MEMORY TIMING OUTPUT
This output gives the timing for the pulses to be
applied at Pin 2 during the modify and read cycles.
The output consists of an open drain transistor.
PIN 4 : FINE TUNING D/A (see Figure 5)
A D/A converter with 16-step resolution and a fre-
quency of 15kHz can be used to generate a voltage
which, if fed to a varicap diode in parallel to the AFC
discriminator, will detune the receiver by a small
f
while maintaining the action of the Digital AFT. This
output can be used in conjunction with both Linear
and Digital AFT modes of operations.
The Fine tuning function operates as follows :
- At the start of any automatic or manual search,
the output is set at the mid range.
- When the search has been completed it is possi-
ble to operate on FT
±
commands.
The store command memorizes this information
together with the 13 tuning voltage bits and 2
information bits.
- Modification time of FT D/A is of 1 step every
200ms if issued locally or every 2 received signals
from Remote control transmitter.
PIN 5 : TUNING D/A (see Figure 6)
A 2
13
= 8192 step pulse modulated signal for the
tuning voltage is available on this pin.
Pulse modulation is implemented by combination
of a rate multiplier and pulse width principle.
With a tuning voltage increasing from zero, the
number of pulses increases continuously up to
2
8
= 256 ; starting from this point the number of
pulses remains the same but the pulses get larger
until they reach the maximum content of the inter-
nal counter. The output consists of an open drain
transistor which offers a low impedance to ground
when in the ON state.
V
OUT
9
7
FT
FT
64
µ
s
Mid
Range
Fine Tuning Output
491B-07.EPS
Figure 5
M491B
6/16
V
A
D/A
Converter
V
C
Varicap
V
B
V
B
V
A
V
C
down-up
491B-08.EPS
Figure 6
PIN 6 : DIGITAL AFT STATUS OUTPUT
(see Figure 7)
This output shows the status of the digital AFT. It is
low when the digital AFT is enabled and it can
directly drive a LED.
The output consists of an open drain transistor.
PINS 7 & 8 : OSCILLATOR INPUT/OUTPUT
(see Figure 8)
The frequency of the clock oscillator should be
between 445 and 510kHz using a low-cost ceramic
resonator. In these conditions the value of the
reference frequency of the transmitter can be in the
same range. In other words the transmitter and the
receiver can operate with different reference fre-
quencies.
6
max. 13.2V
491B-09.EPS
Figure 7
7
8
455 to
510kHz
100pF
100pF
491B-10.EPS
Figure 8
PIN 9 : V
DD
The supply voltage has to be comprised in the
range 4.75 to 5.25V. When it is applied an internal
power on reset of 0.5s is generated.
The memory position 1 is automatically read if the
mains on option input (Pin 25) is grounded.
PIN 10 : TEST
This pin is used for testing and has to be connected
to V
SS
.
PIN 11 : I.R. SIGNAL INPUT (see Figure 9)
The integrated receiver decodes signals transmit-
ted by M708, address 9.
The minimum signal to be applied is 0.5V peak-to-
peak. (AC-coupled).
The receiver input section performs the following
tests on the incoming signal to achieve the neces-
sary noise immunity :
- measurement of the pulse distance (time base
synchronization)
M491B
7/16
491B-11.EPS
Figure 9
M491B
R
C
TDA2320
or TDA8160
Supply Voltage of
TDA2320
R
C
5
12
2.2k
10k
4.7nF
4.7nF
M491B REMOTE CONTROL RECEIVER TRUTH TABLE. Transmitter M708 ; Address Code 9
Command
Number
I.R. Code
Function
C1
C2
C3
C4
C5
C6
0
0
0
0
0
0
0
End to Transmission
1
2
3
4
5
6
1
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Power On/Off
Mute On/Off
Memory 1
Memory 2
Memory 3
Memory 4
7
8
9
10
11
12
1
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
Fine Detuning Up
Fine Detuning Down
Memory 5
Memory 6
Memory 7
Memory 8
13
14
15
16
17
18
1
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
Memory Up
Memory Down
Memory 9
Memory 10
Memory 11
Memory 12
19
20
21
22
23
24
1
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
Manual Search Up
Manual Search Down
Memory 13
Memory 14
Memory 15
Memory 16
25
26
27
28
29
30
1
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Volume Up
Volume Down
Memory Addressing
Digital AFT On
Band Sequential
Automatic Search
}
Mute
491B-04.TBL
- check of the position of the received bits opening
window at the time bases
- check of the parity bit
- check of the absenceof pulses between the parity
bit and the stop pulse
- check of noise level ; the receiver checks parasitic
transients inside and outside the time windows.
If the above test conditions are not fulfilled, the
received word is rejected and not decoded. If the
received signal is acknowledged as a valid word it
is stored an decoded.
The end of transmission will be acknowledged by
receiving the end of transmission code or by means
of an internal timer if the transmission remains
interrupted for more than about 550ms.
PINS 12 & 13 : AFT1-AFT2 (STOP/AFT INPUTS)
These pins are enabled during the automatic
search and during normal operation, when the
digital AFT is enabled (see description of Pin 17).
The STOP/AFT inputs are also disabled internally
during any program or band change for the duration
of the Mute signal.
M491B
8/16
M491B Pin 12
TDA4433 Pin 2
M491 B Pin 13
TDA4433 Pin 6
Function
(referred to the tuning voltage)
H
L
L
H
L
H
L
H
Up
Down
Middle
No Operation
461B-05.TBL
These pins work according to the truth table given below :
These inputs have two different functions depend-
ing on whether the system is in the search or in
normal operation (AFT control).
The inputs have internal pull-up resistors of 30k
typ.
A) Search mode : after depressing the Automatic
search or preset keys, the levels of the signals
coming from the TDA4433, applied to these
pins, control the search function and determine
when the search must stop, i.e. a TV stationhas
been recognized.
The circuit operates in the following sequence
(see Figure 10 for reference) :
1 - after pressing the search start key the
search occurs in the FAST UP mode.
2 - eventual transitions available on these
inputs are ignored during the first 15 search
steps if the system is in the UHF or CATV
bands.
If the system operates in VHF I and III bands,
the first 60 search steps are ignored. The
acceptance delay of 15 (60) search steps has
been introduced to prevent the system from
stopping at the previous station.
Aft er this time the FAST UP speed is
automatically reduced to half during each UP
signal (MEDIUM UP = FAST UP/2).
A DOWN signal preceded by at least an UP
signal will set the search to MEDIUM DOWN
mode (FAST UP/4).
3 - the next UP signal will switch the search to
SLOW UP speed (61Hz).
At this point the systems is in normal AFT
operation.
B) Digital AFT operation : when a station is
perfectly tuned, the input signals coming from
TDA4433 are at middle condition.
If the tuning moves lower than the threshold
below 38.9MHz, the Pin 12 is put H and Pin 13
is put L ; the 13 bit internal counter is moved
SLOW UP speed to increase the varicap
voltage.
When a detuning occurs in the opposite
direction the input 12 goes Low and 13 goes
High and the tuning voltage falls at VERY
SLOW DOWN speed (7.6Hz).
The increase or decrease of the tuning voltage
is stopped as soon as the input returns to
middle conditions.
Therefore during normal operation Pins 12 and
13 act as digital AFT control commands.
C) Recall from memory : when the digital AFT is
enabled and data is recalled from Memory, a
fixed value of 8 steps (
31.2mV) is subtracted
from the tuning voltage.
This corresponds to a detuning of 0.6MHz
(UHF) and of 0.3MHz in VHF III into that part of
the IF response curve which corresponds to the
fully transmitted sideband.
At this point the AFT operation takes over as
described in point B above and the exact tuning
is achieved in about 0.2 sec.
This feature increases the AFT capture range
and fullfills the stability requirements of the
tu ne r, vol tage refere nces and the D/A
converter.
If the Digital AFT is disabled (Pin 17 at V
SS
), the
memory content is read without any change.
M491B
9/16
34
35
36
37
38MHz
38.8
40MHz
NORMAL AFC POSITION
t
TRANSMITTER
IDENTIFICATION
39
Pin 6
Pin 2
SEARCH
DIRECTION
SIGNALS
ON
TDA4433
SEARCH
START
FAST UP
S1
MEDIUM UP
S2 = 0.5 S1
MEDIUM DOWN
S3 = 0.25 S1
SLOW UP
S3 = 67Hz
38.8
VARICAP VOLTAGE
139.0MHz
38.8MHz
AFC
THESHOLD
DIGITAL
INFORMATION
STOP
t
IF
RESPONSE
NORMAL AFC
OPERATION
38.8
MHz
40
39
491B-12.EPS
Figure 10
PIN 14 : SWEEP SEARCH DISPLAY OUTPUT
This output, which is normally Low, goes High
during automatic search automatic preset et inter-
vals of 160ms for about 40ms to blank the LED of
band display.
V
SS
BAND
LEDS
491B-13.EPS
Figure 11
PIN 15 : VOLUME D/A OUTPUT
This output delivers a square wave signal of 7.8
kHz and duty cycle variable in 63 steps. In case of
a continuous command for varying the volume, the
duty cycle is changed at the rate of the transmitted
signal (approximately every 102ms with f
ref
=
500kHz) or every 112ms if issued locally.
Overflow and underflow protection are provided.
The volume output can be switched to V
SS
and
reset to the previous level by means of the Mute
On/Off command. It is also reset by the Volume
Up/Down and the Mains On/Off commands.
The volume is muted for about 1s at each mains
on and off command during the power on reset time
and program change (0.5s).
At the first power on reset of V
DD
the volume D/A
is set at the level 21/64. The last level is preserved
until V
DD
is not removed.
M491B
10/16
1sec
LINEAR AFT
DEFEAT OUTPUT
MAN UP/DOWN
KEY PRESSED
MAN UP/DOWN
KEY RELEASED
491B-14.EPS
Figure 12
PIN 16 : LINEAR AFT DEFEAT OUTPUT
This output is normally High and goes Low when a
Manual Up/Down command is issued.
It returns High with a 1 second delay from the
release of the key, in order to give the user the
possibility of the tuning adjustment without the AFT
intervention. It goes Low for 0.5s during program
change.
20
MEMORY
UP
DIGITAL
AFT ON
BAND
SEQ.
BAND
I
MEMORY
DOWN
AUTOMATIC
SEARCH
POWER
ON/OFF
BAND
III
VOLUME
UP
BAND
UHF
MAN SEARCH
DOWN
MAN SEARCH
UP
FT.
DOWN
FT.
UP
VOLUME
DOWN
BAND
CATV
19
18
AUTOMATIC
PRESET
MEMORY
ADDRESSING
STORE
MUTE
23
22
21
24
V1
V2
V3
X1
X2
X3
X4
491B-15.EPS
Figure 13
PIN 17 : DIGITAL AFT ENABLE INPUT
If this input is connected to V
SS
(GND), the digital
AFT loop is always disabled. If pin 17 is left open
or is connected to V
DD
, the digital AFT is automat-
ically enabled at po wer on. When a manual
up/down search commandis issued, the digitalAFT
loop is disabled and the digital AFT status output is
inhibited.
The digital AFT loop is restored by the commands:
Digital AFT on/Automaticsearch/Automatic preset.
PINS 18-19-20-21-22-23-24 :
KEYBOARD MATRIX (see Figure 13)
A command is accepted if the corresponding con-
tact has been closed for a minimum time of 30ms.
Local input commands and I.R. commands have
the same priority.
If a complete I.R. command has been received, the
local inputs are blocked until the command has
been executed and the "end of transmission code"
generated.
Viceversa an I.R. signal cannot be decoded until
an issued local command has been executed.
MEMORY UP/DOWN
Depressing one of these two commands, the mem-
ory position is stepped in the UP or DOWN direc-
tion.
If the key is kept closed, the channels are stepped
UP/DOWN every 0.5 second or every 5 commands
from the transmitter.
The memory locations 9 to 16 are jumped if pin 31
is at GND level.
BAND SELECTION
The bands can be selected either directly or with a
step-by-step command in the following sequence :
VHF I
CATV
VHF III
UHF
VHF I and so on
Only one band change is performed at each ac-
cepted command.
Disabled bands are automatically skipped. A band
can be disabled connecting the corresponding out-
put to V
SS
.
M491B
11/16
SEARCH MODES
4 modes are available :
a) Automatic search
(digiatl AFT)
b) Automatic preset
c) Manual up/down (digital and linear AFT)
d) Manual up/down (linear AFT)
a) AUTOMATIC SEARCH. The search starts from
the actual tuning and band position. During the
search the tuning voltage is always changing from
lower to higher voltage levels. When the end of the
band is reached the search restarts from the begin-
ning of the next band after a 480 ms interruption
with the sequence of step-by-step band selection.
Disabled bands are automatically skipped.
The search is stopped when the first station is
found or if a channel selection command is given.
Stop of the automatic search is determined by the
STOP/AFT inputs controlled by the TDA4433 which
converts the AFC-S-curve into an up/down com-
mand.
At the end of the search the up/down command
controls the correct tuning acting on the counter of
the voltage synthesizer (Digital AFT).
It is important to call the attention to the Digital AFT
capture range which is larger than the normal linear
AFT as shown in fig. 14.
LINEAR AFT
CAPTURE RANGE
DIGITAL AFT
CAPTURE RANGE
491B-16.EPS
Figure 14
Additionally the use of the Digital AFT allows stor-
age of the tuning information corresponding to the
zero point of the AFC-S-curve. This cannot be
guaranteed using the Linear AFT method only. The
latter is a cheaper system, because it does not
require the use of the TDA4433 but it cannot guar-
antee what described above.
As a result of the use of the Digital AFT, the require-
ments for stability of the tuner, of the reference
voltage source and of stability of the D/A converter
are less critical.
Tuning speed in automatic search, if no station is
found is :
VHF I
8 second
VHF III
8 second
UHF
32 second
CATV
32 second
The tuning and band information can be stored
using the store/memory addressing command.
The search can be stopped by a memory selection
command.
b) AUTOMATIC PRESET. The search starts from
the lowest memory address, tuning voltage and
VHF I band as described in automatic search
mode.
When an active station is encountered, the corre-
sponding tuning and band information is automat-
ically stored in the Non-Volatile Memory.
Afterwards the system starts to search for the next
station. The cycle is repeated until all bands have
been scanned or the tuning information has been
stored into all address locations. After completing
this cycle the system reads out the tuning informa-
tion of the lowest address.
c) MANUAL UP/DOWN WITH DIGITAL AND LIN-
EAR AFT (pin 17 at V
DD
). Holding one of these
commands pressed, the tuning voltage is in-
creased or decreased.
During this operation, the Digital AFT is automat-
ically defeated and can only be reconnected with
the "AFT on" command or by an Automatic search
or preset command.
The search speed is kept at minimum (there is no
increment with the time)
Band
Sweep Timefor the
Complete Band
Number of Tuning
Steps/Second
VHF I
VHF III
UHF
CATV
seconds
128 seconds
128 seconds
512 seconds
512
16
64
64
16
In case of command received from remote control,
the counter is increased/decreased every two re-
ceived commands.
No band switching is provided at the upper or lower
tuning positions.
The volume is automatically muted 3 second after
the key pressure is immediately restored at the
release of the key.
d) MANUAL UP/DOWN WITH LINEAR AFT (pin 17
at V
SS
). When this control is used the Digital AFT
is disabled.
The Linear AFT output goes low after an up or down
command is issued and remains Low for 1 second
after the release of the key.
M491B
12/16
The volume is automatically muted for 3 seconds
after the key pressure and is immediately restored
at the release of the key.
Tuning speeds are as follows :
- FINE TUNING UP/DOWN
See description of pin 4.
- DIGITAL AFT ON
See description of pin 17.
- VOLUME UP/DOWN
See description of pin 15.
- MAINS ON/OFF
See description of pins 25 and 26.
Band
Number of Tuning Steps Second
Time 0
After 1 s
After 2 s
After 3 s
VHF I
VHF III
UHF
CATV
64
64
16
16
128
128
32
32
256
256
64
64
512
512
128
128
491B-06.TBL
STORE COMMANDS
2 modes of operations are available.
a)store
b)memory addressing
In order to protect the memory, the store function
is internally disabled after one store cycle.
It is enabled after a program change or a tuning
operation (it is not disabled by the Digital AFT
control).
a) STORE. The tuning information (Tuning D/A,
Fine tuning D/A and band) is stored in a previously
selected memory address when this command is
issued.
b) MEMORY ADDRESSING. The tuning informa-
tion can also be stored with this command followed
by the memory position selection.
When this command is accepted all the memory
LEDs are blanked.
Selection of the memory position initiates the store
operations and restores the display.
MUTE ON/OFF
See description of pin 15.
PIN 25 : MAINS ON OPTION INPUT
If connected to V
SS
(GND) the Mains output is
automatically switched on when V
DD
is applied and
memory 1 is read.
If it is connected to V
DD
the circuit goes in stand by
condition.
PIN 26 : MAINS ON/OFF OUTPUT
Switch on of the set is controlled by the Mains on
command issued for more than 0.3 s. The output
transistor is set in the off condition to drive through
an integrated pull-up resistor, an external NPN
transistor.
+5V
491B-17.EPS
Figure 15
At each Mains on command a memory read out
occurs. AV
PP
(+ 25 V) is required for this operation,
a 1 second delay starts when the mains output is
switched off. For a correct reading of the memory
the V
PP
supply voltage must reach the value of 25
V within 1 second after a Mains on command.
In case of automatic switch on at power on caused
by pin 25 at GND, the total delay is of 1.13 second
(0.13s for V
DD
power on reset plus 1 second for
mains on).
The Mains on/off command, if repeated, will switch
the output on (set off).
The last address information is preserved until V
DD
is present.
Next Mains on command will switch the set at the
previously selected memory address and a read
operation will be performed.
PINS 27-28-29-30-33-34-35-36 :
MEMORY ADDRESS OUTPUT
These pins operate as output only for display of the
selected memory location. Max drive capability is
of 15 mA/1.2 V with the exception of pin 36 that is
of 30 mA/1.5 V.
Direct memory selection is only possible by remote
control. A local memory up/down command is avail-
able in case of emergency.
Pin 32 must be grounded.
If pin 31 is grounded, the memory position 9 to 16
are skipped in case of memory up/down com-
mands.
For normal operation pin 31 can be left open or,
better, connected to V
DD
.
PINS 31-32
See description of pins 27 to 30 and 33 to 36.
PINS 37-38-39-40 : BAND INPUT/OUTPUT
These outputs are provided to select up to 4 bands
via external PNPs.
If one or more bands have to be skipped, the
corresponding outputs have to be short-circuited to
V
SS
.
M491B
13/16
max. 13.2V
The relation between pins and bands are as follows :
Pin 37 = UHF
Pin 38 = CATV
Pin 39 = VHF III
Pin 40 = VHF I
491B-18.EPS
Figure 16
26
V
DD
491B-20.EPS
Output Push-pull
V
DD
Pins 12, 13, 17
18, 19, 20, 25, 31
491B-21.EPS
Inputs with Pull-up Load
Pins 37, 38, 39, 40, 21, 22, 23, 24
(21, 22, 23, 24 are used only for testing purposes)
491B-22.EPS
Inputs/Outputs (std)
Pins 3, 4, 5, 6, 14, 15, 16, 30, 33, 34, 35, 36
491B-19.EPS
Output Open Drain
8
7
V
DD
491B-23.EPS
Oscillator
V
DD
11
491B-24.EPS
IR Input
INPUT/OUTPUT CONFIGURATION
M491B
14/16
M491B
2
3
11
14
18
19
20
32
37
38
39
40
TDA2320
or
8160
M708
445
to
510MHz
15
16
17
26
27
28
29
30
33
34
35
36
+
12V
+
5V
4.7nF
2.2k
4.7k
6.8
k
BC297
22
µ
F
82
k
5.6
k
1%
1.6
k
1%
R1
33V
TAA550
B
R2
100nF
47
pF
3.9k
3.3k
B
SX93
or
2N3903
5
9
31
25
+
5V
1.5
k
1
2
3
4
5
6
7
8
9
21
22
23
24
7
500kHz
8
1
10
100
pF
100
pF
33k
33k
150n
F
5
6k
100nF
82k
10
0nF
TUNING
V
OLTAGE
HIG
H
VOLT
AGE
8.2k
8.2k
8.2k
10
k
BC177
10
k
BC177
10
k
BC177
I
III
UHF
0.68k
5.6k
+12V
+12V
+12V
BC108
ON/OFF
R
ELAY
VOLUME
10
µ
F
22k
LINEAR
AFT
DEFEAT
LOCAL
COMMANDS
1
-
Memo
ry
Up
2
-
Memory
Down
3
-
Search
Up
4
-
Search
Down
5
-
Band
Sequential
6
-
Power
On/Off
7
-
Volume
Up
8
-
Volume
Down
9
-
Store
R2
=
R1/4
R1(k
)
=
11mA
H
V
(V)
-
33V
7
x
0.68k
0.33
k
491B-25.EPS
TYPICAL APPLICATION
Manual Search with Linear AFT (16 memory option)
M491B
15/16
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility
for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result
from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics.
Specifications mentioned in this publication are subject to change without noti ce. This publication supersedes and replaces all
information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life
support devices or systems without express written approval of SGS-THOMSON Microelectronics.
©
1994 SGS-THOMSON Microelectronics - All Rights Reserved
Purchase of I
2
C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips
I
2
C Patent. Rights to use these components in a I
2
C system, is granted provided that the system confo rms to
the I
2
C Standard Specifications as defined by Philips.
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco
The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
40
I
a1
L
b2
e
D
e3
F
b1
E
21
1
20
b
PM-DIP40.EPS
PACKAGE MECHANICAL DATA
40 PINS - PLASTIC DIP
Dimensions
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
a1
0.63
0.025
b
0.45
0.018
b1
0.23
0.31
0.009
0.012
b2
1.27
0.050
D
52.58
2.070
E
15.2
16.68
0.598
0.657
e
2.54
0.100
e3
48.26
1.900
F
14.1
0.555
i
4.445
0.175
L
3.3
0.130
DIP40.TBL
M491B
16/16