RX Gain Control Amplifier
Description
CXA3201AN is an RX gain control amplifier suitable
for CDMA cellular/PCS phone.
Features
· Wide gain control range
· Linear gain slope
· Wideband operation (50MHz to 300MHz)
· Very small package (16 Pin SSOP)
· Low voltage operation
· Two input ports
· Power save function included
Absolute Maximum Ratings
· Supply voltage
V
CC
6
V
· Operating temperature
Topr 55 to +125 °C
· Storage temperature
Tstg 65 to +150 °C
· Allowable Power dissipation P
D
330
mW
· Supply voltage range
0.3 to 6
V
· Logic input voltage
0.3 to V
CC
+ 0.3 V
· Signal input voltage
0.3 to V
CC
+ 0.3 V
· Differential signal input voltage
0 to 2.5
V
Operating Condition
Supply voltage
V
CC
2.7 to 3.8
V
Applications
CDMA cellular/PCS phone
Structure
Bipolar silicon monolithic IC
1
E98909A8Y
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXA3201AN
16 pin SSOP (Plastic)
2
CXA3201AN
Block Diagram
Pin Configuration
SWITCH
OUT
OUTX
CDMA IN
CDMA INX
FM IN
FM INX
MODE
GCTL
V
CC
1, 2
GND
PSV
IF Input for CDMA
IF Input for FM
Input Select
Gain control
Supply Voltage
Ground
Power Save
IF Output
Bias
Driver
16
GCTL
15
V
CC
1
14
V
CC
1
13
V
CC
2
12
GND
11
GND
10
OUTX
9
OUT
1
CDMA IN
2
CDMA INX
3
GND
4
FM IN
5
FM INX
6
GND
7
MODE
8
PSV
3
CXA3201AN
Pin
No.
Symbol
Pin voltage
TYP (V)
Equivalent circuit
Description
2k
GND
2k
2
1
V
CC
1
3
6
11
12
GND
Ground.
0
1
CDMA IN
Differential input pins for received
CDMA IF signal.
2
CDMA INX
1.15
1.15
Pin Description
7
MODE
Input select pin.
CDMA IN for High FM IN for Low.
--
GND
7
V
CC
1
30k
8
PSV
Power save function pin.
High: Active
Low: Power save
--
GND
V
CC
1
135k
8
2k
2k
V
CC
1
4
5
GND
4
FM IN
Differential input pins for received
FM IF signal.
5
FM INX
1.15
1.15
4
CXA3201AN
Pin
No.
Symbol
Pin voltage
TYP (V)
Equivalent circuit
Description
GND
V
CC
2
12.3k
12.3k
460
460
9
10
13
V
CC
2
Positive power supply for output
stage.
3.0
14
15
V
CC
1
Positive power supply.
3.0
9
OUT
Differential output pins for received
CDMA IF signal.
Open collector output.
10
OUTX
--
--
16
GCTL
Gain control pin.
--
GND
V
CC
1
6k
6k
16
8k
8k
200
5
CXA3201AN
1
Adjust GCTL voltage, and set the overall gain to 40dB.
Electrical Characteristics
DC Characteristics
Current consumption 1
Current consumption 2
Input current pin 7H
Input current pin 7L
Input current pin 8H
Input current pin 8L
Input current pin 16H
Input current pin 16L
MODE high voltage
MODE low voltage
PSV high voltage
PSV low voltage
I
CC
1
I
CC
2
ImodeH
ImodeL
IpsvH
IpsvL
IgctlH
IgctlL
VmH
VmL
VpsH
VpsL
mA
µA
V
Parameter
Symbol
Conditions
Min.
Unit
Vpsv = 3.0V, Vgctl = 1.5V, Pin 13, 14
Vpsv = 0 V, Vgctl = 1.5V, Pin 13, 14
Vmode = 3.0V
Vmode = 0.5V
Vpsv = 3.0V
Vpsv = 0 V
Vgctl = 3.0V
Vgctl = 0.5V
Pin 7
Pin 7
Pin 8
Pin 8
7
10
1
15
1
2.5
2.5
Typ.
10.2
27
Max.
15
50
1
1
1
0.5
0.5
(V
CC
= 3.0V, Ta = 27°C)
AC Characteristics
Operating frequency
range
Gain CDMA2.4
Gain CDMA1.5
Gain CDMA0.6
CDMA Gain slope
Gain FM2.4
Gain FM1.5
Gain FM0.6
FM Gain slope
Input level 3rd order
intercept point
Noise Figure
Fr
G
CDMA
2.4
G
CDMA
1.5
G
CDMA
0.6
G
CLIN
G
FM
2.4
G
FM
1.5
G
FM
0.6
G
FMLIN
IIP3
NF
MHz
dB
dB/V
dB
dB/V
dBm
dB
Parameter
Symbol
Conditions
Min.
Unit
Vmode = "H", f = 210.38MHz, Vgctl = 2.4V
Vmode = "H", Vgctl = 1.5V
Vmode = "H", Vgctl = 0.6V
Vmode = "H", Gain CDMA at Vgctl = 2.0V
Gain CDMA at Vgctl = 1.0V
Vmode = "L", f = 85.38MHz, Vgctl = 2.4V
Vmode = "L", Vgctl = 1.5V
Vmode = "L", Vgctl = 0.6V
Vmode = "L", Gain FM at Vgctl = 2.0V
Gain FM at Vgctl = 1.0V
Vmode = "H", G
CDMA
= 40dB
1
f
1
= 209.38MHz, f
2
= 211.38MHz
Measure of 210.38MHz
Vmode = "H", G
CDMA
= 40dB
1
Measure of 210.38MHz
50
42
7
59
58
42
7
59
58
42
Typ.
46
3
55
61
46
3
55
61
38
5
Max.
300
50
1
51
64
50
1
51
64
8
(V
CC
= 3.0V, Ta = 27°C)
6
CXA3201AN
Measurement Circuit
1000p
1000p
180n
1.5µ
1
1
A7
V7
A8
V8
10k
A16
0.01µ
V16
A14
0.01µ
V14
1
OUTPUT
9
10
11
12
13
14
15
16
2
3
4
5
6
7
8
1
GCTL
V
CC
1
V
CC
1
V
CC
2
GND
GND
OUTX
OUT
CDMA IN
CDMA INX
GND
FM IN
FM INX
GND
MODE
PSV
CDMA
INPUT
FM
INPUT
2
3
240
1
TOKO, Inc. B5FL 616DS-1135
2
Coilcraft, Inc. 0805HS-181TKBC
3
Coilcraft, Inc. 1008CS-152XKBC
240
1000p
1000p
7
CXA3201AN
Application Circuit
1k
0.01µ
Gain Control
Voltage
0.01µ
1000p
1000p
CDMA
FM
Active
Sleep
1000p
1000p
9
10
11
12
13
14
15
16
2
3
4
5
6
7
8
1
GCTL
V
CC
1
V
CC
1
V
CC
2
GND
GND
OUTX
OUT
CDMA IN
CDMA INX
GND
FM IN
FM INX
GND
MODE
PSV
V
CC
100p
1000p
1000p
CDMA
RX IF
INPUT
FM
RX IF
INPUT
RX IF
OUTPUT
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
Must be adjusting values to result a best impedance matching between BPF filter and this IC.
8
CXA3201AN
Design Reference Values
Single ended measurement
(V
CC
= 3.0V, Ta = 27°C)
Item
Symbol
Conditions
Input resistance
Input capacitance
Output resistance
Output capacitance
Rin
Cin
Rout
Cout
Typ.
1.6
1.4
5.9
0.85
Unit
k
pF
k
pF
f = 210.38MHz, Vgctl = 1.5V
Notes on Operation
1) This IC is a wideband amplifier with wide gain control range. The decouping capacitors between GND Pin
and V
CC
Pin should be as close to the IC as possible.
2) The resistors connected to Pins 9 and 10 should be as close to the IC as possible.
3) This IC assumes the excellent characteristics when the differential input impedance between Pins 1 and 2,
Pins 4 and 5 is 500
. Refer to the Measurement Circuit for the external element settings, etc.
4) Pay attention to handling this IC because its electrostatic discharge strength is weak.
9
CXA3201AN
Sensitivity
0
Vgctl [V]
0.5
1
1.5
2
2.5
3
80
60
40
20
0
20
40
60
P
o
w
e
r
g
a
i
n
[
d
B
]
T = 40°C
T = 27°C
T = 85°C
V
CC
= 3.0V
Noise Figure
10
Power gain [dB]
0
20
30
40
50
60
0
5
10
15
20
25
N
o
i
s
e
f
i
g
u
r
e
[
d
B
]
T = 40°C
T = 27°C
T = 85°C
V
CC
= 3.0V
10
Gain Error from Room Temp
80
Power gain [dB]
0
20
40
60
6
4
2
2
4
6
G
a
i
n
e
r
r
o
r
[
d
B
]
T = 40°C
T = 85°C
V
CC
= 3.0V
0
60
40
20
IIP3
80
Power gain [dB]
60
20
0
20
40
60
60
50
40
30
20
10
0
I
I
P
3
[
d
B
m
]
T = 40°C
T = 27°C
T = 85°C
V
CC
= 3.0V
40
10
CXA3201AN
Package Outline
Unit: mm
16PIN SSOP (PLASTIC)
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE MASS
EPOXY RESIN
SOLDER / PALLADIUM
42/COPPER ALLOY
0.1g
SSOP-16P-L01
SSOP016-P-0044
5.0 ± 0.1
0.65
0.22 0.05
+ 0.1
8
1
9
16
4
.
4
±
0
.
1
6
.
4
±
0
.
2
0.1 ± 0.1
0
.
5
±
0
.
2
0° to 10°
0.15 0.02
+ 0.05
1.25 0.1
+ 0.2
A
DETAIL A
0.1
PLATING
NOTE: Dimension "
" does not include mold protrusion.
0.13 M
NOTE : PALLADIUM PLATING
This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame).
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