1
EDS-101189 Rev E
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions.
Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza
Microdevices product for use in life-support devices and/or systems.
Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved.
http://www.sirenza.com
Phone: (800) SMI-MMIC
303 S. Technology Court, Broomfield, CO 80021
0
5
10
15
20
25
30
35
0
2
4
6
8
10
12
3v, 20mA
5v, 40mA
Frequency (GHz)
Gain, Gmax (dB)
Typical Gain Performance
Sirenza Microdevices' SPF-2086T is a high performance
0.25
µm pHEMT Gallium Arsenide FET with Schottky barrier
gates. This 300
µm device is ideally biased at 3V,20mA for lowest
noise performance and battery powered requirements. At
5V,40mA the device delivers excellent output TOI of 32 dBm.
It provides ideal performance as driver stages in many
commercial, industrial and military LNA applications.
Product Description
Gmax
Gain
SPF-2086T
Low Noise pHEMT GaAs FET
0.1 - 12 GHz Operation
Product Features
·
22 dB Gmax at 1.9 GHz
·
0.4 dB F
MIN
at 1.9 GHz
·
+32 dBm Output IP3
·
+20 dBm Output Power at 1dB Compression
Applications
·
LNA for Analog and Digital Wireless Systems
·
3G, Cellular, PCS
·
Fixed Wireless, Pager Systems
·
Driver Stage for low power applications
l
o
b
m
y
S
C
°
5
2
=
T
,
s
c
i
t
s
i
r
e
t
c
a
r
a
h
C
e
c
i
v
e
D
V
S
D
I
,
V
3
=
Q
D
)
d
e
t
o
n
e
s
i
w
r
e
h
t
o
s
s
e
l
n
u
(
A
m
0
2
=
n
o
i
t
i
d
n
o
C
t
s
e
T
d
e
t
s
e
T
%
0
0
1
=
]
1
[
s
t
i
n
U
.
n
i
M
.
p
y
T
.
x
a
M
x
a
m
G
n
i
a
G
e
l
b
a
l
i
a
v
A
m
u
m
i
x
a
M
Z
S
Z
=
S
Z
,
*
L
Z
=
L
*
z
H
G
9
.
0
=
f
z
H
G
9
.
1
=
f
]
1
[
z
H
G
0
.
4
=
f
]
1
[
z
H
G
0
.
2
1
=
f
B
d
B
d
B
d
B
d
-
-
8
.
6
1
4
.
8
2
.
5
2
8
.
1
2
7
.
8
1
3
.
9
-
-
-
-
S
1
2
n
i
a
G
n
o
i
t
r
e
s
n
I
Z
S
Z
=
L
s
m
h
O
0
5
=
]
1
[
z
H
G
9
.
1
=
f
B
d
0
.
6
1
7
.
7
1
4
.
9
1
F
N
I
M
e
r
u
g
i
F
e
s
i
o
N
m
u
m
i
n
i
M
Z
S
=
T
P
O
Z
,
L
Z
=
T
P
O
L
z
H
G
1
=
f
z
H
G
2
=
f
z
H
G
4
=
f
z
H
G
6
=
f
B
d
B
d
B
d
B
d
-
-
-
-
3
.
0
4
.
0
5
.
0
7
.
0
-
-
-
-
3
P
I
O
t
n
i
o
P
t
p
e
c
r
e
t
n
I
r
e
d
r
O
d
r
i
h
T
t
u
p
t
u
O
Z
S
Z
=
T
P
O
S
Z
,
L
Z
=
T
P
O
L
V
S
D
I
,
V
0
.
5
=
Q
D
A
m
0
4
=
V
S
D
I
,
V
0
.
3
=
Q
D
A
m
0
2
=
m
B
d
m
B
d
-
-
2
3
8
2
-
-
B
d
1
P
t
n
i
o
P
n
o
i
s
s
e
r
p
m
o
C
B
d
1
t
u
p
t
u
O
Z
S
Z
=
T
P
O
S
Z
,
L
Z
=
T
P
O
L
V
S
D
I
,
V
0
.
5
=
Q
D
A
m
0
4
=
V
S
D
I
,
V
0
.
3
=
Q
D
A
m
0
2
=
m
B
d
m
B
d
-
-
0
2
5
1
-
-
I
S
S
D
t
n
e
r
r
u
C
n
i
a
r
D
d
e
t
a
r
u
t
a
S
V
S
D
V
=
P
S
D
V
,
S
G
V
0
=
A
m
0
3
5
8
0
4
1
g
m
:
e
c
n
a
t
c
u
d
n
o
c
n
a
r
T
V
S
D
V
=
P
S
D
V
,
S
G
V
5
2
.
0
-
=
S
m
-
2
1
1
-
V
P
:
e
g
a
t
l
o
V
f
f
O
-
h
c
n
i
P
V
S
D
I
,
V
0
.
2
=
S
D
0
5
1
=
µA
]
1
[
V
5
.
1
-
0
.
1
-
5
.
0
-
V
B
S
G
e
g
a
t
l
o
V
n
w
o
d
k
a
e
r
B
e
c
r
u
o
S
-
o
t
-
e
t
a
G
I
S
G
n
e
p
o
n
i
a
r
d
,
A
m
3
.
0
=
]
1
[
V
-
7
1
-
8
-
V
B
D
G
e
g
a
t
l
o
V
n
w
o
d
k
a
e
r
B
n
i
a
r
D
-
o
t
-
e
t
a
G
I
D
G
V
,
A
m
3
.
0
=
S
G
V
0
.
3
-
=
]
1
[
V
-
7
1
-
8
-
h
t
R
d
a
e
l
-
o
t
-
n
o
i
t
c
n
u
j
,
e
c
n
a
t
s
i
s
e
R
l
a
m
r
e
h
T
o
W
/
C
-
0
1
1
-
http://www.sirenza.com
Phone: (800) SMI-MMIC
2
EDS-101189 Rev E
303 S. Technology Court, Broomfield, CO 80021
SPF-2086T Low Noise FET
Noise parameters, at typical operating frequencies
F
REQ
H
G
Z
F
MIN
B
d
|G
OPT
|
G
OPT
A
NG
r
N
W
G
A
B
d
0
.
1
8
2
.
0
4
7
.
0
7
1
2
2
.
0
1
.
3
2
0
.
2
4
4
.
0
9
6
.
0
1
3
8
1
.
0
8
.
7
1
0
.
4
4
5
.
0
4
5
.
0
4
8
9
0
.
0
9
.
3
1
0
.
6
0
7
.
0
8
2
.
0
9
7
1
5
0
.
0
2
.
2
1
Bias V
DS
=3.0V, I
DS
=20mA
F
REQ
H
G
Z
F
MIN
B
d
|G
OPT
|
G
OPT
A
NG
r
N
W
G
A
B
d
0
.
1
4
3
.
0
6
7
.
0
9
1
7
2
.
0
9
.
3
2
0
.
2
5
5
.
0
7
6
.
0
6
3
3
2
.
0
1
.
9
1
0
.
4
5
7
.
0
7
4
.
0
3
9
1
1
.
0
0
.
5
1
0
.
6
4
0
.
1
1
3
.
0
0
7
1
-
6
0
.
0
9
.
2
1
Bias V
DS
=5.0V, I
DS
=40mA
Operation of this device beyond any one of these
parameters may cause permanent damage.
MTTF is inversely proportional to the device junction
temperature. For junction temperature and MTTF
considerations the operating conditions should also
satisfy the following experssions:
P
DC
- P
OUT
< (T
J
- T
L
) / R
TH
where:
P
DC
= I
DS
* V
DS
(W)
P
OUT
= RF Output Power (W)
T
J
= Junction Temperature (°C)
T
L
= Lead Temperature (pin 4) (°C)
R
TH
= Thermal Resistance (°C/W)
Absolute Maximum Ratings
r
e
t
e
m
a
r
a
P
l
o
b
m
y
S
e
u
l
a
V
t
i
n
U
n
i
a
r
D
t
n
e
r
r
u
C
I
S
D
I
S
S
D
A
m
e
t
a
G
d
r
a
w
r
o
F
t
n
e
r
r
u
C
I
F
S
G
3
.
0
A
m
t
n
e
r
r
u
C
e
t
a
G
e
s
r
e
v
e
R
I
R
S
G
3
.
0
A
m
e
c
r
u
o
S
-
o
t
-
n
i
a
r
D
e
g
a
tl
o
V
V
S
D
7
+
V
n
i
a
r
D
-
o
t
-
e
t
a
G
e
g
a
tl
o
V
V
D
G
8
-
V
e
c
r
u
o
S
-
o
t
-
e
t
a
G
e
g
a
tl
o
V
V
S
G
0
>
r
o
5
-
<
V
r
e
w
o
P
t
u
p
n
I
F
R
P
N
I
0
0
1
W
m
e
r
u
t
a
r
e
p
m
e
T
g
n
it
a
r
e
p
O
T
P
O
5
8
+
o
t
0
4
-
C
°
e
g
n
a
R
e
r
u
t
a
r
e
p
m
e
T
e
g
a
r
o
t
S
T
r
o
t
s
0
5
1
+
o
t
0
4
-
C
°
n
o
it
a
p
i
s
s
i
D
r
e
w
o
P
P
S
I
D S
0
0
6
W
m
e
r
u
t
a
r
e
p
m
e
T
l
e
n
n
a
h
C
T
J
+
0
5
1
C
°
http://www.sirenza.com
Phone: (800) SMI-MMIC
3
EDS-101189 Rev E
303 S. Technology Court, Broomfield, CO 80021
SPF-2086T Low Noise FET
Scattering Parameters:
z
H
G
q
e
r
F
|
1
1
S
|
g
n
A
1
1
S
|
1
2
S
|
g
n
A
1
2
S
|
2
1
S
|
g
n
A
2
1
S
|
2
2
S
|
g
n
A
2
2
S
5
.
0
7
9
.
0
5
.
7
1
-
7
0
.
8
9
.
2
6
1
1
0
.
0
5
.
5
5
6
6
.
0
0
.
0
1
-
0
.
1
2
9
.
0
2
.
4
3
-
6
7
.
7
1
.
6
4
1
3
0
.
0
8
.
2
7
4
6
.
0
9
.
8
1
-
5
.
1
5
8
.
0
9
.
0
5
-
0
4
.
7
4
.
0
3
1
4
0
.
0
9
.
2
6
1
6
.
0
5
.
7
2
-
0
.
2
6
7
.
0
2
.
9
6
-
6
0
.
7
9
.
4
1
1
5
0
.
0
7
.
2
5
7
5
.
0
6
.
6
3
-
5
.
2
7
6
.
0
6
.
9
8
-
7
6
.
6
4
.
9
9
6
0
.
0
3
.
5
4
1
5
.
0
7
.
6
4
-
0
.
3
8
5
.
0
6
.
9
0
1
-
6
1
.
6
3
.
5
8
6
0
.
0
6
.
9
3
7
4
.
0
4
.
5
5
-
5
.
3
1
5
.
0
5
.
8
2
1
-
4
6
.
5
4
.
2
7
7
0
.
0
2
.
3
3
4
4
.
0
2
.
2
6
-
0
.
4
6
4
.
0
4
.
6
4
1
-
6
1
.
5
5
.
0
6
8
0
.
0
3
.
7
2
2
4
.
0
0
.
8
6
-
5
.
4
2
4
.
0
0
.
5
6
1
-
4
7
.
4
3
.
9
4
8
0
.
0
0
.
3
2
9
3
.
0
9
.
3
7
-
0
.
5
0
4
.
0
1
.
5
7
1
7
3
.
4
2
.
8
3
9
0
.
0
9
.
8
1
6
3
.
0
1
.
1
8
-
5
.
5
1
4
.
0
0
.
5
5
1
4
0
.
4
3
.
7
2
9
0
.
0
6
.
4
1
2
3
.
0
9
.
0
9
-
0
.
6
4
4
.
0
1
.
7
3
1
1
7
.
3
7
.
6
1
0
1
.
0
5
.
9
9
2
.
0
9
.
2
0
1
-
5
.
6
8
4
.
0
1
.
3
2
1
3
4
.
3
6
.
6
0
1
.
0
3
.
5
6
2
.
0
7
.
5
1
1
-
0
.
7
1
5
.
0
6
.
1
1
1
8
1
.
3
9
.
2
-
0
1
.
0
2
.
1
3
2
.
0
5
.
8
2
1
-
5
.
7
4
5
.
0
5
.
1
0
1
6
9
.
2
9
.
1
1
-
1
1
.
0
1
.
2
-
1
2
.
0
7
.
1
4
1
-
0
.
8
7
5
.
0
8
.
1
9
5
7
.
2
0
.
1
2
-
1
1
.
0
6
.
5
-
0
2
.
0
2
.
6
5
1
-
5
.
8
0
6
.
0
7
.
3
8
5
5
.
2
5
.
9
2
-
2
1
.
0
3
.
9
-
9
1
.
0
9
.
0
7
1
-
0
.
9
3
6
.
0
5
.
7
7
0
4
.
2
4
.
7
3
-
2
1
.
0
0
.
3
1
-
0
2
.
0
1
.
2
7
1
5
.
9
6
6
.
0
4
.
1
7
6
2
.
2
8
.
5
4
-
3
1
.
0
5
.
7
1
-
2
2
.
0
7
.
4
5
1
0
.
0
1
9
6
.
0
3
.
6
6
3
1
.
2
0
.
4
5
-
4
1
.
0
1
.
2
2
-
4
2
.
0
5
.
0
4
1
5
.
0
1
0
7
.
0
1
.
1
6
2
0
.
2
0
.
2
6
-
4
1
.
0
8
.
6
2
-
7
2
.
0
5
.
8
2
1
0
.
1
1
1
7
.
0
7
.
5
5
2
9
.
1
9
.
9
6
-
5
1
.
0
9
.
0
3
-
9
2
.
0
0
.
9
1
1
5
.
1
1
2
7
.
0
1
.
0
5
1
8
.
1
4
.
7
7
-
5
1
.
0
0
.
5
3
-
1
3
.
0
5
.
9
0
1
0
.
2
1
5
7
.
0
0
.
5
4
0
7
.
1
6
.
4
8
-
6
1
.
0
7
.
9
3
-
3
3
.
0
8
.
9
9
5
.
2
1
6
7
.
0
3
.
0
4
0
6
.
1
7
.
1
9
-
6
1
.
0
1
.
4
4
-
5
3
.
0
3
.
0
9
0
.
3
1
7
7
.
0
4
.
6
3
1
5
.
1
6
.
8
9
-
6
1
.
0
5
.
7
4
-
9
3
.
0
2
.
1
8
5
.
3
1
7
7
.
0
9
.
2
3
7
4
.
1
0
.
6
0
1
-
7
1
.
0
7
.
1
5
-
3
4
.
0
0
.
5
7
Typical S-parameters V
DS
=3.0V, I
DS
=20 mA
Note : De-embedded to device pins
http://www.sirenza.com
Phone: (800) SMI-MMIC
4
EDS-101189 Rev E
303 S. Technology Court, Broomfield, CO 80021
SPF-2086T Low Noise FET
Scattering Parameters:
z
H
G
q
e
r
F
|
1
1
S
|
g
n
A
1
1
S
|
1
2
S
|
g
n
A
1
2
S
|
2
1
S
|
g
n
A
2
1
S
|
2
2
S
|
g
n
A
2
2
S
5
.
0
7
9
.
0
2
.
8
1
-
7
8
.
8
0
.
2
6
1
1
0
.
0
8
.
2
9
8
6
.
0
5
.
9
-
0
.
1
1
9
.
0
9
.
5
3
-
7
4
.
8
6
.
4
4
1
2
0
.
0
4
.
6
6
7
6
.
0
1
.
8
1
-
5
.
1
3
8
.
0
3
.
3
5
-
0
0
.
8
4
.
8
2
1
3
0
.
0
3
.
0
6
4
6
.
0
2
.
6
2
-
0
.
2
4
7
.
0
2
.
2
7
-
4
5
.
7
6
.
2
1
1
4
0
.
0
0
.
4
5
0
6
.
0
5
.
4
3
-
5
.
2
4
6
.
0
9
.
2
9
-
6
0
.
7
1
.
7
9
5
0
.
0
6
.
6
4
5
5
.
0
3
.
3
4
-
0
.
3
5
5
.
0
4
.
3
1
1
-
6
4
.
6
2
.
3
8
6
0
.
0
7
.
0
4
1
5
.
0
9
.
0
5
-
5
.
3
8
4
.
0
3
.
2
3
1
-
7
8
.
5
5
.
0
7
6
0
.
0
9
.
5
3
8
4
.
0
2
.
7
5
-
0
.
4
3
4
.
0
3
.
0
5
1
-
5
3
.
5
8
.
8
5
7
0
.
0
9
.
1
3
6
4
.
0
6
.
2
6
-
5
.
4
9
3
.
0
1
.
9
6
1
-
9
8
.
4
9
.
7
4
7
0
.
0
9
.
7
2
4
4
.
0
1
.
8
6
-
0
.
5
7
3
.
0
9
.
0
7
1
0
5
.
4
0
.
7
3
8
0
.
0
5
.
5
2
2
4
.
0
1
.
5
7
-
5
.
5
9
3
.
0
2
.
1
5
1
6
1
.
4
3
.
6
2
8
0
.
0
1
.
2
2
8
3
.
0
3
.
4
8
-
0
.
6
3
4
.
0
3
.
4
3
1
3
8
.
3
9
.
5
1
9
0
.
0
2
.
7
1
5
3
.
0
0
.
5
9
-
5
.
6
7
4
.
0
0
.
1
2
1
4
5
.
3
0
.
6
9
0
.
0
3
.
3
1
2
3
.
0
2
.
6
0
1
-
0
.
7
0
5
.
0
1
.
0
1
1
9
2
.
3
6
.
3
-
0
1
.
0
6
.
9
0
3
.
0
6
.
7
1
1
-
5
.
7
3
5
.
0
4
.
0
0
1
7
0
.
3
7
.
2
1
-
0
1
.
0
7
.
5
8
2
.
0
3
.
9
2
1
-
0
.
8
6
5
.
0
3
.
1
9
6
8
.
2
8
.
1
2
-
1
1
.
0
4
.
2
6
2
.
0
5
.
1
4
1
-
5
.
8
9
5
.
0
3
.
3
8
6
6
.
2
2
.
0
3
-
2
1
.
0
8
.
0
-
5
2
.
0
6
.
4
5
1
-
0
.
9
3
6
.
0
2
.
7
7
2
5
.
2
3
.
8
3
-
3
1
.
0
6
.
4
-
6
2
.
0
3
.
0
7
1
-
5
.
9
6
6
.
0
5
.
1
7
8
3
.
2
8
.
6
4
-
3
1
.
0
5
.
9
-
7
2
.
0
9
.
2
7
1
0
.
0
1
9
6
.
0
6
.
6
6
4
2
.
2
1
.
5
5
-
4
1
.
0
2
.
4
1
-
9
2
.
0
4
.
7
5
1
5
.
0
1
0
7
.
0
3
.
1
6
2
1
.
2
3
.
3
6
-
5
1
.
0
5
.
9
1
-
1
3
.
0
0
.
4
4
1
0
.
1
1
1
7
.
0
7
.
5
5
1
0
.
2
4
.
1
7
-
5
1
.
0
4
.
4
2
-
3
3
.
0
5
.
3
3
1
5
.
1
1
3
7
.
0
2
.
0
5
0
9
.
1
0
.
9
7
-
6
1
.
0
2
.
9
2
-
5
3
.
0
1
.
3
2
1
0
.
2
1
5
7
.
0
0
.
5
4
8
7
.
1
4
.
6
8
-
6
1
.
0
8
.
3
3
-
6
3
.
0
6
.
2
1
1
5
.
2
1
7
7
.
0
3
.
0
4
7
6
.
1
7
.
3
9
-
7
1
.
0
9
.
7
3
-
8
3
.
0
0
.
2
0
1
0
.
3
1
7
7
.
0
3
.
6
3
8
5
.
1
9
.
0
0
1
-
7
1
.
0
2
.
2
4
-
2
4
.
0
7
.
1
9
5
.
3
1
8
7
.
0
7
.
2
3
3
5
.
1
4
.
8
0
1
-
8
1
.
0
7
.
6
4
-
6
4
.
0
7
.
3
8
Typical S-parameters V
DS
=5.0V, I
DS
=40 mA
Note : De-embedded to device pins
http://www.sirenza.com
Phone: (800) SMI-MMIC
5
EDS-101189 Rev E
303 S. Technology Court, Broomfield, CO 80021
SPF-2086T Low Noise FET
Part Number Ordering Information
Caution: ESD sensitive
Appropriate precautions in handling, packaging and
testing devices must be observed.
r
e
b
m
u
N
t
r
a
P
e
z
i
S
l
e
e
R
l
e
e
R
/
s
e
c
i
v
e
D
T
6
8
0
2
-
F
P
S
"
7
0
0
0
1
PCB Pad Layout
n
i
P
n
o
i
t
a
n
g
i
s
e
D
1
e
t
a
G
2
e
c
r
u
o
S
3
n
i
a
r
D
4
e
c
r
u
o
S
Package Dimensions
Part Symbolization
The part will be symbolized with the "P2T"
designator and a dot signifying pin 1 on the top
surface of the package.
P2T
P2T
PDF 
ZIP