HITFET® BSP 75
Semiconductor Group
Page 1 of 9
1998-02-04
Smart Lowside Power Switch
Features
·
Logic Level Input
·
Input protection (ESD)
·
Thermal shutdown (with restart)
·
Overload protection
·
Short circuit protection
·
Overvoltage protection
·
Current limitation
Application
·
All kinds of resistive, inductive and capacitive loads in switching applications
·
µ
C compatible power switch for 12 V and 24 V DC applications
·
Replaces electromechanical relays and discrete circuits
General Description
N channel vertical power FET in Smart Power Technology. Fully protected by embedded protection functions.
protection
Overvoltage
Drain
IN
ESD
HITFET
®
Source
1
3
Over-
protection
temperature
Short circuit
protection
+
limitation
V bb
Short circuit
protection
LOAD
2
dv/dt
limitation
4
M
Current
Pin
Symbol
Function
1
IN
Input
2
DRAIN
Output to the load
3
SOURCE
Ground
TAB
SUBSTRATE
Must be connected to Pin 3
Product Summary
Continuous drain source voltage
V
DS
55
V
On-state resistance
R
DS(ON)
550
m
Current limitation
I
D(lim)
1
A
Nominal load current
I
D(Nom)
0.7
A
Clamping energy
E
AS
550
mJ
HITFET® BSP 75
Semiconductor Group
Page 2
1998-02-04
Maximum Ratings at Tj=25°C unless otherwise specified
Parameter
Symbol
Values
Unit
Continuous drain source voltage
(overvoltage protection see page 4)
V
DS
55
V
Drain source voltage for
short circuit protection
V
DS
32
V
Load dump protection
V
LoadDump
=
U
P
+
U
S
;
U
P
=13.5 V
R
I
1
)
=2
;
t
d
=400ms; IN=low or high (8V)
R
L
=50
R
I
=2
;
t
d
=400ms; IN=high (8V)
R
L
=22
V
LoadDump
2
)
80
47
V
Continuous input voltage
V
IN
-0.2 ... +10
V
Peak input voltage
V
IN
-0.2 ... +20
V
Operating temperature range
Storage temperature range
T
j
T
stg
-40 ...+150
-55 ...+150
°C
Power dissipation (DC)
P
tot
1.8
W
Unclamped single pulse inductive energy
I
D(ISO)
= 0.7 A
E
AS
550
mJ
Electrostatic discharge voltage (Human Body Model)
according to MIL STD 883D, method 3015.7 and
EOS/ESD assn. standard S5.1 - 1993
V
ESD
4000
V
DIN humidity category, DIN 40 040
E
IEC climatic category, DIN IEC 68-1
40/150/56
Thermal resistance
junction soldering point:
junction - ambient
3
)
:
R
thJS
R
thJA
10
70
K/W
1
)
R
I
=internal resistance of the load dump test pulse generator LD200
2
)
V
LoadDump
is setup without DUT connected to the generator per ISO 7637-1 and DIN 40 839.
3
) Device on epoxy pcb 40mm x 40 mm x 1.5mm with 6cm
2
copper area for pin 4 connection
HITFET® BSP 75
Semiconductor Group
Page 3
1998-02-04
Electrical Characteristics
Parameter and Conditions
Symbol
Values
Unit
at T
j
= 25 °C, unless otherwise specified
min
typ
max
Static Characteristics
Drain source clamp voltage
I
D
= 10 mA
T
j
=-40...+150°C:
V
DS(AZ)
55
--
70
V
Off state drain current
V
IN
= 0 V,
V
DS
= 32 V
T
j
=-40...+150°C:
I
DSS
--
--
5
µ
A
Input threshold voltage
I
D
= 10 mA
V
IN(th)
2
2.5
3
V
Input current
normal operation,
I
D<
I
D(lim)
:
V
IN
= 5 V
current limitation mode,
I
D
=I
D(lim)
:
after thermal shutdown,
I
D
=0 A:
I
IN(1)
I
IN(2)
I
IN(3)
--
--
1000
100
200
1500
200
300
2000
µ
A
On-state resistance
I
D
= 0.7 A, V
IN
= 5 V
T
j
=25°C:
T
j
=150°C:
R
DS(on)
--
--
550
850
675
1350
m
On-state resistance
I
D
= 0.7 A, V
IN
= 10 V
T
j
=25°C:
T
j
=150°C:
R
DS(on)
--
--
475
750
550
1000
m
Nominal load current
V
BB
= 12 V,
V
DS
= 0.5 V,
T
S
= 85°C
T
j
< 150°C
I
D(Nom)
0.7
--
--
A
Current limit
V
IN
= 10 V,
V
DS
= 12 V
I
D(lim)
1
1.5
1.9
A
Dynamic characteristics
Turn-on time
V
IN
to 90%
I
D
:
R
L
= 22
, V
IN
= 0 to 10 V, V
bb
= 12 V
t
on
--
10
20
µ
s
Turn-off time
V
IN
to 10%
I
D
:
R
L
= 22
, V
IN
= 10 to 0 V, V
bb
= 12 V
t
off
--
10
20
µ
s
Slew rate on
70 to 50% V
bb
:
R
L
= 22
, V
IN
= 0 to 10 V, V
bb
= 12 V
-d
V
DS
/dt
on
--
4
10
V/
µ
s
Slew rate off
50 to 70% V
bb
:
R
L
= 22
, V
IN
= 10 to 0 V, V
bb
= 12 V
d
V
DS
/dt
off
--
4
10
V/
µ
s
HITFET® BSP 75
Semiconductor Group
Page 4
1998-02-04
Parameter and Conditions
Symbol
Values
Unit
at T
j
= 25 °C, unless otherwise specified
min
typ
max
Protection Functions
Thermal overload trip temperature
T
jt
150
165
--
°C
Thermal hysteresis
T
jt
--
10
--
K
Unclamped single pulse inductive energy
I
D(ISO)
=0.7 A, V
bb
=32 V
Tj=25 °C
Tj=150 °C
E
AS
550
200
--
--
--
--
mJ
Inverse Diode
Continuous source drain voltage
V
IN
= 0 V,
-I
D
= 2*0.7 A
V
SD
--
1
--
V
Circuit Description
The BSP 75 is a monolithic power switch in Smart Power Technology (SPT) with a logic level
input, an open drain DMOS output stage and integrated protection functions. It is designed
for all kind of resistive and inductive loads (relays, solenoid) in automotive and industrial ap-
plications.
Protection functions
·
Overvoltage protection: An internal clamp limits the output voltage at V
DS(AZ)
(about
63 V) when inductive loads are switched off.
·
Current limitation: By means of an internal current measurement the drain current is lim-
ited at I
D(lim)
(1.4 - 1.5 A typ.). If the current limitation is active the device operates in the
linear region, so power dissipation may exceed the capability of the heatsink. This opera-
tion leads to an increasing junction temperature until the overtemperature threshold is
reached.
·
Overtemperature and short circuit protection: This protection is based on sensing the
chip temperature. The location of the sensor ensures a fast and accurate junction tem-
perature detection. Overtemperature shutdown occurs at minimum 150 °C. A hysteresis of
typ. 10 K enables an automatical restart by cooling.
The device is ESD protected according Human Body Model (4 kV) and load dump protected
(see Maximum Ratings).
HITFET® BSP 75
Semiconductor Group
Page 5
1998-02-04
Block diagram
Terms
HITFET
IN
D
VIN
I D
VDS
1
I IN
S
Vbb
RL
2
3
Input circuit (ESD protection)
IN
ESD-ZD
I
Source
ESD zener diodes are not designed for DC
current.
Inductive and overvoltage output clamp
HITFET
V
Z
D
S
V
IN
t
V
DS
V
BB
V
DS(AZ)
Turn on into overload or short circuit
V
IN
t
I
D
I
D(lim)
Shut down by overtemperature and restart by
cooling. Current internally limited at I
D(lim)
.
HITFET® BSP 75
Semiconductor Group
Page 6
1998-02-04
Maximum allowable power dissipation
P
tot
= f (T
C
)
P
tot
[W]
0
0 .2
0 .4
0 .6
0 .8
1
1 .2
1 .4
1 .6
1 .8
2
0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
T
C
[°C]
On-state resistance
R
ON
= f (T
j
); I
D
= 0.7 A; V
IN
= 5 V
R
ON
[m
]
0
2 0 0
4 0 0
6 0 0
8 0 0
1 0 0 0
1 2 0 0
1 4 0 0
-5 0
-2 5
0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
m a x.
t y p .
T
j
[°C]
On-state resistance
R
ON
= f (T
j
); I
D
= 0.7 A; V
IN
= 10 V
R
ON
[m
]
0
1 0 0
2 0 0
3 0 0
4 0 0
5 0 0
6 0 0
7 0 0
8 0 0
9 0 0
1 0 0 0
-5 0
-2 5
0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
m a x.
t y p .
T
j
[°C]
Typ. input threshold voltage
V
IN(th)
= f (T
j
); I
D
= 10 mA; V
DS
= 12 V
V
IN(th)
[V]
0
0 .5
1
1 .5
2
2 .5
3
-5 0
-2 5
0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
T
j
[°C]
HITFET® BSP 75
Semiconductor Group
Page 7
1998-02-04
Typ. on-state resistance
R
ON
= f (VIN) I
D
= 0.7 A; T
j
= 25°C
R
ON
[m
]
0
5 0 0
1 0 0 0
1 5 0 0
2 0 0 0
0
2
4
6
8
1 0
VIN [V]
Typ. short circuit current
I
D(SC)
= f (VIN); VDS=12V, T
j
= 25°C
I
D(SC)
[A]
0
0 .2
0 .4
0 .6
0 .8
1
1 .2
1 .4
1 .6
0
2
4
6
8
1 0
VIN [V]
Typ. current limitation
I
D(lim)
= f (Tj); VDS=12V, V
IN
= 10V
I
D(lim)
[A]
1
1 .1
1 .2
1 .3
1 .4
1 .5
-5 0
-2 5
0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
Tj [°C]
Transient thermal impendance
Z
thJC
= f (tp)
Parameter: D=tp/T
Z
thJC
[K/W]
1 E-2
1 E-1
1 E+ 0
1 E+ 1
1 E+ 2
1E-
6
1E-
5
1E-
4
1E-
3
1E-
2
1E-
1
1E+
0
1E+
1
1E+
2
1E+
3
1E+
4
0
0 .00 5
0 .0 1
0.0 2
0 .5
0 .2
0 .1
0 .0 5
T
tp
t
Ptot
D=
tp [s]
HITFET® BSP 75
Semiconductor Group
Page 8
1998-02-04
Application examples:
Status signal of thermal shutdown by monitoring
input current
D
S
IN
µC
V
bb
HITFET
V
IN
R St
V
IN
thermal shutdown
V
µC
HITFET® BSP 75
Semiconductor Group
Page 9
1998-02-04
Package and ordering code
all dimensions in mm
SOT223/4
Ordering code
BSP75
Q67060-S7200-A2
Definition of soldering point with temperature T
s
:
upper side of solder edge of device pin 4.
Pin 4
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