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Part Number QT60320C-AS

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APPLICATIONS -
Automotive panels
Machine tools
ATM machines
Touch-screens
Appliance controls
Outdoor keypads
Security keypanels
Industrial keyboards
The QT60320 digital charge-transfer ("QT") QMatrixTM IC is designed to detect touch on up to 32 keys in a scanned X-Y matrix. It will
project the keys through almost any dielectric, like glass, plastic, stone, ceramic, and even most kinds of wood, up to thicknesses of
5 cm or more. The touch areas are defined as simple 2-part interdigitated electrodes of conductive material, like copper,
Indium-Tin-Oxide (ITO), or screened silver or carbon deposited on the rear of the control panel. Key sizes, shapes and placement are
almost entirely arbitrary; sizes and shapes of keys can be mixed within a single panel of keys and can vary by a factor of 20:1 or more
in area. The gain (sensitivity) and threshold of each key can be set individually via simple commands over the UART port, for example
via the freeware QmBtn program. Key setups are stored internally in an onboard eeprom and do not need to be reloaded.
The IC is designed specifically to work with appliances, ATM machines, security panels, portable instruments, machine tools, or
similar products that are subject to environmental 'challenges' or even physical attack. It permits the construction of 100% sealed,
watertight keypanels that are immune to environmental factors such as humidity and condensation, temperature, dirt accumulation, or
the physical deterioration of the panel surface from abrasion, chemicals, or abuse. To this end the QT60320 contains
Quantum-pioneered self-calibration, drift compensation, and digital filtering algorithms that make the sensing function extremely
robust and survivable.
The device can readily control keys over graphical LCD panels or LEDs when used with clear, conductive ITO electrodes. It does not
require 'chip on glass' or other exotic fabrication techniques, thus allowing the OEM to source the keymatrix from multiple vendors.
External circuitry consists of an opamp, a common PLD, and a quad fet switch, which can fit into a footprint of roughly 1 square inch
(6.5 sq. cm). The device also can control two status LEDs, and includes in addition 8 addressable output drive lines and 4 readable
spare input lines which can be used to control LEDs, LCDs, or other panel functions without requiring additional control lines from the
host CPU. It also makes available to the user 86 bytes of onboard writeable and readable eeprom via the serial interface, thus helping
to reduce system cost by eliminating extra components.
QT60320 technology makes use of an important new variant of charge-transfer sensing, transverse charge-transfer, in an XY format
that minimizes the number of required scan lines. Unlike older technologies it does not require one IC per key, and is cost competitive
even with some membrane technologies. In many cases it can also replace resistive XY sense elements commonly used in touch
screens, at a fraction of the price.
This part is not recommended for new designs. Consult Quantum for advice on alternatives.
LQ
Copyright © 1999, 2001 Quantum Research Group Ltd
QT60320C R1.08/01.03
L
Q
QT60320C
NOT
RECOMMENDED
FOR
NEW
DESIGNS
32-K
EY
QM
ATRIX
TM C
HARGE
-T
RANSFER
IC
Creates 32 `touch buttons' through any dielectric
100% autocal for life - no adjustments required
'N' key rollover: senses all 32 keys in parallel
Keys individually adjustable for sensitivity
Mix 'n match key sizes & shapes in one panel
Tolerates a 20:1 variance in key sizes on a panel
Panel thicknesses to 5 cm or more
Back lit keys possible with ITO electrodes
LED status function drives
User-addressable multifunction drive pins
User-addressable internal eeprom
Simple, universal serial interface
5V single supply operation
44-pin TQFP package
One square inch (6.5 square cm) of PCB required
X5
X4
X3
X2
X1
Gnd
Vc
c
AI
N
I4
I3
I2
O2
O3
O4
L1
L2
Vcc
Gnd
Y1
Y2
Y3
Y4
X6
X7
X8
RST
Vcc
Gnd
XT2
XT1
RX
TX
O1
O5
O6
O7
O8
Vcc
AGnd
Aref
CS
CC2
CC1
I1
1
2
3
4
5
6
7
8
9
10
11
23
24
25
26
27
28
29
30
31
32
33
44 43 42 41 40 39 38 37 36
34
35
12 13 14
22
21
19 20
18
17
16
15
QT60320
QT60320C-AS
-40
0
C to +105
0
C
TQFP
T
A
AVAILABLE OPTIONS
1 - OVERVIEW
The QT60320 is a digital burst mode charge-transfer (QT)
sensor designed specifically for matrix geometry touch
controls; it includes all signal processing functions necessary
to provide stable sensing under a wide variety of changing
conditions. Only a few low cost external parts are required for
operation. The entire circuit can be built within about 1
square inch of PCB area (smt).
The 60320 uses burst-mode charge transfer methods
pioneered and patented by Quantum, including charge
cancellation methods which allow for a wide range of key
sizes and shapes to be mixed together in a single keypanel.
These features permit the construction of entirely new
classes of keypanels never before contemplated, such as
touch-sliders, back-illuminated keys, and arbitrary shape
keypanels, all at very low cost.
The QT60320 uses an asynchronous serial (uart) interface
running at 9600 baud to allow key data to be extracted and to
permit individual key parameter setup. The interface protocol
uses simple ASCII commands and responds with either
ASCII or binary results depending on the command.
In addition to normal operating and setup commands the
device can also report back actual key signal strength and
error codes. Spare eeprom memory (over 80 bytes) can also
be written to and read to save the system designer from
having to install and interface to a separate eeprom.
The IC also includes 4 readable input (I1..I4) pins and 8
settable output (O1..O4) pins which can be used in any way
desired, including to scan a secondary keypad of up to 32
contact closures. Alternatively they can be used to remotely
activate panel LEDs, buzzers, or other types of indicators.
QmBtn software for the PC can be used to program a board
containing the IC as well as read back key status and signal
levels in real time.
The QT60320 employs transverse charge-transfer ('QT')
sensing, a new technology that senses the charge forced
across an electrode set by a digital edge.
1.1 FIELD FLOWS
Figure 1-1 shows how charge is transferred across the
electrode set to permeate the overlying panel material; this
charge flow exhibits a rapid dQ/dt during the edge transitions
of the X drive pulse. The charge emitted by the X electrode is
partly received onto the corresponding Y electrode which is
then processed. The QT60320 matrix uses 8 'X' edge-driven
rows and 4 'Y' sense columns to allow up to 32 keys.
The charge flows are absorbed by the touch of a human
finger (Figure 1-2) resulting in a decrease in coupling from X
to Y; coupled charge increases in the presence of a
conductive film like water (Figure 1-3) which acts to bridge
the two elements. Increasing signals due to water films are
quite easy to discern and are not detected by the IC.
1.2 CIRCUIT MODEL
An electrical circuit model is shown in Figure 1-4. The
coupling capacitance between X and Y electrodes is
represented by Cx. While the reset switch is open, a
sampling switch is gated so that it transfers charge flows only
from the rising edge of X into the sample capacitor Cs. Cs is
a large value capacitor, typically in the range of 1 - 50nF. The
voltage rise captured on Cs after each X edge is quite small,
on the order of a millivolt, while changes due to touch are on
typically the order of 10's of microvolts. The X pulse can be
repeated in a burst consisting of up to several hundred
pulses to build up the voltage (and the change in voltage due
to touch) to a larger value. Longer bursts increase system
gain by collecting more charge; gain can thus be digitally
manipulated to achieve the required sensitivity on a
key-by-key basis during scanning.
If the voltage on Cs rises excessively it can fall outside of the
ADC's range. To reduce the voltage again without affecting
gain, one of two (or both) Cz capacitors can be switched to
L
Q
2
QT60320C R1.08/01.03
Figure 1-2 Field Flows When Touched
Figure 1-3 Fields With a Conductive Film
overly ing panel
X
element
Y
element
Figure 1-1 Field flow between X and Y elements
overlying panel
X
element
Y
element
subtract charge from Cs to create a negative-going offset,
bringing the signal back to a usable level. This action occurs
during the course of the burst and is not illustrated in the
timing diagram of Figure 1-4. This mechanism has the benefit
of allowing high levels of Cx while remaining highly sensitive
to small changes in charge coupling due to touch; the circuit
permits the designer to create very large, highly interdigitated
touch keys that are very sensitive.
The large Cs capacitor creates a virtual ground termination,
making the Y lines appear as a low impedance; this
effectively eliminates cross-coupling among Y lines due to
voltage spikes, while dramatically lowering susceptibility to
EMI. The circuit is also highly tolerant of capacitive loading
on the Y lines, since stray C from Y to ground appears
merely as a parallel capacitance to a much larger value of
Cs.
The QT60320 circuit design maintains high gain levels
independent of Cx or stray coupling C to ground. It also
readily compensates for field-related issues like
electrode design or the composition of the overlying
panel, as it has individual programmable gain and
threshold settings for each key.
Short sample gate dwell times after the X edge can be
used to limit the effect of moisture spreading from key
to key by taking advantage of the RC filter-like nature
of continuous films; the shorter the dwell time, the less
time that the charge has to travel through the
impedance of the film. This effect is completely
independent of the frequency of burst repetition,
intra-burst pulse spacing, or X drive pulse width.
Burst mode operation permits reduced power
consumption and reduces RF emissions, while
permitting excellent response time.
1.3 MATRIX CONFIGURATION
The matrix scanning configuration is shown in part in
Figure 1-5. The X drives are conventional CMOS
push-pull outputs which are sequentially pulsed in
groupings of bursts; a 4-pole analog switch
acts as the sample switch for all 4 Y lines. At
the intersection of each X and Y line is an
interdigitated electrode set as shown in
Figure 1-6. Typically the outermost electrode
is connected to X and the inner electrode
connected to Y. Remaining Y lines not
being sampled are grounded.
1.4 'X' ELECTRODE DRIVES
The 8 'X' lines can be directly connected to
the matrix without buffering. Only the X lines'
positive edges are used to create the
transient field flows used to scan the keys.
Only one X line is active at a time, and it will
pulse for a burst length determined by the
'gain' setting parameter.
If desired an external 22V10 type CMOS
PLD can be used to create the short gate
dwell times necessary to enhance moisture
suppression (Section 1.2). The PLD takes
as its input all 'X' and 'Y' lines, and with
added RC time constants creates the
required short dwell time on the Y switches.
The code for the PLD is available freely on
the Quantum web site and can also be found in Section 5.
1.5 'Y' GATE DRIVES
There are 4 'Y' gate drives (Y1..Y4) which are active-high;
only one Y line is used during a burst for a particular key. The
chosen Y line goes high just before an X line transitions high,
and goes low again just after the X line rises. It is used to
gate on an analog switch, such as a 74HC4066, to capture
charge coupled through a key to the sample capacitor Cs.
An inverted version of the Y lines can be used to gate
unselected Y lines to ground, to suppress residual cross-key
coupling that might be caused by cross-pickup from adjacent
X drive traces. See Section 2.2.
Y gate signals can be manipulated externally so that the gate
dwell time is very short to suppress the effects of surface
conductivity due to water films. See Section 2.3.
L
Q
3
QT60320C R1.08/01.03
Figure 1-4 QT60320 Circuit Model
out
V
Am p
0
0
1
1
0
X drive (1 of 8)
Y
receive line
(1 of 4 )
X
electrode
Y
electrode
Sam p le
switch (1 o f 4)
Cx
C s
Re set
switch
Cz
(1 o f 2)
Cancellation
switch (1 o f 2)
8-bit ADC
X D rive
R ese t
sw itch
Sam ple
sw itch
Am p
out
Figure 1-5 QT60320 Matrix Configuration
X
1
X
2
X
3
X
4
Y
A D C
Y
s1
Y
s2
Y
s3
Y
s4
1
Y
2
Y
3
Y
4
Cs
R eset
switch
Interdigitated
keys
X drives
(4 of 8 shown)
1.6 SIGNAL PROCESSING
The QT60320 calibrates and processes all signals using a
number of algorithms pioneered by Quantum. These
algorithms are specifically designed to provide for high
survivability in the face of adverse environmental challenges.
1.6.1 S
ELF
-C
ALIBRATION
The QT60320 is fully self-calibrating. On powerup the IC
scans the matrix key by key and sets appropriate calibration
points for each in accordance with setup information in its
internal eeprom, or on the fly from a host MPU. Since the
circuit can tolerate a very wide dynamic range, it is capable of
adapting to a wide mix of key sizes and shapes having wildly
varying Cx coupling capacitances. No special operator or
factory calibration or circuit tweak is required to bring keys
into operation, except for a gain and threshold batch setup
which can be performed in seconds from a file saved on a
PC. Once set, there should never be a need to readjust these
parameters.
1.6.2 D
RIFT
C
OMPENSATION
A
LGORITHM
Signal drift can occur because of changes in Cx and Cs over
time. It is crucial that drift be compensated for, otherwise
false detections, non-detections, and sensitivity shifts will
follow.
Drift compensation (Figure 1-7) is performed by making the
reference level track the raw signal at a slow rate, but only
while there is no detection in effect. The rate of adjustment
must be performed slowly, otherwise legitimate detections
could be ignored. The QT60320 drift compensates using a
slew-rate limited change to the reference level; the threshold
and hysteresis values are slaved to this reference.
When a finger is sensed, the signal falls since the human
body acts to absorb charge from the cross-coupling between
X and Y lines. An isolated, untouched foreign object (a coin,
or a water film) will cause the signal to rise slightly due to the
enhanced coupling thus created. These effects are contrary
to the way most capacitive sensors operate.
Once a finger is sensed, the drift compensation mechanism
ceases since the signal is legitimately low, and
therefore should not cause the reference level to
change.
The QT60320's drift compensation is
'asymmetric': the drift-compensation occurs in
one direction faster than it does in the other.
Specifically, it compensates faster for increasing
signals than for decreasing signals. Decreasing
signals should not be compensated for quickly,
since an approaching finger could be
compensated for partially or entirely before even
touching the sense pad. However, an obstruction
over the sense pad, for which the sensor has
already made full allowance for, could suddenly
be removed leaving the sensor with an artificially suppressed
reference level and thus become insensitive to touch. In this
latter case, the sensor will compensate for the object's
removal by raising the reference level quickly.
1.6.3 T
HRESHOLD
AND
H
YSTERESIS
C
ALCULATIONS
The threshold value is established as an offset to the
reference level. As Cx and Cs drift, the reference drift
compensates with the changes and the threshold level is
automatically recomputed in real time so that it is never in
error. Since key touches result in negative signal swings, the
threshold is set below the signal reference level.
The QT60320 employs a hysteresis of 25% of the delta
between the reference and threshold levels. The signal must
rise by 25% of the distance from threshold to reference
before the detection event drops out and the key registers as
untouched.
1.6.4 M
AX
O
N
-D
URATION
If a foreign object contacts a key the signal may change
enough to create a 'false' detection lasting for the duration of
the contact. To overcome this, the IC includes a timer which
monitors detection duration. If a detection exceeds the timer
setting, the timer causes the sensor to perform a full
recalibration. This is known as the Max On-Duration feature.
After the Max On-Duration interval has expired and the
recalibration has taken place, the affected key will once again
function normally even if still contacted by the foreign object,
to the best of its ability. The Max On-Duration is fixed at 10
seconds of continuous detection.
1.6.5 D
ETECTION
I
NTEGRATOR
To suppress false detections caused by spurious events like
electrical noise, the QT60320 incorporates a detection
integration counter that increments with each detection
sample until a limit is reached, at which point a detection is
confirmed. If no detection is sensed on any of the samples
prior to the final count, the counter is reset immediately to
zero, forcing the process to restart. The required count is 4.
2 - CIRCUIT SPECIFICS
A basic QT60320 circuit is shown in Figure 2-1.
2.1 SIGNAL PATH
The QT60320 requires an external sampling capacitor, two
Cz capacitors, an amplifier, some analog switches, and an
R2R ladder DAC to operate.
The Cs capacitor performs the charge integration function by
collecting charge coupled though a selected key during the
L
Q
4
QT60320C R1.08/01.03
Figure 1-7 Drift Compensation
Threshold
Signal
Hysteresis
Reference
Output
Figure 1-6 Sample Electrode Geometries
PARALLEL LINES
SERPENTINE
SPIRAL
dV/dt of the rising edge of an
'X' scan line. The charge is
sampled 'n' times during the
course of a burst of switching
cycles of length 'n'. As the
burst progresses the charge on
Cs increases in a staircase
fashion (Figure 1-4).
At the burst's end the voltage
on Cs, which is on the order of
a few tenths of a volt, is
amplified by a gain circuit
which includes an offset
current from the R2R ladder
DAC driven by the X drive
lines. The offset current from
the R2R ladder repositions the
output of the amplifier chain to
coincide as closely as possible
with the center span of the
60320's ADC, which can
convert voltages between 0
and 5 volts. Between bursts the
Cs reset mosfet is activated to
reset the Cs capacitor to
ground.
Gain is directly controlled by
burst length 'n', amplifier gain
Av, and the values of Cs, Cz1 and Cz2. Only 'n' can be
adjusted on a key by key basis whereas Av and the
capacitances can only be adjusted for all keys. The amplifier
should typically have a total positive gain of 100 +/- 20%..
If there is a large amount of coupling between X and Y lines,
and where burst length 'n' is set to a high number, charge
accumulation on Cs may reach a point where the ladder DAC
can no longer offset the signal back into the ADC's usable
range. In this case the circuit will employ one or two of the Cz
capacitors to 'knock back' or cancel the charge accumulated
on Cs; each Cz will cancel charge
in a discrete step as required.
Components shown in Figure 2-1
include:
An LVD reset (e.g. Dallas
DS1811) suitable for 5 volt
supplies and an active-low on
low-voltage output;
An R2R ladder network (CTS
750-107R100K or equivalent);
A >2MHz GBW CMOS rail-rail
output opamp capable of
sensing ground on the inputs;
An 8MHz crystal or resonator,
or a ceramic resonator with
built-in capacitors;
Two indicator LEDs (optional)
to show sensing state and
calibration status;
74AC04 inverters to drive the
two banks of analog switches
in opposite states;
Two 74HC4066 analog
switches;
A reset mosfet, most any
small-signal mosfet with a
guaranteed on-state at 4 volts
L
Q
5
QT60320C R1.08/01.03
Figure 2-1 Basic QT60320 Circuit
X1
X2
X3
X4
X5
X6
X7
X8
YS1
YS2
YS3
YS4
CC 1
CC 2
C S
AIN
G G G G
V
V
V
Vcc
Vc
c
Rst
Rx
Tx
I1
I2
I3
I4
O 1
O 2
O 3
O 4
O 5
O 6
O 7
O 8
XT1
XT2
L1
L2
4
9
10
33
34
35
36
11
12
13
14
23
24
25
26
8
7
15
16
6 18
39
V
5 1 7 2 7
38
4 0
4 1
4 2
4 3
4 4
1
2
3
1 9
2 0
21
2 2
3 2
3 1
3 0
3 7
28
29
D S18 11
8MHz
CAL L ED
STAT LED
C6 (Cz1) 8 20pF
C7 (Cz2) 8 20pF
BSN20
R 2R d ac 1 00K
+
_
+
_
R3 68K
R 5 10K
R4 100K
R6 10K
C5 (Cs)
1 5nF
Vcc
1/
4
H
C
4066
1/4
H
C
40
66
1/4
H
C
40
66
1/4
H
C
406
6
TL C22 72
Q
T
60
32
0
U
S
E
R
PO
R
T
PI
N
S
UART I N
U ART OUT
V
Keymatrix
Y3
Y2
Y4
Y1
1/4
H
C
406
6
1/4
H
C
40
66
1/4
H
C
40
66
1/
4
H
C
4066
74 AC 04
Figure 2-2 Improved Circuit to Suppress Water Films
X2
X3
X4
X5
X6
X7
X8
YS1
Y S2
Y S3
Y S4
CC 1
CC 2
CS
AIN
G G G G
V
V
V
Vcc
Vc
c
R st
R x
Tx
I 1
I 2
I 3
I 4
O 1
O 2
O 3
O 4
O 5
O 6
O 7
O 8
XT1
XT2
L 1
L 2
4
9
1 0
3 3
3 4
3 5
3 6
11
1 2
1 3
1 4
2 3
2 4
2 5
2 6
8
7
1 5
1 6
6 18
39
V
5 17 27
3 8
40
41
42
43
44
1
2
3
19
20
21
22
32
31
30
37
28
2 9
D S18 11
8M H z
CAL L ED
STAT LED
C6 (Cz 1) 820pF
C 7 (Cz 2) 820p F
BSN 20
R 2R dac 100K
R 3 68 K
R 5 1 0K
R 4 100 K
R 6 10 K
C 5 (C s)
15nF
Vcc
TLC 2272
Q
T
60320
US
E
R
PO
R
T

P
I
N
S
UAR T IN
U ART OU T
V
Keymatrix
Y 3
Y 2
Y4
Y1
QS3125
I /O
I/O
I /O
I/O
I /O
I/O
I /O
I/O
E
E
E
E
22V10
R t
C t
+
_
+
_