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Part Number 74AVCM162834

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Philips
Semiconductors
74AVCM162834
18-bit registered driver
with inverted register enable and
15
termination resistors (3-State)
Product specification
File under Integrated Circuits ICL03
2001 Apr 20
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74AVCM162834
18-bit registered driver with inverted register enable
and 15
termination resistors (3-State)
2
2001 Apr 20
853­2169 26096
FEATURES
·
Wide supply voltage range of 1.2 V to 3.6 V
·
Complies with JEDEC standard no. 8-1A/5/7.
·
CMOS low power consumption
·
Input/output tolerant up to 3.6 V
·
Low inductance multiple V
CC
and GND pins for minimum noise
and ground bounce
·
Integrated 15
termination resistors to minimize output overshoot
and undershoot
·
Full PC133 solution provided when used with PCK2510S and
CBT16292
DESCRIPTION
The 74AVCM162834 is an 18-bit universal bus driver. Data flow is
controlled by output enable (OE), latch enable (LE) and clock inputs
(CP).
This product is designed to have an extremely fast propagation
delay and a minimum amount of power consumption.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor (Live
Insertion).
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
NC
NC
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
GND
V
CC
GND
Y
6
Y
7
Y
8
Y
9
Y
10
Y
11
GND
Y
12
Y
13
Y
14
V
CC
Y
15
Y
16
GND
Y
17
OE
LE
GND
NC
A
0
GND
A
1
A
2
V
CC
A
3
A
4
A
5
GND
A
6
A
7
A
8
A
9
A
10
A
11
GND
A
12
A
13
A
14
V
CC
A
15
A
16
GND
A
17
CP
GND
SH00156
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
2.0 ns; C
L
= 30 pF.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
An to Yn
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
2.6
2.0
1.7
ns
t
PHL
/t
PLH
Propagation delay
LE to Yn;
CP to Yn
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
2.9
2.3
1.9
ns
C
I
Input capacitance
5.0
pF
C
Power dissipation capacitance per buffer
V = GND to V
CC
1
Outputs enabled
25
pF
C
PD
Power dissipation capacitance per buffer
V
I
= GND to V
CC
1
Output disabled
6
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µ
W):
P
D
= C
PD
×
V
CC
2
×
f
i
+
S
(C
L
×
V
CC
2
×
f
o
) where: f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
S
(C
L
×
V
CC
2
×
f
o
) = sum of outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE
RANGE
ORDER CODE
DRAWING
NUMBER
56-Pin Plastic Thin Shrink Small Outline (TSSOP) Type II
­40 to +85
°
C
74AVCM162834DGG
SOT364-1
Philips Semiconductors
Product specification
74AVCM162834
18-bit registered driver with inverted register enable
and 15
termination resistors (3-State)
2001 Apr 20
3
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
1, 2, 55
NC
No connection
3, 5, 6, 8, 9, 10, 12, 13,
14, 15, 16, 17, 19, 20,
21, 23, 24, 26
Y
0
to Y
17
Data outputs
4, 11, 18, 25, 32, 39, 46,
53, 56
GND
Ground (0 V)
7, 22, 35, 50
V
CC
Positive supply voltage
27
OE
Output enable input
(active LOW)
28
LE
Latch enable input
(active LOW)
30
CP
Clock input
54, 52, 51, 49, 48, 47,
45, 44, 43, 42, 41, 40,
38, 37, 36, 34, 33, 31
A
0
to A
17
Data inputs
LOGIC SYMBOL
CP
LE
D
OE
CP
LE
A
0
Y
0
TO THE 17 OTHER CHANNELS
SH00157
LOGIC SYMBOL (IEEE/IEC)
1
1
30
28
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
3
5
6
8
9
10
12
13
14
15
16
17
19
20
21
23
24
26
3D
27
2C3
EN1
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
OE
CP
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
Y
8
Y
9
Y
10
Y
11
Y
12
Y
13
Y
14
Y
15
Y
16
Y
17
LE
C3
G2
SH00158
FUNCTION TABLE
INPUTS
OUTPUTS
OE
LE
CP
A
OUTPUTS
H
X
X
X
Z
L
L
X
L
L
L
L
X
H
H
L
H
L
L
L
H
H
H
L
H
H
X
Y
0
1
L
H
L
X
Y
0
2
H
=
HIGH voltage level
L
=
LOW voltage level
X
=
Don't care
Z
=
High impedance "off" state
=
LOW-to-HIGH level transition
NOTES:
1. Output level before the indicated steady-state input conditions
were established, provided that CP is high before LE goes low.
2. Output level before the indicated steady-state input conditions
were established.
Philips Semiconductors
Product specification
74AVCM162834
18-bit registered driver with inverted register enable
and 15
termination resistors (3-State)
2001 Apr 20
4
168-pin SDR SDRAM DIMM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
The PLL clock distribution device and AVCM registered drivers reduce signal loads on the memory
controller and prevent timing delays and waveform distortions that would cause unreliable operation
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
74AVCM16834
PCK2509S or PCK2510S
74AVCM16834
BACK SIDE
FRONT SIDE
74AVCM16834
SW00407
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
UNIT
V
CC
DC supply voltage
(according to JEDEC Low Voltage Standards)
1.65
2.3
3.0
1.95
2.7
3.6
V
CC
DC supply voltage
(for low voltage applications)
1.2
3.6
V
I
DC Input voltage range
0
3.6
V
DC output voltage range; output 3-State
0
3.6
V
O
DC output voltage range;
output HIGH or LOW state
0
V
CC
V
T
amb
Operating free-air temperature range
­40
+85
°
C
V
CC
= 1.65 to 2.3 V
0
30
t
r
, t
f
Input rise and fall times
V
CC
= 2.3 to 3.0 V
0
20
ns/V
V
CC
= 3.0 to 3.6 V
0
10
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V)
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
­0.5 to +4.6
V
I
IK
DC input diode current
V
I
t
0
­50
mA
V
I
DC input voltage
For all inputs
1
­0.5 to 4.6
V
I
OK
DC output diode current
V
O
u
V
CC
or V
O
t
0
"
50
mA
V
O
DC output voltage; output 3-State
Note 1
­0.5 to 4.6
V
V
O
DC output voltage;
output HIGH or LOW state
Note 1
­0.5 to V
CC
+0.5
V
I
O
DC output source or sink current
V
O
= 0 to V
CC
"
50
mA
I
GND
, I
CC
DC V
CC
or GND current
"
100
mA
T
stg
Storage temperature range
­65 to +150
°
C
P
TOT
Power dissipation per package
­plastic thin-medium-shrink (TSSOP)
For temperature range: ­40 to +125
°
C
above +55
°
C derate linearly with 8 mW/K
600
mW
NOTE:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors
Product specification
74AVCM162834
18-bit registered driver with inverted register enable
and 15
termination resistors (3-State)
2001 Apr 20
5
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = ­40 to +85
°
C
UNIT
MIN
TYP
1
MAX
V
CC
= 1.2 V
V
CC
­
­
V
HIGH level Input voltage
V
CC
= 1.65 to 1.95 V
0.65V
CC
0.9
­
V
V
IH
HIGH level Input voltage
V
CC
= 2.3 to 2.7 V
1.7
1.2
­
V
V
CC
= 3.0 to 3.6 V
2.0
1.5
­
V
CC
= 1.2 V
­
­
GND
V
LOW level Input voltage
V
CC
= 1.65 to 1.95 V
­
0.9
0.35V
CC
V
V
IL
LOW level Input voltage
V
CC
= 2.3 to 2.7 V
­
1.2
0.7
V
V
CC
= 3.0 to 3.6 V
­
1.5
0.8
V
CC
= 1.65 to 3.6 V; V
I
= V
IH
or V
IL
;
V
CC
0 20
V
CC
CC
I
IH
IL
I
O
= ­100
µ
A
V
CC
*
0.20
V
CC
­
V
OH
HIGH level output voltage
V
CC
= 1.65 V; V
I
= V
IH
or V
IL
; I
O
= ­4 mA
V
CC
*
0.45
V
CC
*
0.10
­
V
OH
g
V
CC
= 2.3 V; V
I
= V
IH
or V
IL
; I
O
= ­8 mA
V
CC
*
0.55
V
CC
*
0.28
­
V
CC
= 3.0 V; V
I
= V
IH
or V
IL
; I
O
= ­12 mA
V
CC
*
0.70
V
CC
*
0.32
­
V
CC
= 1.65 to 3.6 V; V
I
= V
IH
or V
IL
;
GND
0 20
CC
I
IH
IL
I
O
= 100
µ
A
­
GND
0.20
V
OL
LOW level output voltage
V
CC
= 1.65 V; V
I
= V
IH
or V
IL
; I
O
= 4 mA
­
0.10
0.45
V
OL
g
V
CC
= 2.3 V; V
I
= V
IH
or V
IL
; I
O
= 8 mA
­
0.26
0.55
V
CC
= 3.0 V; V
I
= V
IH
or V
IL
; I
O
= 12 mA
­
0.36
0.70
V
CC
= 1 65 to 3 6 V;
I
I
Input leakage current
V
CC
= 1.65 to 3.6 V;
V
V
or GND
­
0.1
2.5
µ
A
I
I
In ut leakage current
V
I
= V
CC
or GND
0.1
2.5
µ
A
I
OFF
3-State output OFF-state current
V
CC
= 0V; V
I
or V
O
= 3.6 V
­
0.1
"
10
µ
A
I
IHZ
/I
ILZ
3-State output OFF-state current
V
CC
= 1.65 to 3.6 V; V
I
= V
CC
or GND
­
0.1
12.5
µ
A
I
O
3 State output OFF state current
V
CC
= 1.65 to 2.7 V; V
I
= V
IH
or V
IL
;
V
O
= V
CC
or GND
­
0.1
5
µ
A
I
OZ
3-State output OFF-state current
V
CC
= 3.0 to 3.6 V; V
I
= V
IH
or V
IL
;
V
O
= V
CC
or GND
­
0.1
10
µ
A
I
CC
Quiescent supply current
V
CC
= 1.65 to 2.7 V; V
I
= V
CC
or GND; I
O
= 0
­
0.1
20
µ
A
I
CC
Quiescent supply current
V
CC
= 3.0 to 3.6 V; V
I
= V
CC
or GND; I
O
= 0
­
0.2
40
µ
A
NOTES:
1. All typical values are at T
amb
= 25
°
C.
Philips Semiconductors
Product specification
74AVCM162834
18-bit registered driver with inverted register enable
and 15
termination resistors (3-State)
2001 Apr 20
6
AC CHARACTERISTICS
GND = 0 V; t
r
= t
f
2.0 ns; C
L
= 30 pF
LIMITS
SYMBOL
PARAMETER
WAVE-
FORM
V
CC
= 3.3
±
0.3 V
V
CC
= 2.5
±
0.2 V
V
CC
= 1.8
±
0.15 V
V
CC
= 1.2 V
UNIT
FORM
MIN
TYP
1
MAX
MIN
TYP
1
MAX
MIN
TYP
1
MAX
MIN
TYP
Propagation delay An to Yn
1, 7
0.7
1.7
2.5
0.8
2.0
3.1
1.0
2.6
4.5
­
5.2
t
PHL
/t
PLH
Propagation delay LE to Yn
2, 7
0.7
1.9
2.7
0.8
2.3
3.3
1.0
2.9
5.0
­
5.6
ns
Propagation delay CP to Yn
3, 7
0.7
1.7
2.5
0.8
2.0
3.0
1.0
2.6
4.5
­
5.2
t
PZH
/t
PZL
3-State output enable time OE
to Yn
6, 7
1.0
2.3
4.5
1.0
2.5
4.5
1.5
3.0
6.5
­
5.5
ns
t
PHZ
/t
PLZ
3-State output disable time
OE to Yn
6, 7
1.0
2.3
3.5
1.0
2.2
4.0
1.5
3.5
6.5
­
6.9
ns
t
CP pulse width HIGH or LOW
3, 7
1.0
­
­
1.2
­
­
2.0
­
­
­
­
ns
t
W
LE pulse width HIGH
2, 7
1.0
­
­
1.2
­
­
2.0
­
­
­
­
ns
Set-up time An to CP
5, 7
0.7
­
­
0.7
­
­
0.7
­
­
1.0
­
ns
t
SU
Set-up time An to LE HIGH
4, 7
0.5
­
­
0.5
­
­
0.5
­
­
0.2
­
ns
Set-up time An to LE LOW
4, 7
0.5
­
­
0.5
­
­
0.6
­
­
2.0
­
ns
Hold time An to CP
5, 7
0.9
­
­
0.9
­
­
1.0
­
­
1.5
­
ns
t
h
Hold time An to LE HIGH
4, 7
1.6
­
­
1.7
­
­
2.0
­
­
3.2
­
ns
Hold time An to LE LOW
4, 7
1.4
­
­
1.5
­
­
1.7
­
­
2.8
­
ns
F
max
Maximum clock pulse frequency
3, 7
500
­
­
400
­
­
250
­
­
­
­
MHz
NOTES:
1. All typical values are measured at T
amb
= 25
°
C and at V
CC
= 1.8 V, 2.5 V, 3.3 V.
Philips Semiconductors
Product specification
74AVCM162834
18-bit registered driver with inverted register enable
and 15
termination resistors (3-State)
2001 Apr 20
7
AC WAVEFORMS FOR V
CC
= 3.0 V TO 3.6 V RANGE
V
M
= 0.5 V
CC
V
X
= V
OL
+ 0.300 V
V
Y
= V
OH
­ 0.300 V
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
V
I
= V
CC
AC WAVEFORMS FOR V
CC
= 2.3 V TO 2.7 V AND
V
CC
< 2.3 V RANGE
V
M
= 0.5 V
CC
V
X
= V
OL
+ 0.15 V
V
Y
= V
OH
­ 0.15 V
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
V
I
= V
CC
A
n
INPUT
t
PHL
t
PLH
V
OL
V
I
GND
V
OH
Y
n
OUTPUT
SH00132
V
M
V
M
NOTE: V
M
= 0.5V
CC
at V
CC
= 2.3 to 2.7 V
Waveform 1. Input (An) to output (Yn) propagation delay
LE INPUT
Yn OUTPUT
V
I
GND
V
OH
V
OL
t
PHL
t
PLH
t
W
V
M
V
M
V
M
SH00165
NOTE: V
M
= 0.5 V
CC
at V
CC
= 2.3 to 2.7 V
Waveform 2. Latch enable input (LE) pulse width, the latch
enable input to output (Yn) propagation delays.
CP INPUT
Yn OUTPUT
V
I
GND
V
OH
V
OL
t
PHL
t
PLH
t
W
1/f
MAX
SH00135
V
M
V
M
V
M
NOTE: V
M
= 0.5V
CC
at V
CC
= 2.3 to 2.7 V
Waveform 3. The clock (CP) to Yn propagation delays, the
clock pulse width and the maximum clock frequency.
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
An
INPUT
LE
INPUT
t
SU
th
NOTE: The shaded areas indicate when the input is permitted to change
for predictable output performance.
t
SU
th
V
I
GND
V
I
GND
V
M
V
M
SH00166
V
M
= 0.5V
CC
at V
CC
= 2.3 to 2.7 V
Waveform 4. Data set-up and hold times for the An input to the
LE input
V
I
GND
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
An INPUT
V
I
GND
V
OH
Yn OUTPUT
V
OL
CP INPUT
t
su
t
h
t
su
t
h
NOTE: The shaded areas indicate when the input is permitted to change
for predictable output performance.
SH00136
V
M
V
M
V
M
= 0.5V
CC
at V
CC
= 2.3 to 2.7 V
Waveform 5. Data set-up and hold times for the An input to the
clock CP input
t
PLZ
t
PZL
V
I
nOE INPUT
GND
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
OL
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
outputs
enabled
outputs
disabled
t
PHZ
V
M
V
M
V
M
t
PZH
V
X
V
Y
SH00137
NOTE: V
M
= 0.5V
CC
at V
CC
= 2.3 to 2.7 V
Waveform 6. 3-State enable and disable times
Philips Semiconductors
Product specification
74AVCM162834
18-bit registered driver with inverted register enable
and 15
termination resistors (3-State)
2001 Apr 20
8
TEST CIRCUIT
SWITCH POSITION
PULSE
GENERATOR
RT
VI
D.U.T.
VO
CL
VCC
RL
Test Circuit for switching times
Open
GND
S
1
DEFINITIONS
V
CC
V
I
< 2.3 V
V
CC
TEST
S
1
t
PLH/
t
PHL
Open
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
2
<
V
CC
t
PLZ/
t
PZL
V
CC
2.3­2.7 V
t
PHZ/
t
PZH
GND
RL
2 * V
CC
SV01883
R
L
1000
500
V
CC
3.0 ­3.6 V
500
Waveform 7. Load circuitry for switching times
Philips Semiconductors
Product specification
74AVCM162834
18-bit registered driver with inverted register enable
and 15
termination resistors (3-State)
2001 Apr 20
9
TSSOP56:
plastic thin shrink small outline package; 56 leads; body width 6.1 mm
SOT364-1
Philips Semiconductors
Product specification
74AVCM162834
18-bit registered driver with inverted register enable
and 15
termination resistors (3-State)
2001 Apr 20
10
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088­3409
Telephone 800-234-7381
©
Copyright Philips Electronics North America Corporation 2001
All rights reserved. Printed in U.S.A.
Date of release: 04-01
Document order number:
9397-750-08282
Philips
Semiconductors
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
[1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1]
Please consult the most recently issued datasheet before initiating or completing a design.