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Part Number MC74VHC1G07

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©
Semiconductor Components Industries, LLC, 1999
October, 1999 ­ Rev. 0.0
1
Publication Order Number:
MC74VHC1G07/D
MC74VHC1G07
Product Preview
Noninverting Buffer with
Open Drain Output
The MC74VHC1G07 is an advanced high speed CMOS buffer with
open drain output fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
and an open drain output which provides the capability to set the
output switching level. This allows the MC74VHC1G07 to be used to
interface 5V circuits to circuits of any voltage between VCC and 7V
using an external resistor and power supply.
The MC74VHC1G07 input structure provides protection when
voltages up to 7V are applied, regardless of the supply voltage.
·
High Speed: tPD = 3.8ns (Typ) at VCC = 5V
·
Low Internal Power Dissipation: ICC = 2
µ
A (Max) at TA = 25
°
C
·
Power Down Protection Provided on Inputs
·
Pin and Function Compatible with Other Standard Logic Families
·
Latchup Performance Exceeds 300mA
·
ESD Performance: HBM > 2000V; MM > 200V, CDM > 1500V
Figure 1. 5­Lead SOT­353 Pinout (Top View)
5
1
2
4
3
VCC
NC
IN A
OUT Y
GND
LOGIC SYMBOL
IN A
OUT Y
1
OVT
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
SC­88A / SOT­353
DF SUFFIX
CASE 419A
PIN ASSIGNMENT
1
2
3
GND
NC
IN A
http://onsemi.com
Pin 1
d = Date Code
V7d
4
5
VCC
OUT Y
FUNCTION TABLE
MARKING DIAGRAM
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
L
H
A Input
Y Output
Z
L
MC74VHC1G07
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2
MAXIMUM RATINGS*
Characteristics
Symbol
Value
Unit
DC Supply Voltage
VCC
­0.5 to +7.0
V
DC Input Voltage
VIN
­0.5 to +7.0
V
DC Output Voltage
VOUT
­0.5 to 7.0
V
Input Diode Current
IIK
­20
mA
Output Diode Current
(VOUT < GND; VOUT > VCC)
IOK
+20
mA
DC Output Current, per Pin
IOUT
+25
mA
DC Supply Current, VCC and GND
ICC
+50
mA
Power dissipation in still air, SC­88A
PD
200
mW
Lead temperature, 1 mm from case for 10 s
TL
260
°
C
Storage temperature
Tstg
­65 to +150
°
C
* Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute­maximum­rated conditions is not implied. Functional
operation should be restricted to the Recommended Operating Conditions.
Derating -- SC­88A Package: ­3 mW/
_
C from 65
_
to 125
_
C
RECOMMENDED OPERATING CONDITIONS
Characteristics
Symbol
Min
Max
Unit
DC Supply Voltage
VCC
2.0
5.5
V
DC Input Voltage
VIN
0.0
5.5
V
DC Output Voltage
VOUT
0.0
7.0
V
Operating Temperature Range
TA
­55
+85
°
C
Input Rise and Fall Time
VCC = 3.3V
±
0.3V
VCC = 5.0V
±
0.5V
tr , tf
0
0
100
20
ns/V
MC74VHC1G07
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3
DC ELECTRICAL CHARACTERISTICS
VCC
TA = 25
°
C
TA
85
°
C
TA
125
°
C
Symbol
Parameter
Test Conditions
(V)
Min
Typ
Max
Min
Max
Min
Max
Unit
VIH
Minimum High­Level
Input Voltage
2.0
3.0
4.5
5.5
1.5
2.1
3.15
3.85
1.5
2.1
3.15
3.85
1.5
2.1
3.15
3.85
V
VIL
Maximum Low­Level
Input Voltage
2.0
3.0
4.5
5.5
0.5
0.9
1.35
1.65
0.5
0.9
1.35
1.65
0.5
0.9
1.35
1.65
V
VOH
Minimum High­Level
Output Voltage
VIN = VIH or VIL
VIN = VIH or VIL
IOH = ­50
µ
A
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
1.9
2.9
4.4
1.9
2.9
4.4
V
VIN = VIH or VIL
IOH = ­4mA
IOH = ­8mA
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
V
VOL
Maximum Low­Level
Output Voltage
VIN = VIH or VIL
VIN = VIH or VIL
IOL = 50
µ
A
2.0
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
VIN = VIH or VIL
IOL = 4mA
IOL = 8mA
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
IIN
Maximum Input
Leakage Current
VIN = 5.5V or GND
0 to
5.5
±
0.1
±
1.0
±
1.0
µ
A
ICC
Maximum Quiescent
Supply Current
VIN = VCC or GND
5.5
2.0
20
40
µ
A
IOPD
Maximum Off­state
Leakage Current
VOUT = 5.5V
0
0.25
2.5
5.0
µ
A
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS
(Cload = 50 pF, Input tr = tf = 3.0ns)
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
TA = 25
°
C
ÎÎÎÎÎ
ÎÎÎÎÎ
TA
85
°
C
ÎÎÎÎÎ
ÎÎÎÎÎ
TA
125
°
C
ÎÎ
ÎÎ
ÎÎÎÎ
ÎÎÎÎ
Symbol
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
Parameter
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
Test Conditions
ÎÎ
ÎÎ
Min
ÎÎÎ
ÎÎÎ
Typ
ÎÎÎ
ÎÎÎ
Max
ÎÎÎ
ÎÎÎ
Min
ÎÎÎ
ÎÎÎ
Max
ÎÎÎ
ÎÎÎ
Min
ÎÎÎ
ÎÎÎ
Max
ÎÎ
ÎÎ
Unit
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
tPZL
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
Maximum Output
Enable Time,
Input A to Y
ÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎ
VCC = 3.0
±
0.3V
CL = 15 pF
RL = 1K
W
CL = 50 pF
ÎÎ
ÎÎ
ÎÎ
ÎÎÎ
Î
Î
Î
ÎÎÎ
5.0
7.5
ÎÎÎ
Î
Î
Î
ÎÎÎ
7.1
10.6
ÎÎÎ
Î
Î
Î
ÎÎÎ
ÎÎÎ
Î
Î
Î
ÎÎÎ
8.5
12.0
ÎÎÎ
Î
Î
Î
ÎÎÎ
ÎÎÎ
Î
Î
Î
ÎÎÎ
10.0
14.5
ÎÎ
ÎÎ
ÎÎ
ns
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
Input A to Y
ÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎ
VCC = 5.0
±
0.5V
CL = 15 pF
RL = 1K
W
CL = 50 pF
ÎÎ
ÎÎ
ÎÎ
ÎÎÎ
Î
Î
Î
ÎÎÎ
3.8
5.3
ÎÎÎ
Î
Î
Î
ÎÎÎ
5.5
7.5
ÎÎÎ
Î
Î
Î
ÎÎÎ
ÎÎÎ
Î
Î
Î
ÎÎÎ
6.5
8.5
ÎÎÎ
Î
Î
Î
ÎÎÎ
ÎÎÎ
Î
Î
Î
ÎÎÎ
8.0
10.0
ÎÎ
ÎÎ
ÎÎ
ÎÎÎÎ
ÎÎÎÎ
tPLZ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
Maximum Output
Di
bl Ti
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
VCC = 3.0
±
0.3V, RL = 1K
W
, CL = 50 pF
ÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
7.5
ÎÎÎ
ÎÎÎ
10.6
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
12.0
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
14.5
ÎÎ
ÎÎ
ns
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
Disable Time
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
VCC = 5.0
±
0.5V, RL = 1K
W
, CL = 50 pF
ÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
5.3
ÎÎÎ
ÎÎÎ
7.5
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
8.5
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
10.0
ÎÎ
ÎÎ
ÎÎÎÎ
ÎÎÎÎ
CIN
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
Maximum Input
Capacitance
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
4
ÎÎÎ
ÎÎÎ
10
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
10
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
10
ÎÎ
ÎÎ
pF
Typical @ 25
°
C, VCC = 5.0V
CPD
Power Dissipation Capacitance (Note 1.)
18
pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR
)
= CPD
VCC
fin + ICC. CPD is used to determine the no­load dynamic
power consumption; PD = CPD
VCC2
fin + ICC
VCC.
RL
VCC ­ 7V
Figure 2. Output Voltage Mismatch Application
OVT
VCC
A
MC74VHC1G07
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4
VCC
GND
50%
50% VCC
A or B
Y
tPHL
tPLH
*Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 3. Switching Waveforms
Figure 4. Test Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature
Device Order Number
Circuit
Indicator
Temp
Range
Identifier
Technology
Device
Function
Package
Suffix
Tape &
Reel
Suffix
Package
Type
Tape and Reel
Size
MC74VHC1G07DFT1
MC
74
VHC1G
07
DF
T1
SC­88A /
SOT­353
7­Inch/3000 Unit
PACKAGE DIMENSIONS
SC­88A / SOT­353
DF SUFFIX
5­LEAD PACKAGE
CASE 419A­01
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MM.
DIM
A
MIN
MAX
MIN
MAX
MILLIMETERS
1.80
2.20
0.071
0.087
INCHES
B
1.15
1.35
0.045
0.053
C
0.80
1.10
0.031
0.043
D
0.10
0.30
0.004
0.012
G
0.65 BSC
0.026 BSC
H
­­­
0.10
­­­
0.004
J
0.10
0.25
0.004
0.010
K
0.10
0.30
0.004
0.012
N
0.20 REF
0.008 REF
S
2.00
2.20
0.079
0.087
V
0.30
0.40
0.012
0.016
B
0.2 (0.008)
M
M
1
2
3
4
5
A
G
V
S
D
5 PL
H
C
N
J
K
­B­
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
0.5 mm (min)
0.4 mm (min)
0.65 mm
0.65 mm
1.9 mm
MC74VHC1G07
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5
Figure 5. Carrier Tape Specifications
D1
FOR COMPONENTS
10 PITCHES
CUMULATIVE
TOLERANCE ON
TAPE
±
0.2 mm
(
±
0.008")
2.0 mm
×
1.2 mm
AND LARGER
CENTER LINES
OF CAVITY
EMBOSSMENT
USER DIRECTION OF FEED
K0
SEE
NOTE 2
P0
P2
D
E
F
W
B0
+
+
+
K
t
B1
TOP
COVER
TAPE
P
SEE NOTE 2
A0
FOR MACHINE REFERENCE
ONLY
INCLUDING DRAFT AND RADII
CONCENTRIC AROUND B0
R MIN.
TAPE AND COMPONENTS
SHALL PASS AROUND RADIUS "R"
WITHOUT DAMAGE
BENDING RADIUS
*TOP COVER
TAPE THICKNESS (t1)
0.10 mm
(0.004") MAX.
EMBOSSED
CARRIER
EMBOSSMENT
TYPICAL
COMPONENT CAVITY
CENTER LINE
TYPICAL
COMPONENT
CENTER LINE
MAXIMUM COMPONENT ROTATION
10
°
CAMBER (TOP VIEW)
ALLOWABLE CAMBER TO BE 1 mm/100 mm NONACCUMULATIVE OVER 250
mm
100 mm
(3.937")
1 mm
(0.039") MAX
250 mm
(9.843")
1 mm MAX
TAPE
EMBOSSED CARRIER DIMENSIONS (See Notes 1 and 2)
Tape
Size
B1
Max
D
D1
E
F
K
P
P0
P2
R
T
W
8 mm
4.35 mm
(0.171")
1.5 +0.1/
­0.0 mm
(0.059
+0.004/
­0.0")
1.0 mm
Min
(0.039")
1.75
±
0.1 mm
(0.069
±
0.004")
3.5
±
0.5 mm
(1.38
±
0.002")
2.4 mm
(0.094")
4.0
±
0.10 mm
(0.157
±
0.004")
4.0
±
0.1 mm
(0.156
±
0.004")
2.0
±
0.1 mm
(0.079
±
0.002")
25 mm
(0.98")
0.3
±
0.05 mm
(0.01
+0.0038/
­0.0002")
8.0
±
0.3 mm
(0.315
±
0.012")
1. Metric Dimensions Govern­English are in parentheses for reference only.
2. A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min to
0.50 mm max. The component cannot rotate more than 10
°
within the determined cavity