©
Semiconductor Components Industries, LLC, 2000
April, 2000 Rev. 6
1
Publication Order Number:
MC1741C/D
MC1741C
Internally Compensated,
High Performance
Operational Amplifier
The MC1741C was designed for use as a summing amplifier,
integrator, or amplifier with operating characteristics as a function of
the external feedback components.
·
No Frequency Compensation Required
·
Short Circuit Protection
·
Offset Voltage Null Capability
·
Wide Common Mode and Differential Voltage Ranges
·
Low Power Consumption
·
No Latch Up
Equivalent Circuit Schematic
(1/4 of Circuit Shown)
Offset
Null
Output
G
Noninverting
Input
Inverting
Input
V
CC
V
EE
39 k
1.0 k
1.0 k
50 k
50 k
50
50
25
4.5 k
7.5 k
30 pF
5.0 k
Device
Package
Shipping
ORDERING INFORMATION
MC1741CD
SO8
98 Units/Rail
MC1741CDR2
SO8
http://onsemi.com
2500 Tape & Reel
PDIP8
P1 SUFFIX
CASE 626
1
8
SO8
D SUFFIX
CASE 751
1
8
MARKING
DIAGRAMS
ALYW
1741C
1
8
AWL
MC1741CP1
1
8
YYWW
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
PDIP8
PIN CONNECTIONS
N.C.
V
CC
Output
Offset Null
Offset Null
1
2
3
4
8
7
6
5
Noninv. Input
V
EE
Inv. Input
(Top View)
+
MC1741CP1
50 Units/Rail
MC1741C
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2
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Supply Voltage
V
CC
, V
EE
±
18
Vdc
Input Differential Voltage
V
ID
±
30
V
Input Common Mode Voltage (Note 1.)
V
ICM
±
15
V
Output Short Circuit Duration (Note 2.)
t
SC
Continuous
Operating Ambient Temperature Range
T
A
0 to +70
°
C
Storage Temperature Range
T
stg
55 to +125
°
C
1. For supply voltages less than +15 V, the absolute maximum input voltage is equal to the supply voltage.
2. Supply voltage equal to or less than 15 V.
ELECTRICAL CHARACTERISTICS
(V
CC
= +15 V, V
EE
= 15 V, T
A
= 25
°
C, unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
Input Offset Voltage (R
S
10 k)
V
IO
2.0
6.0
mV
Input Offset Current
I
IO
20
200
nA
Input Bias Current
I
IB
80
500
nA
Input Resistance
r
i
0.3
2.0
M
Input Capacitance
C
i
1.4
pF
Offset Voltage Adjustment Range
V
IOR
±
15
mV
Common Mode Input Voltage Range
V
ICR
±
12
±
13
V
Large Signal Voltage Gain (V
O
=
±
10 V, R
L
2.0 k)
A
VOL
20
200
V/mV
Output Resistance
r
o
75
Common Mode Rejection (R
S
10 k)
CMR
70
90
dB
Supply Voltage Rejection (R
S
10 k)
PSR
75
dB
Output Voltage Swing
V
O
V
(R
L
10 k)
±
12
±
14
(R
L
2.0 k)
±
10
±
13
Output Short Circuit Current
I
SC
20
mA
Supply Current
I
D
1.7
2.8
mA
Power Consumption
P
C
50
85
mW
Transient Response (Unity Gain, Noninverting)
(V
I
= 20 mV, R
L
2.0 k, C
L
100 pF) Rise Time
t
TLH
0.3
µ
s
(V
I
= 20 mV, R
L
2.0 k, C
L
100 pF) Overshoot
os
15
%
(V
I
= 10 V, R
L
2.0 k, C
L
100 pF) Slew Rate
SR
0.5
V/
µ
s
ELECTRICAL CHARACTERISTICS
(V
CC
= +15 V, V
EE
= 15 V, T
A
= T
low
to T
high
, unless otherwise noted.)*
Characteristic
Symbol
Min
Typ
Max
Unit
Input Offset Voltage (R
S
10 k
)
V
IO
7.5
mV
Input Offset Current (T
A
= 0
°
to +70
°
C )
I
IO
300
nA
Input Bias Current (T
A
= 0
°
to +70
°
C )
I
IB
800
nA
Supply Voltage Rejection (R
S
10 k)
PSR
75
dB
Output Voltage Swing (R
L
2.0 k)
V
O
±
10
±
13
V
Large Signal Voltage Gain (R
L
2.0 k, V
O
=
±
10 V)
A
VOL
15
V/mV
* T
low
= 0
°
C
T
high
= 70
°
C
MC1741C
http://onsemi.com
3
Figure 1. Burst Noise versus Source Resistance
Figure 2. RMS Noise versus Source Resistance
Figure 3. Output Noise versus Source Resistance
Figure 4. Spectral Noise Density
Figure 5. Burst Noise Test Circuit
Unlike conventional peak reading or RMS meters, this system was
especially designed to provide the quick response time essential
to burst (popcorn) noise testing.
The test time employed is 10 sec and the 20 mV peak limit
refers to the operational amplifier input thus eliminating errors
in the closed loop gain factor of the operational amplifier.
R
S
, SOURCE RESISTANCE (
)
0
10
100
1000
10
100
1.0 k
10 k
100 k
1.0 M
BW = 1.0 Hz to 1.0 kHz
e n
,
INPUT
NOISE (
Vpk)
µ
R
S
, SOURCE RESISTANCE (
)
0.1
1.0
10
100
10
100
1.0
10 k
100 k
1.0 M
BW = 1.0 Hz to 1.0 kHz
OUTPUT
NOISE (mV
rms)
R
S
, SOURCE RESISTANCE (
)
0.01
0.1
1.0
10
10
100
1.0 k
10 k
100 k
1.0 M
A
V
= 1000
10
1.0
e n
,
100
f, FREQUENCY (Hz)
10
100
1.0 k
100 k
10 k
14.0
12.0
10.0
8.0
4.0
2.0
0
6.0
A
V
= 10, R
S
= 100 k
INPUT
NOISE (
nV/
Hz
)
+
1.0 k
Operational Amplifier
Under Test
Low Pass
Filter
1.0 Hz to 1.0 kHz
100 k
x500
x2
To Pass / Fail
Indicator
-
100 k
100 k
-
+
-
+
Positive
Threshold
Voltage
Negative
Threshold
Voltage
e n
,
e n
,
INPUT
NOISE (
Vpk)
µ
MC1741C
http://onsemi.com
4
V O
,
OUTPUT
VOL
T
AGE (V
)
pp
V O
,
OUTPUT
VOL
T
AGE (V
)
pp
V O
,
OUTPUT
VOL
T
AGE (V
)
pp
±
15 V Supplies
±
12 V
±
9.0 V
±
6.0 V
V O
, OUTPUT
VOL
T
AGE SWING (V
pp
)
Figure 6. Power Bandwidth
(Large Signal Swing versus Frequency)
Figure 7. Open Loop Frequency Response
Figure 8. Positive Output Voltage Swing
versus Load Resistance
Figure 9. Negative Output Voltage Swing
versus Load Resistance
Figure 10. Output Voltage Swing versus
Load Resistance (Single Supply Operation)
Figure 11. Single Supply Inverting Amplifier
f, FREQUENCY (Hz)
10
100
1.0 k
100 k
10 k
28
24
20
16
8.0
4.0
0
12
(Voltage Follower)
THD < 5%
f, FREQUENCY (Hz)
0
-20
20
40
60
80
100
120
1.0
100
1.0 k
10 k
100 k
1.0 M
10 M
10
VOL
T
AGE GAIN (dB)
A vol
,
R
L,
LOAD RESISTANCE (
)
±
15 V Supplies
±
12 V
15
13
11
9.0
7.0
5.0
3.0
1.0
100
200
500 700 1.0 k
2.0 k
5.0 k 7.0 k 10 k
±
9.0 V
±
6.0 V
R
L,
LOAD RESISTANCE (
)
-15
-13
-11
-9.0
-7.0
-5.0
-3.0
-1.0
100
200
500 700 1.0 k
2.0 k
5.0 k 7.0 k 10
27 V
24 V
21 V
18 V
15 V
12 V
9.0 V
6.0 V
5.0 V
30 V Supply
28
26
24
22
20
18
16
14
12
10
8.0
6.0
4.0
2.0
0
0
1.0
2.0
3.0 4.0
5.0
6.0
7.0
8.0
9.0
10
R
L,
LOAD RESISTANCE (k
)
100
µ
F
R
L
V
CC
200 k
50 k
+
V
in
7
4
2
3
10 k
-
MC1741
1.0 k
200 k
50 k
100
µ
F
MC1741C
http://onsemi.com
5
Figure 12. Noninverting Pulse Response
Figure 13. Transient Response Test Circuit
Figure 14. Open Loop Voltage Gain
versus Supply Voltage
5.0 V/DIV
10
µ
s/DIV
Input
+
R
L
C
L
To Scope
(Input)
To Scope
(Output)
-
70
75
80
90
95
100
105
85
0
2.0
4.0
6.0
8.0
10
12
14
16
18
20
V
CC
, |V
EE
|, SUPPLY VOLTAGES (V)
A V
, VOL
T
AGE GAIN (dB)
Output
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