©
Semiconductor Components Industries, LLC, 2004
March, 2004 - Rev. 15
1
Publication Order Number:
CS8183/D
CS8183
Dual Micropower 200 mA
Low Dropout Tracking
Regulator/Line Driver
The CS8183 is a dual low dropout tracking regulator designed to
provide adjustable buffered output voltages that closely track
(
±
10 mV) the reference inputs. The outputs deliver up to 200 mA
while being able to be configured higher, lower or equal to the
reference voltages.
The outputs have been designed to operate over a wide range (2.8 V
to 45 V) while still maintaining excellent DC characteristics. The
CS8183 is protected from reverse battery, short circuit and thermal
runaway conditions. The device also can withstand 45 V load dump
transients and -50 V reverse polarity input voltage transients. This
makes it suitable for use in automotive environments.
The V
REF
/ENABLE leads serve two purposes. They are used to
provide the input voltage as a reference for the output and they also
can be pulled low to place the device in sleep mode where it nominally
draws less than 30
µ
A from the supply.
The two trackers can be combined in parallel doubling the capability
to 400 mA for a single application.
Features
·
Two Regulated Outputs 200 mA,
±
10 mV Track Worst Case
·
Low Dropout (0.35 V typ. @ 200 mA)
·
Low Quiescent Current
·
Independent Thermal Shutdown
·
Short Circuit Protection
·
Wide Operating Range
·
Internally Fused Leads in the SO-20L Package
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W
= Work Week
PIN CONNECTIONS AND
MARKING DIAGRAM
Device
Package
Shipping
ORDERING INFORMATION
SO-20L
37 Units/Rail
SO-20L
1000 Tape & Reel
SO-20L
DWF
SUFFIX
CASE 751D
CS8183YDWF20
CS8183YDWFR20
1
CS8183
A
W
L
YYWW
20
NC
NC
NC
NC
GND
GND
GND
GND
NC
NC
NC
NC
V
IN2
V
OUT1
V
OUT2
V
IN1
V
REF
/ENABLE2
V
ADJ1
V
ADJ2
V
REF
/ENABLE1
1
20
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CS8183
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2
Current Limit &
VSAT Sense
+
-
ENABLE
+
-
Independent
Thermal
Shutdown
2.0 V
Current Limit &
VSAT Sense
+
-
ENABLE
+
-
Independent
Thermal
Shutdown
2.0 V
V
OUT1
Adj1
V
REF
/ENABLE1
V
OUT2
GND
Adj2
V
REF
/ENABLE2
V
IN1
V
IN2
Figure 1. Block Diagram
PACKAGE PIN DESCRIPTION
Package Lead Number
SO-20L
Lead Symbol
Function
1
V
IN1
Input voltage for V
OUT1
.
2
V
OUT1
Regulated output voltage 1.
3, 4, 7, 8, 13, 14, 17, 18
NC
No connection.
5, 6, 15, 16
GND
Ground (4 leads fused)
9
V
ADJ1
Adjust lead for V
OUT1
.
10
V
REF
/ENABLE1
Reference voltage and ENABLE input for V
OUT1
.
11
V
ADJ2
Adjust lead for V
OUT2
.
12
V
REF
/ENABLE2
Reference voltage and ENABLE input for V
OUT2
.
19
V
IN2
Input voltage for V
OUT2
.
20
V
OUT2
Regulated output voltage 2.
CS8183
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3
MAXIMUM RATINGS*
Rating
Value
Unit
Storage Temperature
-65 to 150
°
C
Supply Voltage Range (continuous)
15 to 45
V
Supply Voltage Range (normal, continuous)
3.4 to 45
V
Peak Transient Voltage (V
IN
= 14 V, Load Dump Transient = 31 V)
45
V
Voltage Range (Adj, V
REF
/ENABLE, V
OUT
)
-10 to 45
V
Maximum Junction Temperature
150
°
C
Package Thermal Resistance:
Junction-to-Case, R
JC
Junction-to-Ambient, R
JA
18
73
°
C/W
°
C/W
ESD Capability (Human Body Model)
(Machine Model)
2.0
200
kV
V
Lead Temperature Soldering:
Reflow: (SMD styles only) (Note 1)
240 peak
(Note 2)
°
C
1. 60 second maximum above 183
°
C.
2. -5
°
C/+0
°
C allowable conditions.
*The maximum package power dissipation must be observed.
ELECTRICAL CHARACTERISTICS
(V
IN
= 14 V; V
REF
/ENABLE > 2.75 V; -40
°
C
T
J
+125
°
C; C
OUT
10
µ
F;
0.1
< C
OUT - ESR
< 1.0
@ 10 kHz; unless otherwise stated.)
Parameter
Test Conditions
Min
Typ
Max
Unit
Regular Output 1, 2
V
REF
- V
OUT
V
OUT
Tracking Error
4.5 V
V
IN
26 V, 100
µ
A
I
OUT
200 mA, Note 3
-10
-
10
mV
Dropout Voltage (V
IN
- V
OUT
)
I
OUT
= 100
µ
A
I
OUT
= 200 mA
-
-
100
350
150
600
mV
mV
Line Regulation
4.5 V
V
IN
26 V, Note 3
-
-
10
mV
Load Regulation
100
µ
A
I
OUT
200 mA, Note 3
-
-
10
mV
Adj Lead Current
Loop in Regulation
-
0.2
1.0
µ
A
Current Limit
V
IN
= 14 V, V
REF
= 5.0 V, V
OUT
= 90% of V
REF
, Note 3
225
-
700
mA
Quiescent Current (I
IN
- I
OUT
)
V
IN
= 12 V, I
OUT
= 200 mA
V
IN
= 12 V, I
OUT
= 100
µ
A
V
IN
= 12 V, V
REF
/ENABLE = 0 V
-
-
-
15
75
30
25
150
55
mA
µ
A
µ
A
Reverse Current
V
OUT
= 5.0 V, V
IN
= 0 V
-
0.2
1.5
mA
Ripple Rejection
f = 120 Hz, IOUT = 200 mA, 4.5 V
V
IN
26 V
60
-
-
dB
Thermal Shutdown
-
150
180
210
°
C
V
REF
/ENABLE 1, 2
Enable Voltage
-
0.80
2.00
2.75
V
Input Bias Current
V
REF
/ENABLE 1, 2 > 2.0 V
-
0.2
1.0
µ
A
3. V
OUT
connected to Adj lead.
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4
TYPICAL CHARACTERISTICS
18
16
14
12
10
8
6
4
2
0
Figure 2. Quiescent Current vs. Output Current
0
20
40
60
80
100
120 140 160 180 200
OUTPUT CURRENT (mA)
QUIESCENT CURRENT (mA)
Figure 3. Quiescent Current vs. Input Voltage
(Operating Mode)
1
0.9
0.8
0.7
0.6
0.5
0.3
0.2
0.1
0
0
5
10
15
20
25
30
35
40
45
V
IN
, INPUT VOLTAGE (V)
QUIESCENT CURRENT (mA)
0.4
Figure 4. Quiescent Current vs. Input Voltage
(Sleep Mode)
Figure 5. V
out
Reverse Current
Figure 6. V
out
Reverse Current
100
90
80
70
60
50
30
20
10
0
0
5
10
15
20
25
30
35
40
45
V
IN
, INPUT VOLTAGE (V)
QUIESCENT CURRENT (
µ
A)
40
20
18
16
14
12
10
6
4
2
0
0
5
10
15
20
25
FORCED V
out
VOLTAGE (V)
CURRENT INT
O V
out
(mA)
8
140
120
100
80
60
40
20
0
0
5
10
15
20
25
FORCED V
out
VOLTAGE (V)
CURRENT INT
O V
out
(mA)
30
35
40
I (V
out
) = 20 mA
I (V
out
) = 1 mA
V
ref
/ ENABLE = 0 V
V
in
= 6 V*
V
ref
= 5 V**
V
in
= 0 V
* Graph is duplicate for V
in
> 1.6V.
**Dip (@5V) shifts with V
ref
voltage.
V
in
= 6 V*
V
ref
= 5 V**
V
in
= 0 V
* Graph is duplicate for V
in
> 1.6V.
**Dip (@5V) shifts with V
ref
voltage.
CS8183
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5
CIRCUIT DESCRIPTION
ENABLE Function
By pulling the V
REF
/ENABLE 1, 2 lead below 2.0 V
typically, (see Figure 10 or Figure 11), the IC is disabled and
enters a sleep state where the device draws less than 30
µ
A
from supply. When the V
REF
/ENABLE lead is greater than
2.75 V, V
OUT
tracks the V
REF
/ENABLE lead normally.
Output Voltage
Figures 7 through 12 only display one channel of the
device for simplicity. The configurations shown apply
for both channels.
The outputs are capable of supplying 200 mA to the load
while configured as a similiar (Figure 7), lower (Figure 9),
or higher (Figure 8) voltage as the reference lead. The Adj
lead acts as the inverting terminal of the op amp and the
V
REF
lead as the non-inverting.
The device can also be configured as a high-side driver as
displayed in Figure 12.
Figure 7. Tracking Regulator at the Same Voltage
Figure 8. Tracking Regulator at Higher Voltages
V
IN
V
OUT
GND
GND
V
REF
/
GND
GND
Adj
ENABLE
Loads
5.0 V
B+
C1*
1.0
m
F
C2**
10
m
F
V
OUT
, 200 mA
VOUT
+
VREF
V
IN
V
OUT
GND
GND
V
REF
/
GND
GND
Adj
ENABLE
Loads
V
REF
B+
C1*
1.0
m
F
C2**
10
m
F
V
OUT
, 200 mA
R
A
R
F
VOUT
+
VREF(1
)
RE
RA
)
CS8183
CS8183
C3***
10 nF
C3***
10 nF
Figure 9. Tracking Regulator at Lower Voltages
Figure 10. Tracking Regulator with ENABLE Circuit
V
IN
V
OUT
GND
GND
V
REF
/
GND
GND
Adj
ENABLE
Loads
V
REF
B+
C1*
1.0
m
F
C2**
10
m
F
V
OUT
, 200 mA
VOUT
+
VREF(
R2
R1
)
R2
)
R2
R1
V
IN
V
OUT
GND
GND
V
REF
/
GND
GND
Adj
ENABLE
from MCU
V
REF
B+
C1*
1.0
m
F
C2**
10
m
F
V
OUT
, 200 mA
R
CS8183
CS8183
C3***
10 nF
C3***
10 nF
Figure 11. Alternative ENABLE Circuit
Figure 12. High-Side Driver
V
IN
V
OUT
GND
GND
V
REF
/
GND
GND
Adj
ENABLE
10
m
F
V
IN
V
OUT
GND
GND
V
REF
/
GND
GND
Adj
ENABLE
MCU
B+
200 mA
VOUT
+
B
) *
VSAT
** C2 is required for stability.
* C1 is required if the regulator is far from the power source filter.
CS8183
CS8183
5.0 V
I/O
NCV8501
6.0 V-40 V
V
IN
100 nF
V
REF
(5.0 V)
m
C
To Load
(e.g. sensor)
C1*
1.0
m
F
C3***
10 nF
C3***
10 nF
*** C3 is recommended for EMC susceptibility
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6
V
IN1
V
OUT1
NC
NC
GND
GND
NC
NC
V
OUT2
V
IN2
NC
NC
GND
GND
NC
NC
V
ADJ1
V
REF
/
ENABLE1
V
REF
/
ENABLE2
V
ADJ2
C2
20
µ
F
V
OUT
400 mA
B+
V
REF
C1
2.0
µ
F
Figure 13. 400 mA Loading
400 mA Output Capability
Normally regulator outputs cannot be combined to
increase capability. This can cause damage to an IC because
of mismatches in the output drivers. The tight tolerances in
tracking of the CS8183 allow their outputs to be combined
for increased performance. Figure 13 shows the circuit
connections needed to perform this function.
APPLICATION NOTES
Switched Application
The CS8183 has been designed for use in systems where
the reference voltage on the V
REF
/ENABLE pin is
continuously on. Typically, the current into the
V
REF
/ENABLE pin will be less than 1.0
µ
A when the
voltage on the V
IN
pin (usually the ignition line) has been
switched out (V
IN
can be at high impedance or at ground.)
Reference Figure 14.
V
OUT
GND
GND
Adj
V
IN
GND
GND
V
REF
/
ENABLE
V
OUT
V
REF
5.0 V
V
BAT
C1
1.0
µ
F
Ignition
Switch
< 1.0
µ
A
CS8183
Figure 14.
C2
10
µ
F
External Capacitors
Output capacitors for the CS8183 are required for
stability. Without them, the regulator outputs will oscillate.
Actual size and type may vary depending upon the
application load and temperature range. Capacitor effective
series resistance (ESR) is also a factor in the IC stability.
Worst-case is determined at the minimum ambient
temperature and maximum load expected.
The output capacitors can be increased in size to any
desired value above the minimum. One possible purpose of
this would be to maintain the output voltage during brief
conditions of negative input transients that might be
characteristic of a particular system.
The capacitors must also be rated at all ambient
temperatures expected in the system. To maintain regulator
stability down to -40
°
C, a capacitor rated at that temperature
must be used.
More information on capacitor selection for SMART
REGULATOR
®
s is available in the SMART REGULATOR
application note, "Compensation for Linear Regulators."
Calculating Power Dissipation in a Dual Output Linear
Regulator
The maximum power dissipation for a dual output
regulator (Figure 15) is:
PD(max)
+
{VIN(max)
*
VOUT1(min)} IOUT1(max)
)
{VIN(max)
*
VOUT2(min)}IOUT2(max2)
(1)
)
VIN(max)IQ
where:
V
IN(max)
is the maximum input voltage,
V
OUT1(min)
is the minimum output voltage from V
OUT1
,
V
OUT2(min)
is the minimum output voltage from V
OUT2
,
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7
I
OUT1(max)
is the maximum output current, for the
application,
I
OUT2(max)
is the maximum output current, for the
application,
I
Q
is the quiescent current the regulator consumes at
I
OUT(max)
.
Once the value of PD(max) is known, the maximum
permissible value of R
JA
can be calculated:
R
Q
JA
+
150
°
C
*
TA
PD
(2)
The value of R
JA
can then be compared with those in the
package section of the data sheet. Those packages with
R
JA
's less than the calculated value in equation 2 will keep
the die temperature below 150
°
C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external heat
sink will be required.
Figure 15. Dual Output Regulator with Key
Performance Parameters Labeled
I
IN
I
OUT
I
Q
SMART
V
OUT
V
IN
REGULATOR
Control
Features
Heatsinks
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R
JA:
R
Q
JA
+
R
Q
JC
)
R
Q
CS
)
R
Q
SA
(3)
where:
R
JC
= the junction-to-case thermal resistance,
R
CS
= the case-to-heatsink thermal resistance, and
R
SA
= the heatsink-to-ambient thermal resistance.
R
JC
appears in the package section of the data sheet. Like
R
JA
, it is a function of package type. R
CS
and R
SA
are
functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heat sink manufacturers.
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8
PACKAGE DIMENSIONS
SO-20L
DWF SUFFIX
CASE 751D-05
ISSUE F
20
1
11
10
B
20X
H
10X
C
L
18X
A1
A
SEATING
PLANE
q
h
X 45
_
E
D
M
0.25
M
B
M
0.25
S
A
S
B
T
e
T
B
A
DIM
MIN
MAX
MILLIMETERS
A
2.35
2.65
A1
0.10
0.25
B
0.35
0.49
C
0.23
0.32
D
12.65
12.95
E
7.40
7.60
e
1.27 BSC
H
10.05
10.55
h
0.25
0.75
L
0.50
0.90
q
0
7
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL
BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT
MAXIMUM MATERIAL CONDITION.
_
_
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
"Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
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CS8183/D
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
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