DS90C2501
Transmitter with built-in scaler for LVDS Display
Interface (LDI)
General Description
The DS90C2501 is a highly integrated scaling IC with LVDS
transmitter with a scaled resolution up to SXGA+ for single
pixel input. The DS90C2501 is a video controller hub de-
signed to be compatible with Graphic Memory Controller
Hub (GMCH). The input interface can be single or dual DVO
port (12 pin per port). The high quality cubic zoom engine
scales the input graphics into the desired/optimal output
resolution up to 1400x1050 resolution. Advanced video digi-
tal signal processing provides gamma correction, and dith-
ering for the display output. A two-wire serial interface is
used to communicate with the host system. The dual high
speed LVDS channels supports single pixel in-single pixel
out, single pixel in-dual pixel out, and dual pixel in-dual pixel
out transmission modes. The DS90C2501 complies to Open
LDI standard, and can be paired up with DS90CF388 re-
ceiver or FPD8531x/FPD8731x series integrated timing con-
troller or FPDLink LVDS receivers such as DS90CF364/
DS90CF384A/DS90CF384/DS90CF384A. The LVDS output
is similar to DS90C387 and DS90C387R. Thus, this trans-
mitter can be paired up with DS90CF388, receiver of
112MHz LDI chipset or FPD-Link Receivers in non-DC Bal-
ance mode operation which provides GUI/LCD panel/mother
board vendors a wide choice of inter-operation with LVDS
based TFT panels.
This chip is an ideal solution to solve EMI and cable size
problems for high-resolution flat panel applications. It pro-
vides a reliable industry standard interface based on LVDS
technology that delivers the bandwidth needed for high-
resolution panels while maximizing bit times, and keeping
clock rates low to reduce EMI and shielding requirements.
For more details, please refer to the "Applications Informa-
tion" section of this datasheet.
Features
n
Complies with Open LDI and GMCH DVO specification
for digital display interfaces
n
25 to 65 MHz clock in single pixel in to single pixel out
operation.
n
50 to 130 MHz clock in single pixel in to dual pixel out
operation.
n
Support 24bit/48bit color TFT LCD with Conventional
and Non-Conventional Color Mappings.
n
Support 16bit/32bit color TFT LCD.
n
Single pixel transmitter inputs support single pixel GUI
interface.
n
Up scaling/panel fitting supports VGA to SXGA+ output
in single pixel input mode at 640x480
@
60Hz,
800x600
@
60Hz, 1024x768
@
60Hz, 1280x1024
@
60Hz,
1400x1050
@
60Hz.
n
Independent horizontal and vertical scaling.
n
Support dithering (available for 6-bit color only),
programmable smoothing and anti-aliasing filter.
n
Programmable digital sharpness, edge enhancement
and contrast control via gamma correction.
n
Allow 2% at 200KHz spread spectrum clocking, rejects
cycle-to-cycle jitter (+/- 20% of input data bit time).
n
Programmable LCD panel power sequencing.
n
Support low voltage swing signal level (1V to 1.8V),
2.5V and 3.3V LVTTL level on CLKINP, CLKINM, D0 to
D23, DE, HSYNC and VSYNC pins
n
Support 2.5V/3.3V LVTTL level on configuration pins
n
Support 3.3V LVTTL level on GPIO pins
n
Available in 10mm x 10mm x 1mm 128pin thermally
enhanced CSP package.
n
Two-wire serial communication interface is active during
normal as well as power down mode and support data
rates up to 400KHz.
n
TIA/EIA-644, Open LDI, DVO compliance.
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
DVO is a registered trademark of Intel Corporation.
AGP or 4x AGP is a registered trademark of Intel Corporation.
October 2003
DS90C2501
T
ransmitter
with
built-in
scaler
for
L
VDS
Display
Interface
(LDI)
© 2003 National Semiconductor Corporation
DS200045
www.national.com
Block Diagram
20004552
DS90C2501
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2
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
)
-0.3V to +2.8V
Supply Voltage (V
CC3V
)
-0.3V to +3.6V
CMOS/TTL Input Voltage
-0.3V to V
CC3V
CMOS/TTL Output
Voltage
-0.3V to (V
CC
+ 0.3V)
LVDS Driver Output
Voltage
-0.3V to (V
CC
+ 0.3V)
LVDS Output Short
Circuit
Duration
Continuous
Junction Temperature
+150°C
Storage Temperature
-65°C to +150°C
Lead Temperature
(Soldering, 4 sec.)
+260°C
Typical Package Power Dissipation Capacity
@
70°C
and Max V
CC
128 CSP Package:
DS90C2501
1.8W
Maximum Operating Case Temperature: 97°C
(measured at top center of package)
ESD Rating:
DS90C2501
(HBM, 1.5k
, 100pF)
>
2 kV
(EIAJ, 0
, 200pF)
>
250 V
Recommended Operating
Conditions
Min
Nom
Max
Units
All Supply Voltage except
(V
CC3V
)
2.250
2.5
2.750
V
V
CC3V
Supply Voltage
3.0
3.3
3.6
V
Operating Free Air
Temperature (T
A
)
0
+25
+70
°C
Supply Noise Voltage (V
CC
)
up to 33Mhz
100 mV
P-P
DC Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
LVCMOS/LVTTL DC SPECIFICATIONS (All input pins when operate in LVTTL level except DUAL pin. Note: On ID0, ID1
pins have typical 30K ohm internal pull-down, and ID2 and ID3 pins have typical 3K ohm internal pull-down.)
V
IH
High Level Input Voltage
V
REF
= V
CC3V
2.0
V
CC3V
V
V
IL
Low Level Input Voltage
V
REF
= V
CC3V
-0.3
0.8
V
V
CL
Input Clamp Voltage
I
CL
= 18 mA
-0.9
-1.5
V
I
IN
Input Current
V
IN
= 0.4V, or V
CC
+1.8
+15
µA
V
IN
= GND
-15
0
µA
LVCMOS/LVTTL DC SPECIFICATIONS for DUAL pin, pin35
V
IH
DUAL
High Level Input Voltage (for
dual pixel in to dual pixel
out).
PD = V
CC3V
2.0
V
CC
V
V
IM
DUAL
High Level Input Voltage (for
single pixel in to dual pixel
out).
PD = V
CC3V
1
/
2
V
CC
-0.1
1
/
2
V
CC
1
/
2
V
CC
+0.1
V
V
IL
DUAL
High Level Input Voltage (for
single pixel in to single pixel
out).
PD = V
CC3V
0
0.4
V
V
CL
Input Clamp Voltage
I
CL
= 18 mA
-0.9
-1.5
V
I
IN
Input Current
V
IN
= 0.4V, V
CC
1.8
15
µA
V
IN
= Gnd
-15
0
µA
LVCMOS/LVTTL DC SPECIFICATIONS for MSEN, pin 98
V
OL
Low level Open Drain Output
Voltage
I
OL
= 2 mA
0.1
0.3
V
LVCMOS/LVTTL DC SPECIFICATIONS (Pin 62 to pin 69 when operate in 3.3V LVTTL level)
V
OH
High Level Input Voltage
I
OL
= 2 mA
2.2
2.95
V
V
OL
Low Level Input Voltage
0.055
0.4
V
I
OS
Output Short Circuit Current
V
OUT
= 0V
-50
-120
mA
DS90C2501
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3
DC Characteristics
(Continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Low Voltage Level DC SPECIFICATIONS (pins D0 to D23, CLKINP, CLKINM, DE, HSYNC,VSYNC)
V
DDQ
Low Swing Voltage
from GMCH
1
+1.8
V
V
ILSH
Low Swing High Level Input
Voltage
V
REF
+
100mV
V
DDQ
V
V
ILSL
Low Swing Low Level Input
Voltage
0
V
REF
-
100mV
V
V
REF
Differential Input Reference
Voltage
0.475
1
/
2
V
DDQ
0.945
V
LVDS DRIVER DC SPECIFICATIONS (Output pins AnP, AnM, CLKnP and CLKnM)
V
OD
Differential Output Voltage
R
L
= 100
250
345
450
mV
V
OD
Change in V
OD
between
Complimentary Output
States
3
35
mV
V
OS
Offset Voltage
1.125
1.32
1.475
V
V
OS
Change in V
OS
between
Complimentary Output
States
1.5
35
mV
I
OS
Output Short Circuit Current
V
OUT
= 0V
0
-8.5
-15
mA
I
OZ
Output TRI-STATE Current
PD = 0V, V
OUT
= 0V or V
CC
±
0.1
±
10
µA
SUPPLY CURRENT
I
CC
1
Transmitter Supply Current
when data input and clock
input are at Low Swing level.
R
L
= 100
, C
L
=
5 pF, DUAL pin
= GND, BAL =
GND, one 12bit
input, Pattern
Figure 1
f = 65MHz,
scaler off, 2.75V
supply
70
120
mA
f = 65 MHz,
scaler off, 3.6V
supply
38
90
mA
I
CC
2
Transmitter Supply Current
when data input and clock
input are at Low Swing level.
R
L
= 100
, C
L
=
5 pF, DUAL pin
=
1
/
2
VCC, BAL =
GND, one 12bit
input, Pattern
Figure 1
f = 108MHz,
scaler off, 2.75V
supply
85
130
mA
f = 108 MHz,
scaler off, 3.6V
supply.
75
130
mA
I
CC
3
Transmitter Supply Current
when data input and clock
input are at Low Swing level.
R
L
= 100
, C
L
=
5 pF, DUAL pin
= GND, BAL =
GND, one 12bit
input
f = 65 MHz,
scaler on, 2.75V
supply
330
415
mA
I
CC
4
Transmitter Supply Current
when data input and clock
input are at Low Swing level.
R
L
= 100
, C
L
=
5 pF, DUAL pin
=
1
/
2
V
CC
, BAL =
GND, one 12bit
input
f = 108 MHz,
scaler on, 2.75V
supply
483
610
mA
ICCTZ
Transmitter Supply Current
Power Down
PD = GND. TST1, TST2, TST3, ID0,
ID1, ID2, ID3, A0, A1, A2, RES1,
RES2, RES3, RES4 = GND, BAL =
GND.
75
µA
DS90C2501
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4
Two-Wire Serial Communication Interface
Unless otherwise noted, below specifications apply for V
CC
3V pin = 3.0V to 3.6V.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
IN
(1)
Logical " 1 " input voltage
2.1
V
V
IN
(0)
Logical " 0 " input voltage
0.8
V
V
OL
Serial Bus Low level output
voltage
I
OL
= 3mA
0.1
0.4
V
I
OL
= 6mA
0.15
0.6
V
Recommended DVO Port Input Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Min
Typ
Max
Units
TCIT
TxCLK IN Transition Time (Figure 4)
DUAL = Gnd
0.8
1.2
2.4
ns
TCIP
TxCLK IN Period (Figure 5)
DUAL = Gnd
5.9
T
40
ns
TCIH
TxCLK in High Time (Figure 5)
0.35T
0.5T
0.65T
ns
TCIL
TxCLK in Low Time (Figure 5)
0.35T
0.5T
0.65T
ns
TXIT
D0 to D23 Transition Time
1
ns
VDDQ
Low Swing Voltage Amplitude from GMCH
1.0
1.8
V
DS90C2501
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