DS75160A/DS75161A
IEEE-488 GPIB Transceivers
General Description
This family of high-speed-Schottky 8-channel bi-directional
transceivers is designed to interface TTL/MOS logic to the
IEEE Standard 488-1978 General Purpose Interface Bus
(GPIB). PNP inputs are used at all driver inputs for minimum
loading, and hysteresis is provided at all receiver inputs for
added noise margin. The IEEE-488 required bus termination
is provided internally with an active turn-off feature which dis-
connects the termination from the bus when V
CC
is removed.
The General Purpose Interface Bus is comprised of 16 sig-
nal lines -- 8 for data and 8 for interface management. The
data lines are always implemented with DS75160A, and the
management lines are either implemented with DS75161A in
a single-controller system.
Features
n
8-channel bi-directional non-inverting transceivers
n
Bi-directional control implemented with TRI-STATE
®
output design
n
Meets IEEE Standard 488-1978
n
High-speed Schottky design
n
Low power consumption
n
High impedance PNP inputs (drivers)
n
500 mV (typ) input hysteresis (receivers)
n
On-chip bus terminators
n
No bus loading when V
CC
is removed
n
Pin selectable open collector mode on DS75160A driver
outputs
n
Accommodates multi-controller systems
Connection Diagrams
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
Dual-In-Line Package
DS005804-1
Top View
Order Number DS75160AN or DS75160AWM
See NS Package Number M20B or N20A
Dual-In-Line Package
DS005804-16
Order Number DS75161AN or DS75161AWM
See NS Package Number M20B or N20B
May 1999
DS75160A/DS75161A
IEEE-488
GPIB
T
ransceivers
© 1999 National Semiconductor Corporation
DS005804
www.national.com
Absolute Maximum Ratings
(Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage, V
CC
7.0V
Input Voltage
5.5V
Storage Temperature Range
-65°C to +150°C
Lead Temperature (Soldering, 4 sec.)
260°C
Maximum Power Dissipation (Note 1) at 25°C
Molded Package
1897 mW
Min
Max
Units
V
CC
, Supply Voltage
4.75
5.25
V
T
A
, Ambient Temperature
0
70
°C
I
OL
, Output Low Current
Bus
48
mA
Terminal
16
mA
Note 1: Derate molded package 15.2 mW/°C above 25°C.
Electrical Characteristics
(Notes 3, 4)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
IH
High-Level Input Voltage
2
V
V
IL
Low-Level Input Voltage
0.8
V
V
IK
Input Clamp Voltage
I
I
= -18 mA
-0.8
-1.5
V
V
HYS
Input Hysteresis
Bus
400
500
mV
V
OH
High-Level
Terminal
I
OH
= -800 µA
2.7
3.5
V
Output Voltage
Bus (Note 4)
I
OH
= -5.2 mA
2.5
3.4
V
OL
Low-Level
Terminal
I
OL
= 16 mA
0.3
0.5
V
Output Voltage
Bus
I
OH
= 48 mA
0.4
0.5
I
IH
High-Level
Terminal and
V
I
= 5.5V
0.2
100
µA
Input Current
TE, PE, DC,
V
I
= 2.7V
0.1
20
I
IL
Low-Level
SC Inputs
V
I
= 0.5V
-10
-100
µA
Input Current
V
BIAS
Terminator Bias
Driver
I
I(bus)
= 0 (No Load)
2.5
3.0
3.7
V
Voltage at Bus Port
Disabled
I
LOAD
Terminator
V
I(bus)
= -1.5V to 0.4V
-1.3
Bus Loading
V
I(bus)
= 0.4V to 2.5V
0
-3.2
Current
Bus
Driver
V
I(bus)
= 2.5V to 3.7V
2.5
mA
Disabled
-3.2
V
I(bus)
= 3.7V to 5V
0
2.5
V
I(bus)
= 5V to 5.5V
0.7
2.5
V
CC
= 0V, V
I(bus)
= 0V to 2.5V
40
µA
I
OS
Short-Circuit
Terminal
V
I
= 2V, V
O
= 0V (Note 5)
-15
-35
-75
mA
Output Current
Bus (Note 6)
-35
-75
-150
I
CC
Supply Current
DS75160A
Transmit, TE = 2V, PE = 2V, V
I
= 0.8V
85
125
Receive, TE = 0.8V, PE = 2V, V
I
= 0.8V
70
100
mA
DS75161A
TE = 0.8V, DC = 0.8V, V
I
= 0.8V
84
125
C
IN
Bus-Port
Bus
V
CC
= 5V or 0V, V
I
= 0V to 2V,
20
30
pF
Capacitance
f = 1 MHz
Note 2: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
should be operated at these limits. The table of "Electrical Characteristics" provides conditions for actual device operation.
Note 3: Unless otherwise specified, min/max limits apply across the 0°C to +70°C temperature range and the 4.75V to 5.25V power supply range. All typical values
are for T
A
= 25°C and V
CC
= 5.0V.
Note 4: All currents into device pins are shown as positive; all currents out of device pins are shown as negative; all voltages are referenced to ground, unless oth-
erwise specified. All values shown as max or min are so classified on absolute value basis.
Note 5: Only one output at a time should be shorted.
Note 6: This characteristic does not apply to outputs on DS75161A that are open collector.
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2
Switching Characteristics
(Note 7)
V
CC
= 5.0V
±
5%, T
A
= 0°C to 70°C
Symbol
Parameter
From
To
Conditions
DS75160A
DS75161A
DS75162A
Units
Min Typ Max Min Typ Max Min Typ Max
t
PLH
Propagation Delay Time,
V
L
= 2.3V
10
20
10
20
10
20
ns
Low to High Level Output
Terminal
Bus
R
L
= 38.3
t
PHL
Propagation Delay Time,
C
L
= 30 pF
14
20
14
20
14
20
ns
High to Low Level Output
Figure 1
t
PLH
Propagation Delay Time,
V
L
= 5.0V
14
20
14
20
14
20
ns
Low to High Level Output
Bus
Terminal R
L
= 240
t
PHL
Propagation Delay Time,
C
L
= 30 pF
10
20
10
20
10
20
ns
High to Low Level Output
Figure 2
t
PZH
Output Enable Time
V
I
= 3.0V
19
32
23
40
23
40
ns
to High Level
V
L
= 0V
t
PHZ
Output Disable Time
TE, DC,
R
L
= 480
15
22
15
25
15
25
ns
From High Level
or SC
C
L
= 15 pF
Figure 1
t
PZL
Output Enable Time
(Note 8)
Bus
V
I
= 0V
24
35
28
48
28
48
ns
to Low Level
(Note 9)
V
L
= 2.3V
t
PLZ
Output Disable Time
R
L
= 38.3
17
25
17
27
17
27
ns
From Low Level
C
L
= 15 pF
Figure 1
t
PZH
Output Enable Time
V
I
= 3.0V
17
33
18
40
18
40
ns
to High Level
V
L
= 0V
t
PHZ
Output Disable Time
TE, DC,
R
L
= 3 k
15
25
22
33
22
33
ns
From High Level
or SC
Terminal C
L
= 15 pF
Figure 1
t
PZL
Output Enable Time
(Note 8)
V
I
= 0V
25
39
28
52
28
52
ns
to Low Level
(Note 9)
V
L
= 5V
t
PLZ
Output Disable Time
R
L
= 280
15
27
20
35
20
35
ns
From Low Level
C
L
= 15 pF
Figure 1
t
PZH
Output Pull-Up Enable
V
I
= 3V
10
17
NA
NA
ns
Time (DS75160A Only)
PE
Bus
V
L
= 0V
t
PHZ
Output Pull-Up Disable
(Note 8)
R
L
= 480
10
15
NA
NA
ns
Time (DS75160A Only)
C
L
= 15 pF
Figure 1
Note 7: Typical values are for V
CC
= 5.0V and T
A
= 25°C and are meant for reference only.
Note 8: Refer to Functional Truth Tables for control input definition.
Note 9: Test configuration should be connected to only one transceiver at a time due to the high current stress caused by the V
I
voltage source when the output con-
nected to that input becomes active.
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3
Switching Load Configurations
Connection Diagrams
Functional Description
DS75160A
This device is an 8-channel bi-directional transceiver with
one common direction control input, denoted TE. When used
to implement the IEEE-488 bus, this device is connected to
the eight data bus lines, designated DIO
1
DIO
8
. The port
connections to the bus lines have internal terminators, in ac-
cordance with the IEEE-488 Standard, that are deactivated
when the device is powered down. This feature guarantees
no bus loading when V
CC
= 0V. The bus port outputs also
have a control mode that either enables or disables the ac-
tive upper stage of the totem-pole configuration. When this
control input, denoted PE, is in the high state, the bus out-
puts operate in the high-speed totem-pole mode. When PE
is in the low state, the bus outputs operate as open collector
outputs which are necessary for parallel polling.
DS75161A
This device is also an 8-channel bi-directional transceiver
which is specifically configured to implement the eight man-
agement signal lines of the IEEE-488 bus. This device,
paired with the DS75160A, forms the complete 16-line inter-
face between the IEEE-488 bus and a single controller in-
strumentation system. In compliance with the system organi-
zation of the management signal lines, the SRQ, NDAC, and
NRFD bus port outputs are open collector. In contrast to the
DS75160A, these open collector outputs are a fixed configu-
ration. The direction control is divided into three groups. The
DAV, NDAC, and NRFD transceiver directions are controlled
by the TE input. The ATN, SRQ, REN, and IFC transceiver
directions are controlled by the DC input. The EOI trans-
ceiver direction is a function of both the TE and DC inputs, as
well as the logic level present on the ATN channel. The port
connections to the bus lines have internal terminators identi-
cal to the DS75160A.
DS005804-8
V
C
logic high = 3.0V
V
C
logic low = 0V
*C
L
includes jig and probe capacitance
FIGURE 1.
DS005804-9
V
C
logic high = 3.0V
V
C
logic low = 0V
*C
L
includes jig and probe capacitance
FIGURE 2.
Dual-In-Line Package
DS005804-2
Top View
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4
Functional Description
(Continued)
Table of Signal Line Abbreviations
Signal Line
Mne-
Classi-
monic
Definition
Device
fication
DC
Direction Control
DS75161A
Control
PE
Pull-Up Enable
DS75160A
Signals
TE
Talk Enable
All
SC
System Controller
Data
B1B8
Bus Side of Device
I/O Ports
D1D8
Terminal Side
DS75160A
of Device
ATN
Attention
DAV
Data Valid
EOI
End or Identify
Management
IFC
Interface Clear
DS75161A
Signals
NDAC
Not Data Accepted
NRFD
Not Ready for Data
REN
Remote Enable
SRQ
Service Request
Logic Diagrams
DS75160A
DS005804-4
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