ChipFind - Datasheet

Part Number DM74180

Download:  PDF   ZIP
TL F 6559
DM54180DM74180
9-Bit
Parity
GeneratorsCheckers
June 1989
DM54180 DM74180 9-Bit Parity Generators Checkers
General Description
These universal 9-bit (8 data bits plus 1 parity bit) parity
generators checkers feature odd even outputs and control
inputs to facilitate operation in either odd or even parity ap-
plications Depending on whether even or odd parity is be-
ing generated or checked the even or odd input can be
utilized as the parity or 9th-bit input The word-length capa-
bility is easily expanded by cascading
Input buffers are provided so that each data input repre-
sents only one normalized series 54 74 load A full fan-out
to 10 normalized series 54 74 loads is available from each
of the outputs at a low logic level A fan-out to 20 normal-
ized loads is provided at a high logic level to facilitate the
connection of unused inputs to used inputs
Connection Diagram
Dual-In-Line Package
TL F 6559 ­ 1
Order Number DM54180J DM54180W or DM74180N
See NS Package Number J14A N14A or W14B
Function Table
Inputs
Outputs
R of H's at
Even
Odd
R
R
A thru H
Even
Odd
Even
H
L
H
L
Odd
H
L
L
H
Even
L
H
L
H
Odd
L
H
H
L
X
H
H
L
L
X
L
L
H
H
H
e
High Level L
e
Low Level X
e
Don't Care
C1995 National Semiconductor Corporation
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings
(Note)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
7V
Input Voltage
5 5V
Operating Free Air Temperature Range
DM54
b
55 C to
a
125 C
DM74
0 C to
a
70 C
Storage Temperature Range
b
65 C to
a
150 C
Note
The ``Absolute Maximum Ratings'' are those values
beyond which the safety of the device cannot be guaran-
teed The device should not be operated at these limits The
parametric values defined in the ``Electrical Characteristics''
table are not guaranteed at the absolute maximum ratings
The ``Recommended Operating Conditions'' table will define
the conditions for actual device operation
Recommended Operating Conditions
Symbol
Parameter
DM54180
DM74180
Units
Min
Nom
Max
Min
Nom
Max
V
CC
Supply Voltage
4 5
5
5 5
4 75
5
5 25
V
V
IH
High Level Input Voltage
2
2
V
V
IL
Low Level Input Voltage
0 8
0 8
V
I
OH
High Level Output Current
b
0 8
b
0 8
mA
I
OL
Low Level Output Current
16
16
mA
T
A
Free Air Operating Temperature
b
55
125
0
70
C
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 1)
V
I
Input Clamp Voltage
V
CC
e
Min I
I
e b
12 mA
b
1 5
V
V
OH
High Level Output
V
CC
e
Min I
OH
e
Max
2 4
V
Voltage
V
IL
e
Max V
IH
e
Min
V
OL
Low Level Output
V
CC
e
Min I
OL
e
Max
0 4
V
Voltage
V
IH
e
Min V
IL
e
Max
I
I
Input Current
Max
V
CC
e
Max V
I
e
5 5V
1
mA
Input Voltage
I
IH
High Level Input
V
CC
e
Max
Odd or Even
80
m
A
Current
V
I
e
2 4V
Data
40
I
IL
Low Level Input
V
CC
e
Max
Odd or Even
b
3 2
mA
Current
V
I
e
0 4V
Data
b
1 6
I
OS
Short Circuit
V
CC
e
Max
DM54
b
20
b
55
mA
Output Current
(Note 2)
DM74
b
18
b
55
I
CC
Supply Current
V
CC
e
Max
DM54
34
49
mA
(Note 3)
DM74
34
56
Note 1
All typicals are at V
CC
e
5V T
A
e
25 C
Note 2
Not more than one output should be shorted at a time
Note 3
I
CC
is measured with EVEN and ODD inputs at 4 5V all other inputs and outputs open
2
Switching Characteristics
at V
CC
e
5V and T
A
e
25 C (See Section 1 for Test Waveforms and Output Load)
Symbol
Parameter
From (Input)
Conditions
Min
Max
Units
To (Output)
t
PLH
Propagation Delay Time
Data to
C
L
e
15 pF
60
ns
Low to High Level Output
R
Even
R
L
e
400X
t
PHL
Propagation Delay Time
Data to
Odd Input Low
68
ns
High to Low Level Output
R
Even
t
PLH
Propagation Delay Time
Data to
48
ns
Low to High Level Output
R
Odd
t
PHL
Propagation Delay Time
Data to
38
ns
High to Low Level Output
R
Odd
t
PLH
Propagation Delay Time
Data to
C
L
e
15 pF
48
ns
Low to High Level Output
R
Even
R
L
e
400X
t
PHL
Propagation Delay Time
Data to
Odd Input High
38
ns
High to Low Level Output
R
Even
t
PLH
Propagation Delay Time
Data to
60
ns
Low to High Level Output
R
Odd
t
PHL
Propagation Delay Time
Data to
68
ns
High to Low Level Output
R
Odd
t
PLH
Propagation Delay Time
Even or Odd to
C
L
e
15 pF
20
ns
Low to High Level Output
R
Even or R Odd
R
L
e
400X
t
PHL
Propagation Delay Time
Even or Odd to
10
ns
High to Low Level Output
R
Even or R Odd
Logic Diagram
TL F 6559 ­ 2
3
4
Physical Dimensions
inches (millimeters)
14-Lead Ceramic Dual-In-Line Package (J)
Order Number DM54180J
NS Package Number J14A
14-Lead Molded Dual-In-Line Package (N)
Order Number DM74180N
NS Package Number N14A
5