Document Outline
- COVER
- FEATURES
- ORDERING INFORMATION
- FUNCTION LIST
- 1. PIN CONFIGURATION (Top View)
- 2. BLOCK DIAGRAM
- 3. PIN FUNCTIONS
- 3.1 Port Pins
- 3.2 Non-port Pins
- 3.3 I/O Circuits for Pins
- 3.4 Handling of Unused Pins
- 4. SWITCHING BETWEEN MK I AND MK II MODES
- 4.1 Differences between Mk I Mode and Mk II Mode
- 4.2 Setting of Stack Bank Selection (SBS) Register
- 5. DIFFERENCES BETWEEN uPD75P0016 AND uPD750004, 750006, AND 750008
- 6. MEMORY CONFIGURATION
- 7. INSTRUCTION SET
- 8. ONE-TIME PROM (PROGRAM MEMORY) WRITE AND VERIFY
- 8.1 Operation Modes for Program Memory Write/Verify
- 8.2 Steps in Program Memory Write Operation
- 8.3 Steps in Program Memory Read Operation
- 8.4 One-Time PROM Screening
- 9. ELECTRICAL SPECIFICATIONS
- 10. CHARACTERISTICS CURVES (REFERENCE VALUE)
- 11. PACKAGE DRAWINGS
- 12. RECOMMENDED SOLDERING CONDITIONS
- APPENDIX A. FUNCTION LIST OF uPD75008, 750008, 75P0016
- APPENDIX B. DEVELOPMENT TOOLS
- APPENDIX C. RELATED DOCUMENTS
The mark
shows major revised points.
The
µ
PD75P0016 replaces the
µ
PD750008's internal mask ROM with a one-time PROM and features expanded
ROM capacity.
Because the
µ
PD75P0016 supports programming by users, it is suitable for use in prototype testing for system
development using the
µ
PD750004, 750006, or 750008 products, and for use in small-lot production.
Detailed information about product features and specifications can be found in the following document
µ
PD750008 User's Manual: U10740E
FEATURES
·
Compatible with
µ
PD750008
·
Memory capacity:
· PROM : 16384
×
8 bits
· RAM
: 512
×
4 bits
·
Can operate in same power supply voltage as the mask ROM version
µ
PD750008
· V
DD
= 2.2 to 5.5 V
·
Supports QTOPTM microcontroller
Remark
QTOP Microcontroller is the general name for a total support service that includes imprinting, marking,
screening, and verifying one-time PROM single-chip microcontrollers offered by NEC.
ORDERING INFORMATION
Part number
Package
ROM (
×
8 bits)
µ
PD75P0016CU
42-pin plastic shrink DIP (600 mil, 1.778-mm pitch)
16384
µ
PD75P0016GB-3BS-MTX
44-pin plastic QFP (10
×
10 mm, 0.8-mm pitch)
16384
Caution On-chip pull-up resistors by mask option cannot be provided.
µ
PD75P0016
MOS INTEGRATED CIRCUIT
4-BIT SINGLE-CHIP MICROCONTROLLER
The information in this document is subject to change without notice.
Document No. U10328EJ3V1DS00 (3rd edition)
Date Published August 2000 N CP(K)
Printed in Japan
©
1995
DATA SHEET
µ
PD75P0016
2
Data Sheet U10328EJ3V1DS00
FUNCTION LIST
Item
Function
Instruction execution time
· 0.95, 1.91, 3.81, 15.3
µ
s (main system clock: at 4.19 MHz operation)
· 0.67, 1.33, 2.67, 10.7
µ
s (main system clock: at 6.0 MHz operation)
· 122
µ
s (subsystem clock: at 32.768 kHz operation)
On-chip memory
PROM
16384
×
8 bits
RAM
512
×
4 bits
General register
· In 4-bit operation: 8
×
4 banks
· In 8-bit operation: 4
×
4 banks
I/O port
CMOS input
8
Connection of on-chip pull-up resistor specifiable by software: 7
CMOS I/O
18
Direct LED drive capability
Connection of on-chip pull-up resistor specifiable by software: 18
N-ch open drain I/O
8
Direct LED drive capability
13 V withstand voltage
Total
34
Timer
4 channels
· 8-bit timer/event counter: 1 channel
· 8-bit timer counter: 1 channel
· Basic interval timer/watchdog timer: 1 channel
· Watch timer: 1 channel
Serial interface
· 3-wire serial I/O mode ... Switching of MSB/LSB-first
· 2-wire serial I/O mode
· SBI mode
Bit sequential buffer (BSB)
16 bits
Clock output (PCL)
·
, 524, 262, 65.5 kHz (main system clock: at 4.19 MHz operation)
·
, 750, 375, 93.8 kHz (main system clock: at 6.0 MHz operation)
Buzzer output (BUZ)
· 2, 4, 32 kHz (main system clock: at 4.19 MHz operation or subsystem clock:
at 32.768 kHz operation)
· 2.93, 5.86, 46.9 kHz (main system clock: at 6.0 MHz operation)
Vectored interrupt
External: 3 Internal: 4
Test input
External: 1 Internal: 1
System clock oscillation circuit
· Main system clock oscillation ceramic/crystal oscillation circuit
· Subsystem clock oscillation crystal oscillation circuit
Standby function
STOP/HALT mode
Operating ambient temperature
T
A
= 40 to +85°C
Supply voltage
V
DD
= 2.2 to 5.5 V
Package
42-pin plastic shrink DIP (600 mil, 1.778-mm pitch)
44-pin plastic QFP (10
×
10 mm, 0.8-mm pitch)
µ
PD75P0016
3
Data Sheet U10328EJ3V1DS00
TABLE OF CONTENTS
1.
PIN CONFIGURATION ........................................................................................................................ 4
2.
BLOCK DIAGRAM ............................................................................................................................. 6
3.
PIN FUNCTIONS ................................................................................................................................ 7
3.1
Port Pins ..................................................................................................................................................... 7
3.2
Non-port Pins ............................................................................................................................................. 8
3.3
I/O Circuits for Pins ................................................................................................................................... 9
3.4
Handling of Unused Pins ........................................................................................................................ 11
4.
SWITCHING BETWEEN MK I AND MK II MODES .......................................................................... 12
4.1
Differences between Mk I Mode and Mk II Mode ................................................................................... 12
4.2
Setting of Stack Bank Selection (SBS) Register ................................................................................... 13
5.
DIFFERENCES BETWEEN
µ
PD75P0016 AND
µ
PD750004, 750006, AND 750008 ...................... 14
6.
MEMORY CONFIGURATION ........................................................................................................... 15
7.
INSTRUCTION SET .......................................................................................................................... 17
8.
ONE-TIME PROM (PROGRAM MEMORY) WRITE AND VERIFY ................................................... 28
8.1
Operation Modes for Program Memory Write/Verify ............................................................................ 28
8.2
Steps in Program Memory Write Operation .......................................................................................... 29
8.3
Steps in Program Memory Read Operation ........................................................................................... 30
8.4
One-Time PROM Screening .................................................................................................................... 31
9.
ELECTRICAL SPECIFICATIONS ..................................................................................................... 32
10. CHARACTERISTIC CURVES (REFERENCE VALUE) .................................................................... 46
11. PACKAGE DRAWINGS .................................................................................................................... 48
12. RECOMMENDED SOLDERING CONDITIONS ................................................................................ 50
APPENDIX A. FUNCTION LIST OF
µ
PD75008, 750008, 75P0016 ....................................................... 51
APPENDIX B. DEVELOPMENT TOOLS ................................................................................................. 53
APPENDIX C. RELATED DOCUMENTS ................................................................................................ 57
µ
PD75P0016
4
Data Sheet U10328EJ3V1DS00
P72/KR6
1
P13/TI0
33
P71/KR5
2
P00/INT4
32
P70/KR4
3
P01/SCK
31
P63/KR3
4
P02/SO/SB0
30
P62/KR2
5
P03/SI/SB1
29
P61/KR1
6
P80
28
P60/KR0
7
P81
27
P53/D7
8
P30/MD0
26
P52/D6
9
P31/MD1
25
P51/D5
10
P32/MD2
24
P50/D4
11
P33/MD3
23
P73/KR7
44
NC
12
P20/PTO0
43
P43/D3
13
P21/PTO1
42
P42/D2
14
P22/PCL
41
P41/D1
15
P23/BUZ
40
P40/D0
16
V
DD
39
V
SS
17
V
PP
Note
38
XT1
18
P10/INT0
37
XT2
19
P11/INT1
36
RESET
20
P12/INT2
35
X1
21
NC
34
X2
22
1. PIN CONFIGURATION (Top View)
·
42-pin plastic shrink DIP (600 mil, 1.778-mm pitch)
µ
PD75P0016CU
Note
Directly connect V
PP
to V
DD
in the normal operation mode.
·
44-pin plastic QFP (10
×
10 mm, 0.8-mm pitch)
µ
PD75P0016GB-3BS-MTX
Note
Directly connect V
PP
to V
DD
in the normal operation mode.
XT1
1
V
SS
42
XT2
2
P40/D0
41
RESET
3
P41/D1
40
X1
4
P42/D2
39
X2
5
P43/D3
38
P33/MD3
6
P50/D4
37
P32/MD2
7
P51/D5
36
P31/MD1
8
P52/D6
35
P30/MD0
9
P53/D7
34
P81
10
P60/KR0
33
P80
11
P61/KR1
32
P03/SI/SB1
12
P62/KR2
31
P02/SO/SB0
13
P63/KR3
30
P01/SCK
14
P70/KR4
29
P00/INT4
15
P71/KR5
28
P13/TI0
16
P72/KR6
27
P12/INT2
17
P73/KR7
26
P11/INT1
18
P20/PTO0
25
P10/INT0
19
P21/PTO1
24
V
PPNote
20
P22/PCL
23
V
DD
21
P23/BUZ
22
µ
PD75P0016
5
Data Sheet U10328EJ3V1DS00
PIN IDENTIFICATIONS
P00-P03
: Port0
SCK
: Serial Clock
P10-P13
: Port1
SI
: Serial Input
P20-P23
: Port2
SO
: Serial Output
P30-P33
: Port3
SB0, SB1
: Serial Data Bus 0,1
P40-P43
: Port4
RESET
: Reset
P50-P53
: Port5
TI0
: Timer Input 0
P60-P63
: Port6
PTO0, PTO1
: Programmable Timer Output 0, 1
P70-P73
: Port7
BUZ
: Buzzer Clock
P80, P81
: Port8
PCL
: Programmable Clock
KR0-KR7
: Key Return 0-7
INT0, 1, 4
: External Vectored Interrupt 0, 1, 4
V
DD
: Positive Power Supply
INT2
: External Test Input 2
V
SS
: Ground
X1, X2
: Main System Clock Oscillation 1, 2
V
PP
: Programming Power Supply
XT1, XT2
: Subsystem Clock Oscillation 1, 2
NC
: No Connection
MD0-MD3
: Mode Selection 0-3
D0-D7
: Data Bus 0-7
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