MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

REV 0

Motorola, Inc. 1997

10/97

Advance Information

Analog Multiplexers/

Demultiplexers

HighPerformance SiliconGate CMOS

The MC54/74HC4051A, MC74HC4052A and MC54/74HC4053A utilize

silicongate CMOS technology to achieve fast propagation delays, low ON
resistances, and low OFF leakage currents. These analog multiplexers/
demultiplexers control analog voltages that may vary across the complete
power supply range (from VCC to VEE).

The HC4051A, HC4052A and HC4053A are identical in pinout to the

metalgate MC14051AB, MC14052AB and MC14053AB. The ChannelSe-
lect inputs determine which one of the Analog Inputs/Outputs is to be
connected, by means of an analog switch, to the Common Output/Input.
When the Enable pin is HIGH, all analog switches are turned off.

The ChannelSelect and Enable inputs are compatible with standard

CMOS outputs; with pullup resistors they are compatible with LSTTL
outputs.

These devices have been designed so that the ON resistance (Ron) is

more linear over input voltage than Ron of metalgate CMOS analog
switches.

For a multiplexer/demultiplexer with channelselect latches, see

HC4351A.

Fast Switching and Propagation Speeds

Low Crosstalk Between Switches

Diode Protection on All Inputs/Outputs

Analog Power Supply Range (VCC VEE) = 2.0 to 12.0 V

Digital (Control) Power Supply Range (VCC GND) = 2.0 to 6.0 V

Improved Linearity and Lower ON Resistance Than MetalGate
Counterparts

Low Noise

In Compliance With the Requirements of JEDEC Standard No. 7A

Chip Complexity: HC4051A -- 184 FETs or 46 Equivalent Gates

HC4052A -- 168 FETs or 42 Equivalent Gates
HC4053A -- 156 FETs or 39 Equivalent Gates

LOGIC DIAGRAM

MC54/74HC4051A

SinglePole, 8Position Plus Common Off

ENABLE

MULTIPLEXER/

DEMULTIPLEXER

ANALOG

INPUTS/

CHANNEL

INPUTS

PIN 16 = VCC

PIN 7 = VEE

PIN 8 = GND

COMMON
OUTPUT/
INPUT

VCC

Enable VEE GND

Pinout: MC54/74HC4051A (Top View)

OUTPUTS

SELECT

This document contains information on a new product. Specifications and information herein are subject to
change without notice.

L
L
L
L

H
H
H
H
X

L
L

H
H

L
L

H
H
X

H
X

MC54/74HC4051A

MC74HC4052A

MC54/74HC4053A

FUNCTION TABLE MC54/74HC4051A

Control Inputs

ON Channels

Enable

Select

X0
X1
X2
X3
X4
X5
X6
X7

NONE

L
L
L
L
L
L
L
L

X = Don't Care

D SUFFIX

SOIC PACKAGE

CASE 751B05

N SUFFIX

PLASTIC PACKAGE

CASE 64808

J SUFFIX

CERAMIC PACKAGE

CASE 62010

ORDERING INFORMATION

MC54HCXXXXAJ
MC74HCXXXXAN
MC74HCXXXXAD
MC74HCXXXXADW
MC74HCXXXXADT

Ceramic
Plastic
SOIC
SOIC Wide
TSSOP

DT SUFFIX

TSSOP PACKAGE

CASE 948F01

DW SUFFIX

SOIC WIDE PACKAGE

CASE 751G02

MC54/74HC4051A MC74HC4052A MC54/74HC4053A

MOTOROLA

HighSpeed CMOS Logic Data

DL129 -- Rev 6

LOGIC DIAGRAM

MC74HC4052A

DoublePole, 4Position Plus Common Off

ENABLE

X SWITCH

Y SWITCH

ANALOG

INPUTS/OUTPUTS

CHANNEL-SELECT

INPUTS

PIN 16 = VCC

PIN 7 = VEE

PIN 8 = GND

COMMON
OUTPUTS/INPUTS

L
L

H
H
X

H
X

FUNCTION TABLE MC74HC4052A

Control Inputs

ON Channels

Enable

Select

X0
X1
X2
X3

L
L
L
L

X = Don't Care

Pinout: MC74HC4052A (Top View)

VCC

Enable VEE GND

Y0
Y1
Y2
Y3

NONE

LOGIC DIAGRAM

MC54/74HC4053A

Triple SinglePole, DoublePosition Plus Common Off

ENABLE

X SWITCH

Y SWITCH

ANALOG

INPUTS/OUTPUTS

CHANNEL-SELECT

INPUTS

PIN 16 = VCC

PIN 7 = VEE

PIN 8 = GND

COMMON
OUTPUTS/INPUTS

L
L
L
L

H
H
H
H
X

L
L

H
H

L
L

H
H
X

H
X

FUNCTION TABLE MC54/74HC4053A

Control Inputs

ON Channels

Enable

Select

L
L
L
L
L
L
L
L

X = Don't Care

Pinout: MC54/74HC4053A (Top View)

VCC

Enable VEE GND

Z0
Z0
Z0
Z0
Z1
Z1
Z1
Z1

Y0
Y0
Y1
Y1
Y0
Y0
Y1
Y1

X0
X1
X0
X1
X0
X1
X0
X1

NONE

Z SWITCH

NOTE: This device allows independent control of each switch.
ChannelSelect Input A controls the XSwitch, Input B controls
the YSwitch and Input C controls the ZSwitch

MC54/74HC4051A MC74HC4052A MC54/74HC4053A

HighSpeed CMOS Logic Data
DL129 -- Rev 6

MOTOROLA

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

MAXIMUM RATINGS*

ÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎ

Value

ÎÎÎ

Unit

ÎÎÎ

VCC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Positive DC Supply Voltage

(Referenced to GND)

(Referenced to VEE)

ÎÎÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎ

0.5 to + 7.0

0.5 to + 14.0

ÎÎÎ

VEE

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Negative DC Supply Voltage (Referenced to GND)

ÎÎÎÎÎÎ

7.0 to + 5.0

ÎÎÎ

VIS

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Analog Input Voltage

ÎÎÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎ

VEE 0.5 to

VCC + 0.5

ÎÎÎ

Vin

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Digital Input Voltage (Referenced to GND)

ÎÎÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎ

0.5 to VCC + 0.5

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Current, Into or Out of Any Pin

ÎÎÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎ

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Power Dissipation in Still Air, Plastic or Ceramic DIP

SOIC Package

TSSOP Package

ÎÎÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎ

750
500
450

ÎÎÎ

Tstg

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Storage Temperature Range

ÎÎÎÎÎÎ

65 to + 150

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Lead Temperature, 1 mm from Case for 10 Seconds

Plastic DIP, SOIC or TSSOP Package

Ceramic DIP

ÎÎÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎ

260
300

ÎÎÎ

* Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

Derating -- Plastic DIP: 10 mW/

C from 65

to 125

Ceramic DIP: 10 mW/

C from 100

to 125

SOIC Package: 7 mW/

C from 65

to 125

TSSOP Package: 6.1 mW/

C from 65

to 125

For high frequency or heavy load considerations, see Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎ

Min

ÎÎÎ

Max

ÎÎÎ

Unit

ÎÎÎÎ

VCC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Positive DC Supply Voltage

(Referenced to GND)

(Referenced to VEE)

ÎÎÎ

2.0
2.0

ÎÎÎ

6.0

12.0

ÎÎÎ

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

VEE

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Negative DC Supply Voltage, Output (Referenced to
GND)

ÎÎÎ

6.0

ÎÎÎ

GND

ÎÎÎ

ÎÎÎÎ

VIS

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Analog Input Voltage

ÎÎÎ

VEE

ÎÎÎ

VCC

ÎÎÎ

ÎÎÎÎ

Vin

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Digital Input Voltage (Referenced to GND)

ÎÎÎ

GND

ÎÎÎ

VCC

ÎÎÎ

ÎÎÎÎ

VIO*

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Static or Dynamic Voltage Across Switch

ÎÎÎ

1.2

ÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Operating Temperature Range, All Package Types

ÎÎÎ

+ 125

ÎÎÎ

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

tr, tf

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Input Rise/Fall Time

VCC = 2.0 V

(Channel Select or Enable Inputs)

VCC = 3.0 V

VCC = 4.5 V
VCC = 6.0 V

ÎÎÎ

0
0
0
0

ÎÎÎ

1000

600
500
400

ÎÎÎ

* For voltage drops across switch greater than 1.2V (switch on), excessive VCC current may be

drawn; i.e., the current out of the switch may contain both VCC and switch input components. The
reliability of the device will be unaffected unless the Maximum Ratings are exceeded.

This device contains protection

circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND

(Vin or Vout)

VCC.

Unused inputs must always be

tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.

MC54/74HC4051A MC74HC4052A MC54/74HC4053A

MOTOROLA

HighSpeed CMOS Logic Data

DL129 -- Rev 6

DC CHARACTERISTICS -- Digital Section

(Voltages Referenced to GND) VEE = GND, Except Where Noted

b l

di i

VCC

Guaranteed Limit

U i

Symbol

Parameter

Condition

VCC

55 to 25

125

Unit

VIH

Minimum HighLevel Input Voltage,
ChannelSelect or Enable Inputs

Ron = Per Spec

2.0
3.0
4.5
6.0

1.50
2.10
3.15
4.20

VIL

Maximum LowLevel Input Voltage,
ChannelSelect or Enable Inputs

Ron = Per Spec

2.0
3.0
4.5
6.0

0.5
0.9

1.35

1.8

0.5
0.9

1.35

1.8

0.5
0.9

1.35

1.8

Iin

Maximum Input Leakage Current,
ChannelSelect or Enable Inputs

Vin = VCC or GND,
VEE = 6.0 V

6.0

0.1

1.0

ICC

Maximum Quiescent Supply
Current (per Package)

Channel Select, Enable and
VIS = VCC or GND;

VEE = GND

VIO = 0 V

VEE = 6.0

6.0
6.0

1
4

10
40

20
80

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).

DC CHARACTERISTICS -- Analog Section

b l

di i

Guaranteed Limit

U i

Symbol

Parameter

Condition

VCC

VEE

55 to 25

125

Unit

Ron

Maximum "ON" Resistance

Vin = VIL or VIH; VIS = VCC to

VEE; IS

2.0 mA

(Figures 1, 2)

4.5
4.5
6.0

0.0

4.5
6.0

190
120
100

240
150
125

280
170
140

Vin = VIL or VIH; VIS = VCC or

VEE (Endpoints); IS

2.0 mA

(Figures 1, 2)

4.5
4.5
6.0

0.0

4.5
6.0

150
100

190
125
100

230
140

115

Ron

Maximum Difference in "ON"
Resistance Between Any Two
Channels in the Same Package

Vin = VIL or VIH;
VIS = 1/2 (VCC VEE);
IS

2.0 mA

4.5
4.5
6.0

0.0

4.5
6.0

30
12
10

35
15
12

40
18
14

Ioff

Maximum OffChannel Leakage
Current, Any One Channel

Vin = VIL or VIH;
VIO = VCC VEE;
Switch Off (Figure 3)

6.0

0.1

0.5

1.0

Maximum OffChannel HC4051A
Leakage Current,

HC4052A

Common Channel

HC4053A

Vin = VIL or VIH;
VIO = VCC VEE;
Switch Off (Figure 4)

6.0
6.0
6.0

0.2
0.1
0.1

2.0
1.0
1.0

4.0
2.0
2.0

Ion

Maximum OnChannel HC4051A
Leakage Current,

HC4052A

ChanneltoChannel

HC4053A

Vin = VIL or VIH;
SwitchtoSwitch =
VCC VEE; (Figure 5)

6.0
6.0
6.0

0.2
0.1
0.1

2.0
1.0
1.0

4.0
2.0
2.0

MC54/74HC4051A MC74HC4052A MC54/74HC4053A

HighSpeed CMOS Logic Data
DL129 -- Rev 6

MOTOROLA

AC CHARACTERISTICS

(CL = 50 pF, Input tr = tf = 6 ns)

b l

VCC

Guaranteed Limit

U i

Symbol

Parameter

VCC

55 to 25

125

Unit

tPLH,

tPHL

Maximum Propagation Delay, ChannelSelect to Analog Output
(Figure 9)

2.0
4.5
6.0

370

74
63

465

93
79

550

110

tPLH,

tPHL

Maximum Propagation Delay, Analog Input to Analog Output
(Figure 10)

2.0
4.5
6.0

60
12
10

75
15
13

90
18
15

tPLZ,

tPHZ

Maximum Propagation Delay, Enable to Analog Output
(Figure 11)

2.0
4.5
6.0

290

58
49

364

73
62

430

86
73

tPZL,

tPZH

Maximum Propagation Delay, Enable to Analog Output
(Figure 11)

2.0
4.5
6.0

345

69
59

435

87
74

515
103

Cin

Maximum Input Capacitance, ChannelSelect or Enable Inputs

CI/O

Maximum Capacitance

Analog I/O

(All Switches Off)

Common O/I: HC4051A

HC4052A
HC4053A

130

80
50

130

80
50

130

80
50

Feedthrough

1.0

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High

Speed CMOS Data Book (DL129/D).

(Fi

13)*

HC4051A

Typical @ 25

C, VCC = 5.0 V, VEE = 0 V

CPD

Power Dissipation Capacitance (Figure 13)*

HC4051A
HC4052A
HC4053A

45
80
45

* Used to determine the noload dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the

Motorola HighSpeed CMOS Data Book (DL129/D).

Part Number MC74HC4052A