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Part Number M34280E1FP

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ROM type
Mask ROM
Mask ROM
One Time PROM
One Time PROM
Package
20P2N-A
20P2E/F-A
20P2N-A
20P2E/F-A
RAM size
(
×
4 bits)
32 words
32 words
32 words
32 words
PIN CONFIGURATION (TOP VIEW)
M34280M1-XXXFP/GP
ROM (PROM) size
(
×
9 bits)
1024 words
1024 words
1024 words
1024 words
Product
M34280M1-XXXFP
M34280M1-XXXGP
M34280E1FP
M34280E1GP
DESCRIPTION
The 4280 Group is a 4-bit single-chip microcomputer designed
with CMOS technology for remote control transmitters. The 4280
Group has 7 carrier waves and enables fabrication of 8
×
7 key
matrix.
FEATURES
· Number of basic instructions ............................................. 62
· Minimum instruction execution time ............................ 8.0
µ
s
(at f(X
IN
) = 4.0 MHz, system clock = f(X
IN
)/8, V
DD
=3.0 V)
· Supply voltage ................................................. 1.8 V to 3.6 V
· Subroutine nesting ..................................................... 4 levels
· Timer
Timer 1 ................................................................... 8-bit timer
with a reload register and carrier wave output auto-control
function
· Carrier wave output function (port CARR)
f(X
IN
), f(X
IN
)/4, f(X
IN
)/8, f(X
IN
)/12
f(X
IN
)/64, f(X
IN
)/96, "H" output fixed
· Logic operation function (XOR, OR, AND)
· RAM back-up function
· Key-on wakeup function (ports D
7
, E
0
­E
2
, G
0
­G
3
) ............. 8
· I/O port (ports D, E, G, CARR) .......................................... 16
· Oscillation circuit ..................................... Ceramic resonance
· Watchdog timer
· Power-on reset circuit
· Voltage drop detection circuit ......................... Typical:1.50 V
APPLICATION
Various remote control transmitters
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
MITSUBISHI MICROCOMPUTERS
V
SS
2
3
4
5
6
7
8
9
10
1
19
18
17
16
15
14
13
12
11
20
D
7
D
2
D
3
D
4
D
5
D
1
D
0
CARR
V
DD
D
6
E
2
G
3
G
2
E
0
E
1
X
IN
X
OUT
G
0
G
1
M34280M1-XXXFP/GP
Outline 20P2N-A
20P2E/F-A
MITSUBISHI
ELECTRIC
2
MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
BLOCK DIAGRAM
X
IN
­X
OUT
1
4
2
7
1
I/O port
Internal peripheral functions
Timer
System clock generating circuit
Remote control carrier wave output
Memory
ROM (Note)
1024 words
×
9 bits
RAM
32 words
×
4 bits
720 Series
CPU core
ALU (4 bits)
Register A (4 bits) Register B (4 bits)
Register D (3 bits) Register E (8 bits)
Stack register SK (4 levels)
Port E
Port G
Port D
Timer 1 (8 bits)
Note: PROM 1024 words
×
9 bits
MITSUBISHI
ELECTRIC
3
MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
PERFORMANCE OVERVIEW
Function
62
8.0
µ
s (at 4.0 MHz system clock frequency)
(f(X
IN
) = 4.0 MHz, system clock = f(X
IN
)/8, V
DD
= 3 V)
1024 words
!
9 bits
32 words
!
4 bits
Seven independent output ports
1-bit I/O port with the pull-down function
3-bit input port with the pull-down function
2-bit output port (E
0
, E
1
)
4-bit I/O port with the pull-down function
1-bit output port; CMOS output
8-bit timer with a reload register
4 levels (However, only 3 levels can be used when the TABP p instruction is executed)
CMOS silicon gate
20-pin plastic molded SOP (20P2N-A)/SSOP (20P2E/F-A)
­20
°
C to 85
°
C
1.8 V to 3.6 V
400
µ
A
(f(X
IN
) = 4.0 MHz, system clock = f(X
IN
)/8, V
DD
= 3 V)
0.1
µ
A (at room temperature, V
DD
= 3 V)
Parameter
Number of basic instructions
Minimum instruction execution time
Memory sizes
Input/Output
ports
Timer 1
Subroutine nesting
Device structure
Package
Operating temperature range
Supply voltage
Power
dissipation
(typical value)
ROM
RAM
D
0
­D
6
D
7
E
0
­E
2
E
0
, E
1
G
0
­G
3
CARR
Active mode
RAM back-up mode
M34280M1/
E1
Output
I/O
Input
Output
I/O
Output
PIN DESCRIPTION
Name
Power supply
Ground
System clock input
System clock output
Output port D
I/O port D
I/O port E
I/O port G
Carrier wave output
for remote control
Input/Output
--
--
Input
Output
Output
I/O
Output
Input
I/O
Output
Function
Connected to a plus power supply.
Connected to a 0 V power supply.
I/O pins of the system clock generating circuit. Connect a ceramic resonator
between pins X
IN
and X
OUT
. The feedback resistor is built-in between pins X
IN
and X
OUT
.
Each pin of port D has an independent 1-bit wide output function. The output
structure is P-channel open-drain.
1-bit I/O port. For input use, turn on the built-in pull-down transistor and set the
latch of the specified bit to "0." In addition, key-on wakeup function using "H"
level sense becomes valid. The output structure is P-channel open-drain.
2-bit (E
0
, E
1
) output port. The output structure is P-channel open-drain.
3-bit input port. For input use (E
0
, E
1
), turn on the built-in pull-down transistor and
set the latch of the specified bit to "0." In addition, key-on wakeup function using
"H" level sense becomes valid. Port E
2
has an input-only port and has a key-on
wakeup function using "H" level sense and pull-down transistor.
4-bit I/O port. For input use, set the latch of the specified bit to "0." The output
structure is P-channel open-drain. Port G has a key-on wakeup function using
"H" level sense and pull-down transistor.
Carrier wave output pin for remote control. The output structure is CMOS circuit.
Pin
V
DD
V
SS
X
IN
X
OUT
D
0
­D
6
D
7
E
0
­E
2
G
0
­G
3
CARR
MITSUBISHI
ELECTRIC
4
MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
CONNECTIONS OF UNUSED PINS
Pin
D
0
­D
7
E
0
, E
1
E
2
G
0
­G
3
Connection
Open or connect to V
DD
pin (Note 1).
Set the output latch to "1" and open, or
connect to V
DD
pin (Note 2).
Open or connect to V
SS
pin.
Set the output latch to "0" and open, or
connect to V
SS
pin.
Notes 1: Port D
7
: Set the bit 2 (PU0
2
) of the pull-down control register PU0 to "0" by software and turn the pull-down transistor OFF.
2: Set the corresponding bits (PU0
0
, PU0
1
) of the pull-down control register PU0 to "0" by software and turn the pull-down
transistor OFF.
(Note in order to set the output latch to "0" to make pins open)
· After system is released from reset, a port is in a high-impedance state until the output latch of the port is set to "0" by software.
Accordingly, the voltage level of pins is undefined and the excess of the supply current may occur.
· To set the output latch periodically is recommended because the value of output latch may change by noise or a program run away
(caused by noise).
(Note when connecting to V
SS
and V
DD
)
· Connect the unused pins to V
SS
or V
DD
at the shortest distance and use the thick wire against noise.
PORT FUNCTION
Control
bits
1 bit
Output:
2 bits
Input:
3 bits
4 bits
1 bit
Control
instructions
SD
RD
CLD
SD
RD
CLD
SZD
OEA
IAE
IAE
OGA
IAG
OCRA
Control
registers
PU0
PU0
C
Output structure
P-channel open-drain
P-channel open-drain
P-channel open-drain
CMOS
Input/
Output
Output
(7)
I/O
(1)
I/O
(2)
Input
(1)
I/O
(4)
Output
(1)
Remark
Pull-down function and key-on
wakeup function
(programmable)
Pull-down function and key-on
wakeup function
(programmable)
Pull-down function and key-on
wakeup function
Pin
D
0
­D
6
D
7
E
0
E
1
E
2
G
0
­G
3
CARR
Port
Port D
Port E
Port G
Port CARR
DEFINITION OF CLOCK AND CYCLE
· System clock (STCK)
The system clock is the source clock for controlling this product.
It can be selected as shown below whether to use the CCK
instruction.
CCK instruction
When not using
When using
Instruction clock
f(X
IN
)/32
f(X
IN
)/4
System clock
f(X
IN
)/8
f(X
IN
)
· Instruction clock (INSTCK)
The instruction clock is a signal derived by dividing the system
clock by 4, and is the basic clock for controlling CPU. The one
instruction clock cycle is equivalent to one machine cycle.
· Machine cycle
The machine cycle is the cycle required to execute the
instruction.
MITSUBISHI
ELECTRIC
5
MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
PORT BLOCK DIAGRAMS
CLD instruction
SD instruction
RD instruction
S
R
Q
A
2
S
R
Q
PU0
2
A
i
A
i
D
T
Q
(Note 2)
V1
2
A
3
D
T
Q
R
V1
0
CARRY
Q
D
T R
A
0
A
0
D
T
Q
PU0
0
A
1
A
1
D
T
Q
PU0
1
CLD instruction
SD instruction
RD instruction
Register Y
Decoder
Register Y
Decoder
(Note 1)
(Note 1)
(Note 1)
(Note 1)
Ports D
0
­D
6
Port D
7
(Note 4)
Pull-down
transistor
Port E
0
(Note 4)
Port E
1
(Note 4)
Port E
2
(Note 4)
(Note 1)
(Note 1)
Pull-down
transistor
Pull-down
transistor
Pull-down
transistor
Pull-down
transistor
(Note 1)
To timer 1
Ports G
0
­G
3
(Note 4)
Port CARR
Carrier wave
output control
signal
TCA
instruction
OCRA instruction
Carrier wave
output circuit
Register A
Timer 1 underflow signal
Skip decision (SZD instruction)
Key-on wakeup input
Key-on wakeup input
A
j
(Note 3)
TCA instruction
Register C
Register A
TAC instruction
OEA
instruction
IAE instruction
Register A
Register A
Key-on wakeup input
Key-on wakeup input
Register A
OEA
instruction
IAE instruction
IAE instruction
Register A
Key-on wakeup input
OGA
instruction
IAG instruction
Notes 1:
2:
3:
4:
This symbol represents a parasitic diode.
i represents bits 0 to 3.
j represents bits 0 to 2.
Applied voltage must be less than V
DD
.
A
j
(Note 3)
Register A