January, 2000
DATASHEET
n Fully integrated Power Amplifier, Low Noise Amplifier,
and PIN diode drivers
n 100mW Power Amplifier
n Single supply, 2.7V to 4.5V operating range
n PA output: +21 dBm at 3.0V, 35dB gain, 35%
efficiency at 3.3V after harmonic filter; integrated PA
ramp control
n LNA: noise figure of 2.5dB, 15dBm 3
rd
-order intercept
point, and 25dBm
GENERAL DESCRIPTION
ML2751 Power Amplifier and LNA
FEATURES
The 2751 is a 900 MHz ISM band radio front-end intended
for use in half duplex radio applications such as cordless
phones and FCC Part 15 compliant devices. It integrates a
power amplifier (PA), a Low Noise Amplifier (LNA), Pin
Diode drivers for an external transmit/receive switch, and
control circuits. The 100mW power amplifier has output
power control with a >20dB range. The ML2751 can be
used to increase battery life and offers output power ramp
control in TDMA applications. An internal LNA eliminates
the need for a discrete design. PIN diode drivers control
the transmit/receive switch directly. Internal logic
individually enables the LNA, PA, and PIN diode drivers.
A power down mode to minimize current consumption is
included.
n 900 MHz FCC Part 15 Radios
n 900 MHz Cordless Telephones
n TDD / TDMA Radios
APPLICATIONS
SIMPLIFIED BLOCK DIAGRAM
PRELIMINARY
PIN DIODE
DRIVERS
RLNI
RAMP
GEN.
CONT.
BLOCK
TRFI
TPS, PAON, FEEN
LNA
PINB
PIN
TRFO
RRFO
PA
POWER
CONTROL
AMP
ML2751
RF PIN
DIODE
SWITCH
ML2721
BATTERY
Memory
LOOP
FILTER
Keypad
Display
Mic.
Speaker
Ringer
Watch
Osc.
Xtal
Baseband IC
(MODEM
CODEC
Protocol
MMI Control)
ML2751
2
January, 2000
PRELIMINARY
PRELIMINARY DATASHEET
TABLE OF CONTENTS
General Description ................................................................................................................................................... 1
Features ...................................................................................................................................................................... 1
Applications ............................................................................................................................................................... 1
Simplified Block Diagram .......................................................................................................................................... 1
Warranty Information ................................................................................................................................................. 2
Block Diagram ........................................................................................................................................................... 3
Pin Configuration ....................................................................................................................................................... 4
Pin Descriptions ......................................................................................................................................................... 4
Functional Description ............................................................................................................................................... 6
Electrical Characteristics ............................................................................................................................................ 8
Electrical Tables ......................................................................................................................................................... 8
Physical Dimensions .................................................................................................................................................. 12
Order Information ....................................................................................................................................................... 12
WARRANTY
© Micro Linear 2000. is a registered trademark of Micro Linear Corporation. All other trademarks are the property of their
respective owners.
Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116;
5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376;
5,652,479; 5,661,427; 5,663,874; 5,672,959; 5,689,167; 5,714,897; 5,717,798; 5,742,151; 5,747,977; 5,754,012; 5,757,174;
5,767,653; 5,777,514; 5,793,168; 5,798,635; 5,804,950; 5,808,455; 5,811,999; 5,818,207; 5,818,669; 5,825,165; 5,825,223;
5,838,723; 5.844,378; 5,844,941. Japan: 2,598,946; 2,619,299; 2,704,176; 2,821,714. Other patents are pending.
Micro Linear makes no representations or warranties with respect to the accuracy, utility, or completeness of the contents of
this publication and reserves the right to make changes to specifications and product descriptions at any time without notice.
No license, express or implied, by estoppel or otherwise, to any patents or other intellectual property rights is granted by this
document. The circuits contained in this document are offered as possible applications only. Particular uses or applications
may invalidate some of the specifications and/or product descriptions contained herein. The customer is urged to perform its
own engineering review before deciding on a particular application. Micro Linear assumes no liability whatsoever, and
disclaims any express or implied warranty, relating to sale and/or use of Micro Linear products including liability or warranties
relating to merchantability, fitness for a particular purpose, or infringement of any intellectual property right. Micro Linear
products are not designed for use in medical, life saving, or life sustaining applications.
ML2751
4
January, 2000
PRELIMINARY
PRELIMINARY DATASHEET
PIN DESCRIPTIONS
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
TOP VIEW
ML2751
20-Pin TSSOP (T20)
PAON
FEEN
TRFI
GND
RRFO
GND
GND
GND
TPS
TPA
GND
GND
TRFO
GND
GND
VCC
GND
PINB
PIN
RLNI
LNA Section
5
RRFO
O (analog)
Receive RF Output. LNA RF Output. This is an open collector output
that requires an external load to VCC. This pin requires matching for
optimum gain
11
RLNI
I (analog)
Receive LNA RF input. This pin is directly connected to the base of an
NPN transistor. The input to this pin should be AC coupled using an
external capacitor. This input will require matching for optimum
performance
PA Section
3
TRFI
I (analog)
Transmit RF Power Amplifier (PA) input. Requires RF choke to VCC that
can handle up to 150mA. The VCC end of the choke requires both RF
and low frequency decoupling to ground to minimize supply
modulation
9
TPS
I (analog)
This pin is the non-inverting input of an op amp. The voltage on this pin
sets the RF power produced by the PA, permitting variable power
operation under control of the baseband circuits (see Figure 2)
10
TPA
I (analog)
This pin is the inverting input of an operational amplifier. A resistor
from this pin to GND scales the TPS input voltage control range to
match that of the external baseband control circuits. If scaling of the
TPS input range is not required the TPA pin can either be grounded or
left floating (see Figure 2)
18
TRFO
O (analog)
Transmit RF Power Amplifier output. Open collector output. Requires
RF choke to VCC that can handle up to 150mA. The VCC end of the
choke requires both RF and low frequency decoupling to ground to
minimize supply modulation
Pin #
Signal Name
I/O Type
Description
ML2751
5
January, 2000
PRELIMINARY
PRELIMINARY DATASHEET
PIN DESCRIPTIONS (continued)
Pin #
Signal Name
I/O
Description
PIN Diode Driver Section
12
PIN
O (analog)
This output is a low impedance voltage source that switches between
VCC and GND to drive an external PIN diode switch. This totem pole
output is tri-stated when FEEN = 0. When active it pulls either to VCC
(if PAON = 1) or to GND (if PAON = 0), and has a nominal output
impedance of 50
W when sourcing and 120W when sinking
13
PINB
O (analog)
This output is a low impedance voltage source that switches between
VCC and GND to drive an external PIN diode switch. This totem pole
output is tri-stated when FEEN = 0. When active it pulls either to VCC
(if PAON = 0) or to GND (if PAON = 1) , and has a nominal output
impedance of 50
W when sourcing and 120W when sinking. PINB is the
complement of PIN, providing a bipolar drive for PIN diodes from a
single power rail
Control and Interface
1
PAON
I (CMOS)
Power Amplifier on pin. The PA is active when PAON = 1, and the LNA
is active when PAON = 0. Rising and falling edges of this signal
initiate a controlled ramp of the PA bias circuits to eliminate AM
generated sidebands on the transmitter output. The PIN diode drivers
are synchronized with PAON (see Figure 3). When the ML2751 is in
standby mode this pin has no effect
2
FEEN
I (CMOS)
Front-end enable. FEEN is the master power down pin. When FEEN = 0
the ML2751 is in standby mode. When FEEN = 1 either the PA or the
LNA is enabled (determined by the state of PAON). See Figure 3
Power & Ground
15
VCC
Power
Positive power supply for the LNA, the first stages of the PA, the PIN
diode drivers, and the control logic. Care should be exercised in PCB
layout to minimize the trace length, and the inductance and resistance
both in the connection to the capacitor and from the capacitor to
ground
4
GND
Ground
6
GND
Ground
7
GND
Ground
8
GND
Ground
14
GND
Ground
16
GND
Ground
17
GND
Ground
19
GND
Ground
20
GND
Ground
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