ChipFind - Datasheet

Part Number MX23L51220

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FEATURES
· Bit organization
- 16M x 32 (double word mode) only
· Fast access time
- Random access: 90ns (max.)
- Page access: 30ns (max.)
· Page size
- 8 double words per page
PIN CONFIGURATION
70 PIN SSOP
1
P/N:PM0949
REV. 1.3, SEP. 02, 2004
MX23L51220
· Current
- Operating: 80mA (max.) @ 5MHz
- Standby: 30uA (max.)
· Supply voltage : 3.3V
±
10%
· Package
- 70 pin SSOP
· Temperature
- 0~70
°
C
PIN DESCRIPTION
Symbol
Pin Function
A0~A23
Address Inputs
D0~D31
Data Outputs
CE#
Chip Enable Input
OE#
Output Enable Input
VCC
Power Supply Pin
VSS
Ground Pin
NC
No Connection (pin 18 and 53 must
be floating, not connected to VCC
or GND)
512M-BIT (16M x 32) MASK ROM WITH PAGE MODE
(SSOP ONLY)
(for socket solution only)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
A21
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
NC
D27
D19
D26
D18
NC
D25
D17
D24
D16
CE#
VSS
VSS
OE#
D0
D8
D1
D9
D2
D10
D3
D11
VSS
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
A23
NC
NC
D20
D28
D21
D29
NC
D22
D30
D23
D31
A22
VSS
VSS
D15
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
MX23L51220
2
P/N:PM0949
REV. 1.3, SEP. 02, 2004
MX23L51220
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
Ratings
Voltage on any Pin Relative to VSS
VIN
-0.3V to 3.9V
Ambient Operating Temperature
Topr
0
°
C to 70
°
C
Storage Temperature
Tstg
-65
°
C to 125
°
C
BLOCK DIAGRAM
ORDER INFORMATION
Part No.
Access Time
Package
MX23L51220MC-90
90ns
70 pin SSOP
MX23L51220MC-10
100ns
70 pin SSOP
MODE SELECTION
CE#
OE#
D0~D31
Mode
Power
H
X
High Z
-
Stand-by
L
H
High Z
-
Active
L
L
D0~D31
Double Word
Active
Address
Buffer
Memory
Array
Page
Buffer
Page
Decoder
Output
Buffer
D0
D31
A3
A23
A0
A2
CE#
OE#
3
P/N:PM0949
REV. 1.3, SEP. 02, 2004
MX23L51220
AC CHARACTERISTICS (Ta = 0
°
C ~ 70
°
C, VCC = 3.3V
±
10%)
Item
Symbol
23L51220-90
23L51220-10
MIN.
MAX.
MIN.
MAX.
Read Cycle Time
tRC
90ns
-
100ns
-
Address Access Time
tAA
-
90ns
-
100ns
Chip Enable Access Time
tCE
-
90ns
-
100ns
Page Mode Access Time
tPA
-
30ns
-
30ns
Output Enable Time
tOE
-
30ns
-
30ns
Output Hold After Address
tOH
0ns
-
0ns
-
Output High Z Delay
tHZ
-
20ns
-
20ns
AC Test Conditions
Input Pulse Levels
0.4V~ 2.8V
Input Rise and Fall Times
10ns
Input Timing Level
1.5V
Output Timing Level
1.5V
Output Load
See Figure
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
DOUT
C< 100pF
IOL (load)=1.6mA
IOH (load)= -0.4mA
DC CHARACTERISTICS (Ta = 0
°
C ~ 70
°
C, VCC = 3.3V
±
10%)
Item
Symbol
MIN.
MAX.
Conditions
Output High Voltage
VOH
2.4V
-
IOH = -0.4mA
Output Low Voltage
VOL
-
0.4V
IOL = 1.6mA
Input High Voltage
VIH
2.2V
VCC+0.3V
Input Low Voltage
VIL
-0.3V
0.2xVCC
Input Leakage Current
ILI
-
10uA
0V, VCC
Output Leakage Current
ILO
-
10uA
0V, VCC
Operating Current
ICC
-
80mA
f=5MHz, all output open
CE#=VIL(Chip Enable)
OE#=VIH(Output Disabled)
Standby Current (TTL)
ISTB1
-
1mA
CE# = VIH
Standby Current (CMOS)
ISTB2
-
30uA
CE# > VCC-0.2V
Input Capacitance
CIN
-
20pF
Ta = 25
°
C, f = 1MHZ
Output Capacitance
COUT
-
10pF
Ta = 25
°
C, f = 1MHZ
4
P/N:PM0949
REV. 1.3, SEP. 02, 2004
MX23L51220
TIMING DIAGRAM
RANDOM READ
PAGE READ
tCE
tAA
tOH
tHZ
ADD
ADD
ADD
ADD
CE#
OE#
DATA
VALID
VALID
VALID
tRC
tOE
A3-A23
A0, A1, A2
DATA
VALID ADD
VALID
1'st ADD
2'nd ADD
tPA
tAA
3'rd ADD
VALID
VALID
5
P/N:PM0949
REV. 1.3, SEP. 02, 2004
MX23L51220
PACKAGE INFORMATION