General Description

The MAX8732/MAX8733/MAX8734 dual step-down,
switch-mode power-supply (SMPS) controllers generate
logic-supply voltages in battery-powered systems. The
MAX8732/MAX8733/MAX8734 include two pulse-width
modulation (PWM) controllers, adjustable from 2V to 5.5V
or fixed at 5V and 3.3V. These devices feature two linear
regulators providing 5V and 3.3V always-on outputs. Each
linear regulator provides up to 100mA output current with
automatic linear-regulator bootstrapping to the main
SMPS outputs. The MAX8732/MAX8733/MAX8734 include
on-board power-up sequencing, a power-good (PGOOD)
output, digital soft-start, and internal soft-stop output dis-
charge that prevents negative voltages on shutdown.

Maxim's proprietary Quick-PWMTM quick-response, con-
stant on-time PWM control scheme operates without
sense resistors and provides 100ns response to load tran-
sients while maintaining a relatively constant switching fre-
quency. The unique ultrasonic pulse-skipping mode
maintains the switching frequency above 25kHz, which
eliminates noise in audio applications. Other features
include pulse skipping, which maximizes efficiency in
light-load applications, and fixed-frequency PWM mode,
which reduces RF interference in sensitive applications.

The MAX8732 features a 200kHz/5V and 300kHz/3.3V
SMPS for highest efficiency, while the MAX8733 features
a 400kHz/5V and 500kHz/3.3V SMPS for "thin and light"
applications. The MAX8734 provides a pin-selectable
switching frequency, allowing either 200kHz/300kHz or
400kHz/500kHz operation of the 5V/3.3V SMPSs, respec-
tively. The MAX8732/MAX8733/MAX8734 are available in
28-pin QSOP packages and operate over the extended
temperature range (-40°C to +85°C).

The MAX8732/MAX8733/MAX8734 are pin-for-pin
upgrades to the MAX1777/MAX1977/MAX1999.
The MAX1999 Evaluation Kit can be used to evaluate
the MAX8732/MAX8733/MAX8734.

Applications

Notebook and Subnotebook Computers

PDAs and Mobile Communication Devices

3- and 4-Cell Li+ Battery-Powered Devices

Features

No Current-Sense Resistor Needed (MAX8734)

Accurate Current Sense with Current-Sense
Resistor (MAX8732/MAX8733)

1.5% Output Voltage Accuracy

3.3V and 5V 100mA Bootstrapped Linear
Regulators

Internal Soft-Start and Soft-Stop Output
Discharge

Quick-PWM with 100ns Load Step Response

3.3V and 5V Fixed or Adjustable Outputs
(Dual ModeTM)

4.5V to 24V Input Voltage Range

Enhanced Ultrasonic Pulse-Skipping Mode
(25kHz min)

Power-Good (PGOOD) Signal

Overvoltage Protection Enable/Disable

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

________________________________________________________________ Maxim Integrated Products

Ordering Information

19-3355; Rev 0; 8/04

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.

PART

TEMP RANGE

PIN-
PACKAGE

5V/3V

SWITCHING

FREQUENCY

MAX8732

EEI -40°C to +85°C 28 QSOP

200kHz/300kHz

MAX8733

EEI -40°C to +85°C 28 QSOP

400kHz/500kHz

MAX8734

EEI -40°C to +85°C 28 QSOP

200kHz/300kHz or
400kHz/500kHz

Quick-PWM and Dual Mode are trademarks of Maxim
Integrated Products, Inc.

BST3

LX3

DH3

LDO3

DL3

GND

LX5

OUT3

OUT5

V+

DL5

LDO5

DH5

BST5

TON

ILIM5

FB5

REF

FB3

ILIM3

ON5

ON3

PGOOD

N.C.

QSOP

TOP VIEW

MAX8734

SHDN

PRO

SKIP

Pin Configurations

Pin Configurations continued at end of data sheet.

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

_______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(Circuit of Figure 1 and Figure 2, no load on LDO5, LDO3, OUT3, OUT5, and REF, V+ = 12V, ON3 = ON5 = V

, V

SHDN

= 5V,

= 0°C to +85°C

, unless otherwise noted. Typical values are at T

= +25°C.)

Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

V+, SHDN to GND ..................................................-0.3V to +25V
BST_ to GND ..........................................................-0.3V to +30V
LX_ to BST_ ..............................................................-6V to +0.3V
CS_ to GND (MAX8732/MAX8733 only)......................-2V to +6V
V

, LDO5, LDO3, OUT3, OUT5, ON3, ON5, REF,

FB3, FB5, SKIP, PRO, PGOOD to GND ...............-0.3V to +6V

DH3 to LX3 ..............................................-0.3V to (V

BST3

+ 0.3V)

DH5 to LX5 ..............................................-0.3V to (V

BST5

+ 0.3V)

ILIM3, ILIM5 to GND...................................-0.3V to (V

+ 0.3V)

DL3, DL5 to GND....................................-0.3V to (V

LDO5

+ 0.3V)

TON to GND (MAX8734 only)...................................-0.3V to +6V

LDO3, LDO5, REF Short Circuit to GND ....................Momentary
LDO3 Current (Internal Regulator) Continuous ..............+100mA
LDO3 Current (Switched Over to OUT3) Continuous.....+200mA
LDO5 Current (Internal Regulator) Continuous ..............+100mA
LDO5 Current (Switched Over to OUT5) Continuous.....+200mA
Continuous Power Dissipation (T

= +70°C)

28-Pin QSOP (derate 10.8mW/°C above +70°C).........860mW

Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

MAIN SMPS CONTROLLERS

LDO5 in regulation

V+ Input Voltage Range

V+ = LDO5, V

OUT5

< 4.43V

4.5

5.5

3.3V Output Voltage in
Fixed Mode

V+ = 6V to 24V, FB3 = GND, V

SKIP

= 5V

3.285

3.330

3.375

V+ = 6V to 24V, FB5 = GND, V

SKIP

= 5V,

MAX8732/MAX8734 (TON = V

)

5V Output Voltage in Fixed Mode

V+ = 7V to 24V, FB5 = GND, V

SKIP

= 5V,

MAX8733/MAX8734 (TON = GND)

4.975

5.050

5.125

Output Voltage in
Adjustable Mode

V+ = 6V to 24V, either SMPS

1.975

2.00

2.025

Output Voltage Adjust Range

Either SMPS

2.0

5.5

FB3, FB5 Adjustable-Mode
Threshold Voltage

Dual-Mode comparator

0.1

0.2

Either SMPS, V

SKIP

= 5V, 0 to 5A

-0.1

Either SMPS, SKIP = GND, 0 to 5A

-1.5

DC Load Regulation

Either SMPS, V

SKIP

= 2V, 0 to 5A

-1.7

Line Regulation

Either SMPS, 6V < V+ < 24V

0.005

%/V

Current-Limit Threshold
(Positive, Default)

ILIM_ = V

, GND - CS_ (MAX8732/MAX8733),

GND - LX_ (MAX8734)

100

107

ILIM_

= 0.5V

ILIM_

= 1V

100

107

Current-Limit Threshold
(Positive, Adjustable)

GND - CS_
(MAX8732/MAX8733),
GND - LX_ (MAX8734)

ILIM_

= 2V

185

200

215

Zero-Current Threshold

SKIP = GND, ILIM_ = V

, GND - CS_

(MAX8732/MAX8733), GND - LX_ (MAX8734)

Current-Limit Threshold
(Negative, Default)

SKIP = ILIM_ = V

, GND - CS_ (MAX8732/MAX8733),

GND - LX_ (MAX8734)

-120

Soft-Start Ramp Time

Zero to full limit

1.7

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1 and Figure 2, no load on LDO5, LDO3, OUT3, OUT5, and REF, V+ = 12V, ON3 = ON5 = V

, V

SHDN

= 5V,

= 0°C to +85°C

, unless otherwise noted. Typical values are at T

= +25°C.)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

5V SMPS

200

MAX8732 or MAX8734
(V

TON

= 5V), SKIP = V

3.3V SMPS

300

5V SMPS

400

MAX8733 or MAX8734
(V

TON

= 0), SKIP = V

3.3V SMPS

500

Operating Frequency

SKIP = REF

kHz

OUT5

= 5.05V

1.895

2.105

2.315

MAX8732 or MAX8734
(V

TON

= 5V)

OUT3

= 3.33V

0.833

0.925

1.017

OUT5

= 5.05V

0.895

1.052

1.209

On-Time Pulse Width

MAX8733 or MAX8734
(V

TON

= 0)

OUT3

= 3.33V

0.475

0.555

0.635

µs

Minimum Off-Time

250

300

350

OUT5

= 5.05V

MAX8732 or MAX8734
(V

TON

= 5V)

OUT3

= 3.33V

OUT5

= 5.05V

Maximum Duty Cycle

MAX8733 or MAX8734
(V

TON

= 0)

OUT3

= 3.33V

INTERNAL REGULATOR AND REFERENCE

LDO5 Output Voltage

ON3 = ON5 = GND, 6V < V+ < 24V, 0 < I

LDO5

< 100mA

4.90

5.00

5.10

LDO5 Short-Circuit Current

LDO5 = GND

190

LDO5 Undervoltage-Lockout
Fault Threshold

Falling edge of LDO5, hysteresis = 1%

3.7

4.0

4.3

LDO5 Bootstrap Switch Threshold

Falling edge of OUT5, rising edge at OUT5 regulation
point

4.43

4.56

4.69

LDO5 Bootstrap
Switch Resistance

LDO5 to OUT5, V

OUT5

= 5V

1.4

3.2

LDO3 Output Voltage

ON3 = ON5 = GND, 6V < V+ < 24V, 0 < I

LDO3

< 100mA

3.28

3.35

3.42

LDO3 Short-Circuit Current

LDO3 = GND

180

LDO3 Bootstrap Switch Threshold

Falling edge of OUT3, rising edge at OUT3 regulation
point

2.80

2.91

3.02

LDO3 Bootstrap Switch
Resistance

LDO3 to OUT3, V

OUT3

= 3.2V

1.5

3.5

REF Output Voltage

No external load

1.980

2.000

2.020

REF Load Regulation

0 < I

LOAD

< 50µA

REF Sink Current

REF in regulation

µA

V+ Operating Supply Current

LDO5 switched over to OUT5, 5V SMPS

µA

V+ Standby Supply Current

V+ = 6V to 24V, both SMPSs off, includes I

SHDN

150

250

µA

V+ Shutdown Supply Current

V+ = 4.5V to 24V

µA

Quiescent Power Consumption

Both SMPSs on, FB3 = FB5 = SKIP = GND, V

OUT3

3.5V, V

OUT5

= 5.3V

4.5

FAULT DETECTION

Overvoltage Trip Threshold

FB3 or FB5 with respect to nominal regulation point

+11

+14

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1 and Figure 2, no load on LDO5, LDO3, OUT3, OUT5, and REF, V+ = 12V, ON3 = ON5 = V

, V

SHDN

= 5V,

= 0°C to +85°C

, unless otherwise noted. Typical values are at T

= +25°C.)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Overvoltage Fault
Propagation Delay

FB3 or FB5 delay with 50mV overdrive

µs

PGOOD Threshold

FB3 or FB5 with respect to nominal output, falling edge,
typical hysteresis = 1%

-12

-9.5

-7

PGOOD Propagation Delay

Falling edge, 50mV overdrive

µs

PGOOD Output Low Voltage

SINK

= 4mA

0.3

PGOOD Leakage Current

High state, forced to 5.5V

µA

Thermal-Shutdown Threshold

+160

Output Undervoltage
Shutdown Threshold

FB3 or FB5 with respect to nominal output voltage

Output Undervoltage
Shutdown Blanking Time

From ON_ signal

INPUTS AND OUTPUTS

Feedback Input Leakage Current

FB3

= V

FB5

= 2.2V

-200

+40

+200

Low level

0.6

PRO Input Voltage

High level

1.5

Low level

0.8

Float level

1.7

2.3

SKIP Input Voltage

High level

2.4

Low level

0.8

TON Input Voltage

High level

2.4

Clear fault level/SMPS off level

0.8

Delay start level

1.7

2.3

ON3, ON5 Input Voltage

SMPS on level

2.4

PRO

or V

TON

= 0 or 5V

-1

ON_

= 0 or 5V

-2

SKIP

= 0 or 5V

-1

SHDN

= 0 or 24V

-1

CS_

= 0 or 5V

-2

Input Leakage Current

ILIM3

, V

ILIM5

= 0 or 2V

-0.2

+0.2

µA

Rising edge

1.2

1.6

2.0

SHDN Input Trip Level

Falling edge

0.96

1.00

1.04

DH_ Gate-Driver
Sink/Source Current

DH3, DH5 forced to 2V

DL_ Gate-Driver Source Current

DL3 (source), DL5 (source), forced to 2V

1.7

DL_ Gate-Driver Sink Current

DL3 (sink), DL5 (sink), forced to 2V

3.3

DH_ Gate-Driver On-Resistance

BST - LX_ forced to 5V

1.5

4.0

DL_, high state (pullup)

2.2

5.0

DL_ Gate-Driver On-Resistance

DL_, low state (pulldown)

0.6

1.5

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1 and Figure 2, no load on LDO5, LDO3, OUT3, OUT5, and REF, V+ = 12V, ON3 = ON5 = V

, V

SHDN

= 5V,

= 0°C to +85°C

, unless otherwise noted. Typical values are at T

= +25°C.)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

OUT3, OUT5 Discharge-Mode
On-Resistance

OUT3, OUT5 Discharge-Mode
Synchronous Rectifier
Turn-On Level

0.2

0.3

0.4

ELECTRICAL CHARACTERISTICS

(Circuit of Figure 1 and Figure 2, no load on LDO5, LDO3, OUT3, OUT5, and REF, V+ = 12V, ON3 = ON5 = V

, V

SHDN

= 5V,

= -40°C to +85°C

, unless otherwise noted.) (Note 1)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

MAIN SMPS CONTROLLERS

LDO5 in regulation

V+ Input Voltage Range

V+ = LDO5, V

OUT5

< 4.41V

4.5

5.5

3.3V Output Voltage in
Fixed Mode

V+ = 6V to 24V, FB3 = GND, V

SKIP

= 5V

3.27

3.39

V+ = 6V to 24V, FB5 = GND, V

SKIP

= 5V,

MAX8732/MAX8734 (TON = V

)

5V Output Voltage in Fixed Mode

V+ = 7V to 24V, FB5 = GND, V

SKIP

= 5V,

MAX8733/MAX8734 (TON = GND)

4.95

5.15

Output Voltage in
Adjustable Mode

V+ = 6V to 24V, either SMPS

1.97

2.03

Output Voltage Adjust Range

Either SMPS

2.0

5.5

FB3, FB5 Adjustable-Mode
Threshold Voltage

Dual-Mode comparator

0.1

0.2

Current-Limit Threshold
(Positive, Default)

ILIM_ = V

, GND - CS_ (MAX8732/MAX8733),

GND - LX_ (MAX8734)

110

ILIM_

= 0.5V

ILIM_

= 1V

110

Current-Limit Threshold
(Positive, Adjustable)

GND - CS_
(MAX8732/MAX8733),
GND - LX_ (MAX8734)

ILIM_

= 2V

180

220

OUT5

= 5.05V

1.895

2.315

MAX8732 or MAX8734
(V

TON

= 5V)

OUT3

= 3.33V

0.833

1.017

OUT5

= 5.05V

0.895

1.209

On-Time Pulse Width

MAX8733 or MAX8734
(V

TON

= 0)

OUT3

= 3.33V

0.475

0.635

µs

Minimum Off-Time

200

400

INTERNAL REGULATOR AND REFERENCE

LDO5 Output Voltage

ON3 = ON5 = GND, 6V < V+ < 24V, 0 < I

LDO5

< 100mA

4.90

5.10

LDO5 Undervoltage-Lockout
Fault Threshold

Falling edge of LDO5, hysteresis = 1%

3.7

4.3

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1 and Figure 2, no load on LDO5, LDO3, OUT3, OUT5, and REF, V+ = 12.0.V, ON3 = ON5 = V

, V

SHDN

= 5V,

= -40°C to +85°C

, unless otherwise noted.) (Note 1)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

LDO5 Bootstrap Switch Threshold

Falling edge of OUT5, rising edge at OUT5 regulation
point

4.43

4.69

LDO5 Bootstrap Switch
Resistance

LDO5 to OUT5, V

OUT5

= 5V

3.2

LDO3 Output Voltage

ON3 = ON5 = GND, 6V < V+ < 24V, 0 < I

LDO3

< 100mA

3.27

3.43

LDO3 Bootstrap Switch Threshold

Falling edge of OUT3, rising edge at OUT3 regulation
point

2.80

3.02

LDO3 Bootstrap
Switch Resistance

LDO3 to OUT3, V

OUT3

= 3.2V

3.5

REF Output Voltage

No external load

1.975

2.025

REF Load Regulation

0 < I

LOAD

< 50µA

REF Sink Current

REF in regulation

µA

V+ Operating Supply Current

LDO5 switched over to OUT5, 5V SMPS

µA

V+ Standby Supply Current

V+ = 6V to 24V, both SMPSs off, includes I

SHDN

300

µA

V+ Shutdown Supply Current

V+ = 4.5V to 24V

µA

Quiescent Power Consumption

Both SMPSs on, FB3 = FB5 = SKIP = GND, V

OUT3

3.5V, V

OUT5

= 5.3V

4.5

FAULT DETECTION

Overvoltage Trip Threshold

FB3 or FB5 with respect to nominal regulation point

+14

PGOOD Threshold

FB3 or FB5 with respect to nominal output, falling edge,
typical hysteresis = 1%

-12

-7

PGOOD Output Low Voltage

SINK

= 4mA

0.3

PGOOD Leakage Current

High state, forced to 5.5V

µA

Output Undervoltage Shutdown
Threshold

FB3 or FB5 with respect to nominal output voltage

Output Undervoltage Shutdown
Blanking Time

From ON_ signal

INPUTS AND OUTPUTS

Feedback Input Leakage Current

FB3

= V

FB5

= 2.2V

-200

+200

Low level

0.6

PRO Input Voltage

High level

1.5

Low level

0.8

Float level

1.7

2.3

SKIP Input Voltage

High level

2.4

Low level

0.8

TON Input Voltage

High level

2.4

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1 and Figure 2, no load on LDO5, LDO3, OUT3, OUT5, and REF, V+ = 12.0.V, ON3 = ON5 = V

, V

SHDN

= 5V,

= -40°C to +85°C

, unless otherwise noted.) (Note 1)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Clear fault level/SMPS off level

0.8

Delay start level

1.7

2.3

ON3, ON5 Input Voltage

SMPS on level

2.4

PRO

or V

TON

= 0 or 5V

-1

ON_

= 0 or 5V

-1

SKIP

= 0 or 5V

-2

SHDN

= 0 or 24V

-1

CS_

= 0 or 5V

-2

Input Leakage Current

ILIM3

, V

ILIM5

= 0 or 2V

-0.2

+0.2

µA

Rising edge

1.2

2.0

SHDN Input Trip Level

Falling edge

0.96

1.04

DH_ Gate-Driver On-Resistance

BST - LX_ forced to 5V

4.0

DL_, high state (pullup)

5.0

DL_ Gate-Driver On-Resistance

DL_, low state (pulldown)

1.5

OUT3, OUT5 Discharge-Mode
On-Resistance

OUT3, OUT5 Discharge-Mode
Synchronous Rectifier
Turn-On Level

0.2

0.4

Note 1:

Specifications to -40°C are guaranteed by design, not production tested.

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

_______________________________________________________________________________________

Typical Operating Characteristics

(Circuit of Figure 1 and Figure 2, no load on LDO5, LDO3, OUT3, OUT5, and REF, V+ = 12V, ON3 = ON5 = V

, SHDN = V+,

= 7m, V

ILIM

_ = 0.5V, T

= +25°C, unless otherwise noted.)

100

0.001

0.01

0.1

5V OUTPUT EFFICIENCY

vs. LOAD CURRENT (MAX8732)

MAX8732/3/4 toc01

LOAD CURRENT (A)

EFFICIENCY (%)

A: IDLE MODE, V

= 7V

B: IDLE MODE, V

= 12V

C: IDLE MODE, V

= 24V

D: PWM MODE, V

= 7V

E: PWM MODE, V

= 12V

F: PWM MODE, V

= 24V

100

0.001

0.01

0.1

5V OUTPUT EFFICIENCY

vs. LOAD CURRENT (MAX8733)

MAX8732/3/4 toc02

LOAD CURRENT (A)

EFFICIENCY (%)

A: IDLE MODE, V

= 7V

B: IDLE MODE, V

= 12V

C: IDLE MODE, V

= 24V

D: PWM MODE, V

= 7V

E: PWM MODE, V

= 12V

F: PWM MODE, V

= 24V

100

0.001

0.01

0.1

3.3V OUTPUT EFFICIENCY

vs. LOAD CURRENT (MAX8732)

MAX8732/3/4 toc03

LOAD CURRENT (A)

EFFICIENCY (%)

A: IDLE MODE, V

= 7V

B: IDLE MODE, V

= 12V

C: IDLE MODE, V

= 24V

D: PWM MODE, V

= 7V

E: PWM MODE, V

= 12V

F: PWM MODE, V

= 24V

100

0.001

0.01

0.1

3.3V OUTPUT EFFICIENCY

vs. LOAD CURRENT (MAX8733)

MAX8732/3/4 toc04

LOAD CURRENT (A)

EFFICIENCY (%)

A: IDLE MODE, V

= 7V

B: IDLE MODE, V

= 12V

C: IDLE MODE, V

= 24V

D: PWM MODE, V

= 7V

E: PWM MODE, V

= 12V

F: PWM MODE, V

= 24V

PWM NO-LOAD BATTERY CURRENT

vs. INPUT VOLTAGE

MAX8732/3/4 toc05

INPUT VOLTAGE (V)

BATTERY CURRENT (mA)

MAX8733

MAX8732

0.10

0.19

0.16

0.13

0.25

0.22

0.37

0.34

0.31

0.28

0.40

IDLE MODE

NO-LOAD BATTERY CURRENT

vs. INPUT VOLTAGE

MAX8732/3/4 toc06

INPUT VOLTAGE (V)

BATTERY CURRENT (mA)

MAX8733

MAX8732

170

176

174

172

180

178

188

186

184

182

190

STANDBY INPUT CURRENT

vs. INPUT VOLTAGE

MAX8732/3/4 toc07

INPUT VOLTAGE (V)

STANDBY INPUT CURRENT (

MAX8732

MAX8733

5.0

6.5

6.0

5.5

7.5

7.0

9.5

9.0

8.5

8.0

10.0

SHUTDOWN INPUT CURRENT

vs. INPUT VOLTAGE

MAX8732/3/4 toc08

INPUT VOLTAGE (V)

SHUTDOWN INPUT CURRENT (

MAX8733

MAX8732

5V OUTPUT SWITCHING FREQUENCY

vs. LOAD CURRENT (MAX8732)

MAX8732/3/4 toc09

LOAD CURRENT (A)

SWITCHING FREQUENCY (kHz)

0.1

0.01

100

125

150

175

200

225

250

0.001

= 7V

PWM MODE

PFM MODE

ULTRASONIC MODE

Idle Mode is a trademark of Maxim Integrated Products, Inc.

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

_______________________________________________________________________________________

Typical Operating Characteristics (continued)

(Circuit of Figure 1 and Figure 2, no load on LDO5, LDO3, OUT3, OUT5, and REF, V+ = 12V, ON3 = ON5 = V

, SHDN = V+,

= 7m, V

ILIM

_ = 0.5V, T

= +25°C, unless otherwise noted.)

3.3V OUTPUT SWITCHING FREQUENCY

vs. LOAD CURRENT (MAX8732)

MAX8732/3/4 toc10

LOAD CURRENT (A)

SWITCHING FREQUENCY (kHz)

0.1

0.01

120

160

200

240

280

320

360

0.001

= 7V

PWM MODE

PFM MODE

ULTRASONIC MODE

250

0.001

0.01

0.1

5V OUTPUT SWITCHING

FREQUENCY vs. LOAD CURRENT (MAX8732)

MAX8732/3/4 toc11

LOAD CURRENT (A)

SWITCHING FREQUENCY (kHz)

100

150

200

175

125

225

PWM MODE

PFM MODE

= 24V

ULTRASONIC MODE

400

0.001

0.01

0.1

3.3V OUTPUT SWITCHING

FREQUENCY vs. LOAD CURRENT (MAX8732)

MAX8732/3/4 toc12

LOAD CURRENT (A)

SWITCHING FREQUENCY (kHz)

160

240

320

280

200

120

360

PWM MODE

PFM MODE

= 24V

ULTRASONIC MODE

500

0.001

0.01

0.1

5V OUTPUT SWITCHING

FREQUENCY vs. LOAD CURRENT (MAX8733)

100

MAX8732/3/4 toc13

LOAD CURRENT (A)

SWITCHING FREQUENCY (kHz)

200

300

400

350

250

150

450

PWM MODE

IDLE MODE

= 7V

100

200

400

300

500

600

0.001

0.01

0.1

3.3V OUTPUT SWITCHING

FREQUENCY vs. LOAD CURRENT (MAX8733)

MAX8732/3/4 toc14

LOAD CURRENT (A)

SWITCHING FREQUENCY (kHz)

550

450

350

250

150

PWM MODE

PFM MODE

= 7V

ULTRASONIC MODE

500

0.001

0.01

0.1

5V OUTPUT SWITCHING

FREQUENCY vs. LOAD CURRENT (MAX8733)

100

MAX8732/3/4 toc15

LOAD CURRENT (A)

SWITCHING FREQUENCY (kHz)

200

300

400

350

250

150

450

PWM MODE

PFM MODE

= 24V

ULTRASONIC MODE

100

200

400

300

500

600

0.001

0.01

0.1

3.3V OUTPUT SWITCHING

FREQUENCY vs. LOAD CURRENT (MAX8733)

MAX8732/3/4 toc16

LOAD CURRENT (A)

SWITCHING FREQUENCY (kHz)

550

450

350

250

150

PWM MODE

IDLE MODE

= 24V

ULTRASONIC MODE

OUT5 VOLTAGE REGULATION

vs. LOAD CURRENT (MAX8732)

MAX8732/3/4 toc17

LOAD CURRENT (A)

OUTPUT VOLTAGE (V)

0.1

0.01

5.07

5.09

5.11

5.13

5.15

5.17

5.19

5.05

0.001

ULTRASONIC

IDLE MODE

FORCED-PWM

OUT3 VOLTAGE REGULATION

vs. LOAD CURRENT (MAX8732)

MAX8732/3/4 toc18

LOAD CURRENT (A)

OUTPUT VOLTAGE (V)

0.1

0.01

3.34

3.35

3.36

3.37

3.38

3.39

3.41

3.40

3.33

0.001

ULTRASONIC

IDLE MODE

FORCED-PWM

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

______________________________________________________________________________________

Typical Operating Characteristics (continued)

(Circuit of Figure 1 and Figure 2, no load on LDO5, LDO3, OUT3, OUT5, and REF, V+ = 12V, ON3 = ON5 = V

, SHDN = V+,

= 7m, V

ILIM

_ = 0.5V, T

= +25°C, unless otherwise noted.)

4.95

4.96

4.97

4.98

4.99

5.00

20 30 40

50 60 70

100

LDO5 REGULATOR OUTPUT VOLTAGE

vs. OUTPUT CURRENT

MAX8732/3/4 toc19

LDO5 OUTPUT CURRENT (mA)

LDO5 OUTPUT VOLTAGE (V)

3.330

3.334

3.332

3.338

3.336

3.342

3.340

3.344

3.348

3.346

3.350

20 30 40

50 60 70

100

LDO3 REGULATOR OUTPUT VOLTAGE

vs. OUTPUT CURRENT

MAX8732/3/4 toc20

LDO3 OUTPUT CURRENT (mA)

LDO3 OUTPUT VOLTAGE (V)

1.995

1.997

1.996

2.000

1.999

1.998

2.001

2.002

2.004

2.003

2.005

-10

10 20

30 40 50 60 70 80 90 100

REFERENCE VOLTAGE

vs. OUTPUT CURRENT

MAX8732/3/4 toc21

REF

(µA)

REF

(V)

10V

REF, LDO3, AND LDO5 POWER-UP

MAX8732/3/4 toc22

400µs/div

V+
10V/div

LDO5
2V/div

LDO3
2V/div

REF
1V/div

3.3V

DELAYED START WAVEFORMS

(ON5 = REF)

MAX8732/3/4 toc23

200µs/div

ON5
2V/div

OUT3
2V/div

OUT5
2V/div

3.3V

DELAYED START WAVEFORMS

(ON3 = REF)

MAX8732/3/4 toc24

200µs/div

ON3
2V/div

OUT3
2V/div

OUT5
2V/div

3.3V

SOFT-START WAVEFORMS

MAX8732/3/4 toc25

200µs/div

5A/div

OUT3
5V/div

OUT5
5V/div

5A/div

3.3V

SHUTDOWN WAVEFORMS

MAX8732/3/4 toc26

10ms/div

ON3
5V/div

OUT5
5V/div

DL3
5V/div

OUT3
5V/div

SWITCHING

MAX8732/MAX8734 (TON = V

)

5V PWM-MODE

LOAD TRANSIENT RESPONSE

MAX8732/3/4 toc27

20µs/div

OUT

AC-
COUPLED
100mV/div

INDUCTOR
CURRENT
2A/div

DL5
5V/div

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

______________________________________________________________________________________

MAX8733/MAX8734 (TON = GND)

5V PWM-MODE

LOAD TRANSIENT RESPONSE

MAX8732/3/4 toc28

10µs/div

OUT

AC-
COUPLED
100mV/div

INDUCTOR
CURRENT
2A/div

DL5
5V/div

3.3V

MAX8732/MAX8734 (TON = V

)

3.3V PWM-MODE

LOAD TRANSIENT RESPONSE

MAX8732/3/4 toc29

20µs/div

OUT

AC-
COUPLED
100mV/div

INDUCTOR
CURRENT
2A/div

DL3
5V/div

3.3V

MAX8733/MAX8734 (TON = GND)

3.3V PWM-MODE

LOAD TRANSIENT RESPONSE

MAX8732/3/4 toc30

10µs/div

OUT

AC-
COUPLED
100mV/div

INDUCTOR
CURRENT
2A/div

DL3
5V/div

5V ULTRASONIC EFFICIENCY

vs. LOAD CURRENT (TON = V

)

MAX8732/3/4 toc31

LOAD CURRENT (A)

EFFICIENCY (%)

0.1

0.01

100

0.001

= 12V

= 24V

5V ULTRASONIC EFFICIENCY

vs. LOAD CURRENT (TON = GND)

MAX8732/3/4 toc32

LOAD CURRENT (A)

EFFICIENCY (%)

0.1

0.01

100

0.001

= 12V

= 24V

3.3V ULTRASONIC EFFICIENCY

vs. LOAD CURRENT (TON = V

)

MAX8732/3/4 toc33

LOAD CURRENT (A)

EFFICIENCY (%)

0.1

0.01

100

0.001

= 7V

= 12V

= 24V

3.3V ULTRASONIC EFFICIENCY

vs. LOAD CURRENT (TON = GND)

MAX8732/3/4 toc34

LOAD CURRENT (A)

EFFICIENCY (%)

0.1

0.01

100

0.001

= 7V

= 12V

= 24V

Typical Operating Characteristics (continued)

(Circuit of Figure 1 and Figure 2, no load on LDO5, LDO3, OUT3, OUT5, and REF, V+ = 12V, ON3 = ON5 = V

, SHDN = V+,

= 7m, V

ILIM

_ = 0.5V, T

= +25°C, unless otherwise noted.)

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

______________________________________________________________________________________

Pin Description

PIN

MAX8732
MAX8733

MAX8734

NAME

FUNCTION

CS3

3.3V SMPS Current-Sense Input. Connect CS3 to a current-sensing resistor from the source of
the synchronous rectifier to GND. The voltage at ILIM3 determines the current-limit threshold
(see the Current-Limit (ILIM) Circuit section).

N.C.

No Connection. Not internally connected.

PGOOD

Power-Good Output. PGOOD is an open-drain output that is pulled low if either output is
disabled or is more than 10% below its nominal value.

ON3

3.3V SMPS Enable Input. The 3.3V SMPS is enabled if ON3 is greater than the SMPS on level
and disabled if ON3 is less than the SMPS off level. If ON3 is connected to REF, the 3.3V
SMPS starts after the 5V SMPS reaches regulation (delay start). Drive ON3 below the clear
fault level to reset the fault latches.

ON5

5V SMPS Enable Input. The 5V SMPS is enabled if ON5 is greater than the SMPS on level and
disabled if ON5 is less than the SMPS off level. If ON5 is connected to REF, the 5V SMPS
starts after the 3.3V SMPS reaches regulation (delay start). Drive ON5 below the clear fault
level to reset the fault latches.

ILIM3

3.3V SMPS Current-Limit Adjustment. The GND-LX current-limit threshold defaults to 100mV if
ILIM3 is connected to V

. In adjustable mode, the current-limit threshold is 1/10th the voltage

seen at ILIM3 over a 0.5V to 3V range. The logic threshold for switchover to the 100mV default
value is approximately V

- 1V. Connect ILIM3 to REF for a fixed 200mV threshold.

SHDN

Shutdown Control Input. The device enters its 6µA supply current shutdown mode if
V

SHDN

is less than the SHDN input falling-edge trip level and does not restart until V

SHDN

greater than the SHDN input rising-edge trip level. Connect SHDN to V+ for automatic startup.
SHDN can be connected to V+ through a resistive voltage-divider to implement a
programmable undervoltage lockout.

FB3

3.3V SMPS Feedback Input. Connect FB3 to GND for fixed 3.3V operation. Connect FB3 to a
resistive voltage-divider from OUT3 to GND to adjust the output from 2V to 5.5V.

REF

2V Reference Output. Bypass to GND with a 0.22µF (min) capacitor. REF can source up to
100µA for external loads. Loading REF degrades FB_ and output accuracy according to the
REF load-regulation error.

FB5

5V SMPS Feedback Input. Connect FB5 to GND for fixed 5V operation. Connect FB5 to a
resistive voltage-divider from OUT5 to GND to adjust the output from 2V to 5.5V.

PRO

Overvoltage and Undervoltage Fault Protection Enable/Disable. Connect PRO to V

disable undervoltage, overvoltage protection, and discharge mode (DL = low in shutdown).
Connect PRO to GND to enable undervoltage and overvoltage protection (see the Fault
Protection section), and output discharge mode.

ILIM5

5V SMPS Current-Limit Adjustment. The GND-LX current-limit threshold defaults to 100mV if
ILIM5 is connected to V

. In adjustable mode, the current-limit threshold is 1/10th the voltage

seen at ILIM5 over a 0.5V to 3V range. The logic threshold for switchover to the 100mV default
value is approximately V

- 1V. Connect ILIM5 to REF for a fixed 200mV threshold.

SKIP

Low-Noise Mode Control. Connect SKIP to GND for normal Idle-Mode (pulse-skipping)
operation or to V

for PWM mode (fixed frequency). Connect to REF or leave floating for

d (

25kH

i )

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

______________________________________________________________________________________

Pin Description (continued)

PIN

MAX8732
MAX8733

MAX8734

NAME

FUNCTION

CS5

5V SMPS Current-Sense Input. Connect CS5 to a current-sensing resistor from the source of
the synchronous rectifier to GND. The voltage at ILIM5 determines the current-limit threshold
(see the Current-Limit Circuit section).

TON

Frequency Select Input. Connect to V

for 200kHz/300kHz operation and to GND for

400kHz/500kHz operation (5V/3.3V SMPS switching frequencies, respectively).

BST5

Boost Flying Capacitor Connection for 5V SMPS. Connect to an external capacitor and diode
according to the typical application circuits (Figure 1 and Figure 2). See the MOSFET Gate
Drivers (DH_, DL_) section.

LX5

Inductor Connection for 5V SMPS. LX5 is the internal lower supply rail for the DH5 high-side
gate driver. LX5 is the current-sense input for the 5V SMPS (MAX8734 only).

DH5

High-Side MOSFET Floating Gate-Driver Output for 5V SMPS. DH5 swings from LX5 to BST5.

Analog Supply Voltage Input for PWM Core. Connect V

to the system supply voltage with a

series 50

resistor. Bypass to GND with a 1µF ceramic capacitor.

LDO5

5V Linear-Regulator Output. LDO5 is the gate-driver supply for the external MOSFETs. LDO5
can provide a total of 100mA, including MOSFET gate-drive requirements and external loads.
The internal load depends on the choice of MOSFET and switching frequency (see the
Reference and Linear Regulators (REF, LDO5, and LDO3) section). If OUT5 is greater than the
LDO5 bootstrap switch threshold, the LDO5 regulator shuts down and the LDO5 pin connects
to OUT5 through a 1.4

switch. Bypass LDO5 with a minimum of 4.7µF. Use an additional 1µF

per 5mA of load.

DL5

5V SMPS Synchronous Rectifier Gate-Drive Output. DL5 swings between GND and LDO5.

V+

Power-Supply Input. V+ powers the LDO5/LDO3 linear regulators and is also used for the
Quick-PWM on-time one-shot circuits. Connect V+ to the battery input through a 4

resistor

and bypass with a 4.7µF capacitor.

OUT5

5V SMPS Output Voltage-Sense Input. Connect to the 5V SMPS output. OUT5 is an input to the
Quick-PWM on-time one-shot circuit. It also serves as the 5V feedback input in fixed-voltage
mode. If OUT5 is greater than the LDO5 bootstrap-switch threshold, the LDO5 linear regulator
shuts down and LDO5 connects to OUT5 through a 1.4

switch.

OUT3

3.3V SMPS Output Voltage-Sense Input. Connect to the 3.3V SMPS output. OUT3 is an input to
the Quick-PWM on-time one-shot circuit. It also serves as the 3V feedback input in fixed-
voltage mode. If OUT3 is greater than the LDO3 bootstrap-switch threshold, the LDO3 linear
regulator shuts down and LDO3 connects to OUT3 through a 1.5

switch.

GND

Analog and Power Ground

DL3

3.3V SMPS Synchronous-Rectifier Gate-Drive Output. DL3 swings between GND and LDO5.

LDO3

3.3V Linear-Regulator Output. LDO3 powers up after REF is in regulation. LDO3 can provide a
total of 100mA to external loads. If OUT3 is greater than the LDO3 bootstrap-switch threshold,
the LDO3 regulator shuts down and the LDO3 pin connects to OUT3 through a 1.5

switch.

Bypass LDO3 with a minimum of 4.7µF. Use an additional 1µF per 5mA of load.

DH3

High-Side MOSFET Floating Gate-Driver Output for 3.3V SMPS. DH3 swings from LX3 to BST3.

LX3

Inductor Connection for 3.3V SMPS. LX3 is the current-sense input for the 3.3V SMPS
(MAX8734 only).

BST3

Boost Flying Capacitor Connection for 3.3V SMPS. Connect to an external capacitor and diode
according to the typical application circuits (Figure 1 and Figure 2). See the MOSFET Gate
Drivers (DH_, DL_) section.

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

______________________________________________________________________________________

Typical Application Circuits

The typical application circuits (Figures 1 and 2) gener-
ate the 5V/5A and 3.3V/5A main supplies in a notebook
computer. The input supply range is 7V to 24V. Table 1
lists component suppliers.

Detailed Description

The MAX8732/MAX8733/MAX8734 dual-buck, BiCMOS,
switch-mode power-supply controllers generate logic
supply voltages for notebook computers. The
MAX8732/MAX8733/MAX8734 are designed primarily
for battery-powered applications where high efficiency
and low-quiescent supply current are critical.
The MAX8732 is optimized for highest efficiency with a
5V/200kHz SMPS and a 3.3V/300kHz SMPS, while the

MAX8732
MAX8733

7V TO 24V

10µF

4.7µF

1/2

0.1µF

FDS6612A

EP10QY03

N2
IRF7811AV

OFF

REF

0.22µF

4.7µF

3.3V ALWAYS ON

100k

1µF

5V ALWAYS ON

4.7µF

10µF

1µF

10µF

1/2
D1

CMPSH-3A

0.1µF

N3
FDS6612A

3.3V

D2
EP10QY03

IRF7811AV

LDO5

ILIM3

V+

BST5

DH5

LX5

CS5

DL5

OUT5

FB5

PGOOD

FB3

OUT3

DL3

LX3

DH3

BST3

ILIM5

ON5

ON3

GND

SHDN

REF

LDO3

PRO

SKIP

400kHz/500kHz

MAX8733

200kHz/300kHz

MAX8732

5V/3.3V SMPS

SWITCHING FREQUENCY

4.7µH
7.6µH

470µF
330µF

3.0µH
5.6µH

220µF
150µF

FREQUENCY-DEPENDENT COMPONENTS

20m

CS3

Figure 1. MAX8732/MAX8733 Typical Application Circuit

MANUFACTURER

PHONE

FACTORY FAX

Central Semiconductor

516-435-1110

516-435-1824

Dale-Vishay

402-564-3131

402-563-6418

Fairchild

408-721-2181

408-721-1635

International Rectifier

310-322-3331

310-322-3332

NIEC (Nihon)

805-843-7500

847-843-2798

Sanyo

619-661-6835

619-661-1055

Sprague

603-224-1961

603-224-1430

Sumida

847-956-0666

847-956-0702

Taiyo Yuden

408-573-4150

408-573-4159

TDK

847-390-4461

847-390-4405

Table 1. Component Suppliers

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

______________________________________________________________________________________

MAX8733 is optimized for "thin and light" applications with a
5V/400kHz SMPS and a 3.3V/500kHz SMPS. The MAX8734
provides a pin-selectable switching frequency, allowing
either 200kHz/300kHz or 400kHz/500kHz operation of the
5V/3.3V SMPSs, respectively.

Light-load efficiency is enhanced by automatic Idle-
Mode operation, a variable-frequency pulse-skipping
mode that reduces transition and gate-charge losses.

Each step-down, power-switching circuit consists of two
n-channel MOSFETs, a rectifier, and an LC output filter.
The output voltage is the average AC voltage at the
switching node, which is regulated by changing the duty
cycle of the MOSFET switches. The gate-drive signal to
the n-channel high-side MOSFET must exceed the
battery voltage, and is provided by a flying-capacitor
boost circuit that uses a 100nF capacitor connected
to BST_.

MAX8732
MAX8733
MAX8734

LDO5

DL3

CS3

(MAX8732/

MAX8733)

ILIM3

FB3

OUT3

LDO3

ON3

ON5

SHDN

PRO

2.91V

LINEAR

REG

POWER-ON SEQUENCE/

CLEAR FAULT LATCH

EN3

THERMAL

SHUTDOWN

LINEAR

REG

REFERENCE

3.3V

SMPS PWM

CONTROLLER

SMPS PWM

CONTROLLER

4.56V

PGOOD3

PGOOD5

PGOOD

LDO5

BST5

DH5

LX5

EN5

DL5

CS5

(MAX8732/

MAX8733)

ILIM5

FB5

OUT5

LDO5

REF

V+

GND

TON

(MAX8734 ONLY)

BST3

DH3

LX3

Figure 3. Detailed Functional Diagram

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

______________________________________________________________________________________

Each PWM controller consists of a Dual-Mode feedback
network and multiplexer, a multi-input PWM comparator,
high-side and low-side gate drivers, and logic. The
MAX8732/MAX8733/MAX8734 contain fault-protection cir-
cuits that monitor the main PWM outputs for undervoltage
and overvoltage conditions. A power-on sequence block

controls the power-up timing of the main PWMs and moni-
tors the outputs for undervoltage faults. The
MAX8732/MAX8733/MAX8734 include 5V and 3.3V linear
regulators. Bias generator blocks include the 5V (LDO5)
linear regulator, 2V precision reference, and automatic
bootstrap switchover circuit.

ON-TIME

COMPUTE

OFF

TRIG

ONE SHOT

ERROR

AMPLIFIER

CURRENT

LIMIT

ZERO

CROSSING

FAULT

LATCH

20ms

BLANKING

OUT

REF

ILIM_

CS_ (MAX8732/8733)
LX_ (MAX8734)

SKIP

OUT_

FB_

0.15V

PRO

0.9

REF

1.1

REF

0.7

REF

OV_FAULT

UV_FAULT

PGOOD

TO DL_ DRIVER

TO DH_ DRIVER

TON (MAX8734)

V+

Figure 4. PWM Controller (One Side Only)

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

______________________________________________________________________________________

These internal blocks are not powered directly from the
battery. Instead, the 5V (LDO5) linear regulator steps
down the battery voltage to supply both internal circuit-
ry and the gate drivers. The synchronous-switch gate
drivers are directly powered from LDO5, while the high-
side switch gate drivers are indirectly powered from
LDO5 through an external diode-capacitor boost cir-
cuit. An automatic bootstrap circuit turns off the 5V lin-
ear regulator and powers the device from OUT5 when
OUT5 is above 4.56V.

Free-Running, Constant On-Time PWM

Controller with Input Feed-Forward

The Quick-PWM control architecture is a pseudo-fixed-
frequency, constant on-time, current-mode type with
voltage feedforward. The Quick-PWM control architec-
ture relies on the output ripple voltage to provide the
PWM ramp signal; thus the output filter capacitor's ESR
acts as a current-feedback resistor. The high-side
switch on-time is determined by a one-shot whose peri-
od is inversely proportional to input voltage and directly
proportional to output voltage. Another one-shot sets a
minimum off-time (300ns typ). The on-time one-shot
triggers when the following conditions are met: the error
comparator is low, the synchronous rectifier current is
below the current-limit threshold, and the minimum off-
time one-shot has timed out.

On-Time One-Shot (t

)

Each PWM core includes a one-shot that sets the high-
side switch on-time for each controller. Each fast, low-
jitter, adjustable one-shot includes circuitry that varies
the on-time in response to battery and output voltage.
The high-side switch on-time is inversely proportional to
the battery voltage as measured by the V+ input, and
proportional to the output voltage. This algorithm results
in a nearly constant switching frequency despite the
lack of a fixed-frequency clock generator. The benefit
of a constant switching frequency is the frequency can
be selected to avoid noise-sensitive frequency regions:

See Table 2 for approximate K-factors. The constant
0.075V is an approximation to account for the expected
drop across the synchronous-rectifier switch. Switching
frequency increases as a function of load current due
to the increasing drop across the synchronous rectifier,
which causes a faster inductor-current discharge ramp.

On-times translate only roughly to switching frequen-
cies. The on-times guaranteed in the Electrical
Characteristics are influenced by switching delays in
the external high-side power MOSFET. Also, the dead-
time effect increases the effective on-time, reducing the
switching frequency. It occurs only in PWM mode (SKIP
= V

) and during dynamic output voltage transitions

when the inductor current reverses at light or negative
load currents. With reversed inductor current, the
inductor's EMF causes LX to go high earlier than nor-
mal, extending the on-time by a period equal to the DH-
rising dead time.

For loads above the critical conduction point, the actual
switching frequency is:

where V

DROP1

is the sum of the parasitic voltage drops

in the inductor discharge path, including synchronous
rectifier, inductor, and PC board resistances; V

DROP2

the sum of the parasitic voltage drops in the charging
path, including high-side switch, inductor, and PC
board resistances, and t

is the on-time calculated by

the MAX8732/MAX8733/MAX8734.

Automatic Pulse-Skipping Switchover

(Idle Mode)

In Idle Mode (SKIP = GND), an inherent automatic
switchover to PFM takes place at light loads. This
switchover is affected by a comparator that truncates
the low-side switch on-time at the inductor current's
zero crossing. This mechanism causes the threshold
between pulse-skipping PFM and nonskipping PWM
operation to coincide with the boundary between con-

OUT

DROP

+ +

(

)

K V

OUT

(

)

0 075

SMPS

SWITCHING

FREQUENCY (kHz)

K-FACTOR (µs)

APPROXIMATE K-

FACTOR ERROR (%)

MAX8732/MAX8734 (t

= V

), 5V

200

5.0

±10

MAX8732/MAX8734 (t

= V

), 3.3V

300

3.3

±10

MAX8733/MAX8734 (t

= GND), 5V

400

2.5

±10

MAX8733/MAX8734 (t

= GND), 3.3V

500

2.0

±10

Table 2. Approximate K-Factor Errors

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

______________________________________________________________________________________

tinuous and discontinuous inductor-current operation
(also known as the critical conduction point):

where K is the on-time scale factor (see the On-Time
One-Shot (t

) section). The load-current level at which

PFM/PWM crossover occurs, I

LOAD(SKIP)

, is equal to 1/2

the peak-to-peak ripple current, which is a function of the
inductor value (Figure 5). For example, in the MAX8732
typical application circuit with V

OUT2

= 5V, V+ = 12V,

L = 7.6µH, and K = 5µs, switchover to pulse-skipping
operation occurs at I

LOAD

= 0.96A or about 1/5th full

load. The crossover point occurs at an even lower value
if a swinging (soft-saturation) inductor is used.

The switching waveforms may appear noisy and asyn-
chronous when light loading causes pulse-skipping
operation, but this is a normal operating condition that
results in high light-load efficiency. Trade-offs in PFM
noise vs. light-load efficiency are made by varying the
inductor value. Generally, low inductor values produce
a broader efficiency vs. load curve, while higher values
result in higher full-load efficiency (assuming that the
coil resistance remains fixed) and less output voltage
ripple. Penalties for using higher inductor values
include larger physical size and degraded load-tran-
sient response (especially at low input-voltage levels).

DC output accuracy specifications refer to the trip level of
the error comparator. When the inductor is in continuous
conduction, the output voltage has a DC regulation higher
than the trip level by 50% of the ripple. In discontinuous
conduction (SKIP = GND, light load), the output voltage
has a DC regulation higher than the trip level by approxi-
mately 1.5% due to slope compensation.

Forced-PWM Mode

The low-noise, forced-PWM (SKIP = V

) mode dis-

ables the zero-crossing comparator, which controls the

low-side switch on-time. Disabling the zero-crossing
detector causes the low-side, gate-drive waveform to
become the complement of the high-side, gate-drive
waveform. The inductor current reverses at light loads
as the PWM loop strives to maintain a duty ratio of
V

OUT

/V+. The benefit of forced-PWM mode is to keep

the switching frequency fairly constant, but it comes at
a cost: the no-load battery current can be 10mA to
50mA, depending on switching frequency and the
external MOSFETs.

Forced-PWM mode is most useful for reducing audio-
frequency noise, improving load-transient response,
providing sink-current capability for dynamic output
voltage adjustment, and improving the cross-regulation
of multiple-output applications that use a flyback trans-
former or coupled inductor.

Enhanced Ultrasonic Mode

(25kHz (min) Pulse Skipping)

Leaving SKIP unconnected or connecting SKIP to REF
activates a unique pulse-skipping mode with a mini-
mum switching frequency of 25kHz. This ultrasonic
pulse-skipping mode eliminates audio-frequency mod-
ulation that would otherwise be present when a lightly
loaded controller automatically skips pulses. In ultra-
sonic mode, the controller automatically transitions to
fixed-frequency PWM operation when the load reaches
the same critical conduction point (I

LOAD(SKIP)

) that

occurs when normally pulse skipping.

An ultrasonic pulse occurs when the controller detects
that no switching has occurred within the last 28µs.
Once triggered, the ultrasonic controller pulls DL high,
turning on the low-side MOSFET to induce a negative
inductor current. After the inductor current reaches the
negative ultrasonic current threshold, the controller
turns off the low-side MOFET (DL pulled low) and trig-
gers a constant on-time (DH driven high). When the on-
time has expired, the controller reenables the low-side
MOSFET until the controller detects that the inductor
current dropped below the zero-crossing threshold.
Starting with a DL pulse greatly reduces the peak out-
put voltage when compared to starting with a DH pulse.

The output voltage at the beginning of the ultrasonic
pulse determines the negative ultrasonic current thresh-
old, resulting in the following equation:

where V

> V

REF

and R

is the on-resistance of the

synchronous rectifier (MAX8734) or the current-sense
resistor value (MAX8732/MAX8733).

I R

ISONIC

REF

(

)

0 58

LOAD SKIP

OUT

(

)

+ -

INDUCTOR CURRENT

LOAD

= I

PEAK

ON-TIME

TIME

-I

PEAK

V+

- V

OUT

Figure 5. Pulse- Skipping/Discontinuous Crossover Point

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

______________________________________________________________________________________

Reference and Linear Regulators

(REF, LDO5, and LDO3)

The 2V reference (REF) is accurate to ±1% over tem-
perature, making REF useful as a precision system
reference. Bypass REF to GND with a 0.22µF (min)
capacitor. REF can supply up to 100µA for external
loads. However, if extremely accurate specifications for
both the main output voltages and REF are essential,
avoid loading REF. Loading REF reduces the LDO5,
LDO3, OUT5, and OUT3 output voltages slightly
because of the reference load-regulation error.

Two internal regulators produce 5V (LDO5) and 3.3V
(LDO3). LDO5 provides gate drive for the external
MOSFETs and powers the PWM controller, logic, refer-
ence, and other blocks within the device. The LDO5
regulator supplies a total of 100mA for internal and
external loads, including MOSFET gate drive, which
typically varies from 10mA to 50mA, depending on
switching frequency and the external MOSFETs. LDO3
powers up when the reference (REF) is in regulation,
and supplies up to 100mA for external loads. Bypass
LDO5 and LDO3 with a minimum 4.7µF load; use an
additional 1µF per 5mA of internal and external load.

When the 5V main output voltage is above the LDO5
bootstrap-switchover threshold, an internal 1.4 p-chan-
nel MOSFET switch connects OUT5 to LDO5 while simul-
taneously shutting down the LDO5 linear regulator.
Similarly, when the 3.3V main output voltage is above the
LDO3 bootstrap-switchover threshold, an internal 1.5
p-channel MOSFET switch connects OUT3 to LDO3 while
simultaneously shutting down the LDO3 linear regulator.
These actions bootstrap the device, powering the internal
circuitry and external loads from the output SMPS volt-
ages, rather than through linear regulators from the bat-

tery. Bootstrapping reduces power dissipation due to
gate charge and quiescent losses by providing power
from a 90%-efficient switch-mode source, rather than
from a much-less-efficient linear regulator.

Current-Limit Circuit (ILIM_)

The current-limit circuit employs a "valley" current-sens-
ing algorithm. The MAX8734 uses the on-resistance of
the synchronous rectifier, while the MAX8732/MAX8733
use a discrete resistor in series with the source of the
synchronous rectifier as a current-sensing element. If the
magnitude of the current-sense signal at CS_
(MAX8732/MAX8733)/LX_ (MAX8734) is above the cur-
rent-limit threshold, the PWM is not allowed to initiate a
new cycle (Figure 7). The actual peak current is greater
than the current-limit threshold by an amount equal to the
inductor ripple current. Therefore, the exact current-limit
characteristic and maximum load capability are a func-
tion of the current-limit threshold, inductor value, and
input and output voltage.

For the MAX8732/MAX8733, connect CS_ to the junction
of the synchronous rectifier source and a current-sense
resistor to GND. With a current-limit threshold of 100mV,
the accuracy is approximately ±7%. Using a lower cur-
rent-sense threshold results in less accuracy. The cur-
rent-sense resistor only dissipates power when the
synchronous rectifier is on.

For lower power dissipation, the MAX8734 uses the on-
resistance of the synchronous rectifier as the current-
sense element. Use the worst-case maximum value for
R

DS(ON)

from the MOSFET data sheet, and add some

margin for the rise in R

DS(ON)

with temperature. A good

general rule is to allow 0.5% additional resistance for
each °C of temperature rise. The current limit varies
with the on-resistance of the synchronous rectifier. The
reward for this uncertainty is robust, lossless overcur-
rent sensing. When combined with the undervoltage-

ON-TIME (t

)

ZERO-CROSSING
DETECTION

SONIC

40µs (MAX)

INDUCTOR
CURRENT

Figure 6. Ultrasonic Current Waveforms

INDUCTOR CURRENT

LIMIT

LOAD

TIME

-I

PEAK

Figure 7. "Valley" Current-Limit Threshold Point

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

______________________________________________________________________________________

protection circuit, this current-limit method is effective
in almost every circumstance.

A negative current limit prevents excessive reverse
inductor currents when V

OUT

sinks current. The nega-

tive current-limit threshold is set to approximately 120%
of the positive current limit and therefore tracks the
positive current limit when ILIM_ is adjusted.

The current-limit threshold is adjusted with an external
voltage-divider at ILIM_. The current-limit threshold
adjustment range is from 50mV to 300mV. In the
adjustable mode, the current-limit threshold voltage is
precisely 1/10th the voltage at ILIM_. The threshold
defaults to 100mV when ILIM_ is connected to V

The logic threshold for switchover to the 100mV default
value is approximately V

- 1V.

Carefully observe the PC board layout guidelines to
ensure that noise and DC errors do not corrupt the cur-
rent-sense signals at CS_. Mount or place the device
close to the synchronous rectifier or sense resistor
(whichever is used) with short, direct traces, making a
Kelvin sense connection to the sense resistor. The cur-
rent-sense accuracy of Figure 8 is degraded if the
Schottky diode conducts during the synchronous recti-
fier on-time. To ensure that all current passes through
the sense resistor, connect the Schottky diode in paral-
lel with only the synchronous recifier (Figure 9) if the
voltage drop across the synchronous rectifier and
sense resistor exceeds the Schottky diode's forward
voltage. Note that at high temperatures, the on-resis-
tance of the synchronous rectifier increases and the
forward voltage of the Schottky diode decreases.

MOSFET Gate Drivers (DH_, DL_)

The DH_ and DL_ gate drivers sink 2.0A and 3.3A
respectively of gate drive, ensuring robust gate drive for
high-current applications. The DH_ floating high-side
MOSFET drivers are powered by diode-capacitor charge
pumps at BST_. The DL_ synchronous-rectifier drivers are
powered by LDO5.

The internal pulldown transistors that drive DL_ low
have a 0.6 typical on-resistance. These low on-resis-
tance pulldown transistors prevent DL_ from being
pulled up during the fast rise time of the inductor nodes
due to capacitive coupling from the drain to the gate of
the low-side synchronous-rectifier MOSFETs. However,
for high-current applications, some combinations of
high- and low-side MOSFETS may cause excessive
gate-drain coupling, which leads to poor efficiency and
EMI-producing shoot-through currents. Adding a resis-
tor in series with BST_ increases the turn-on time of the

MAX8732
MAX8733

V+

DH_

DL_

CS_

LX_

OUT_

Figure 8. Current Sensing Using Sense Resistor
(MAX8732/MAX8733)

MAX8732
MAX8733

V+

DH_

DL_

CS_

LX_

OUT_

Figure 9. More Accurate Current Sensing with Adjusted
Schottky Connection

MAX8732
MAX8733
MAX8734

BST

Figure 10. Reducing the Switching-Node Rise Time

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

______________________________________________________________________________________

high-side MOSFETs at the expense of efficiency, without
degrading the turn-off time (Figure 10).

Adaptive dead-time circuits monitor the DL_ and DH_
drivers and prevent either FET from turning on until the
other is fully off. This algorithm allows operation without
shoot-through with a wide range of MOSFETs, minimiz-
ing delays and maintaining efficiency. There must be
low-resistance, low-inductance paths from the gate dri-
vers to the MOSFET gates for the adaptive dead-time cir-
cuit to work properly. Otherwise, the sense circuitry
interprets the MOSFET gate as "off" when there is actual-
ly charge left on the gate. Use very short, wide traces
measuring 10 to 20 squares (50mils to 100mils wide if
the MOSFET is 1in from the device).

POR, UVLO, and Internal Digital

Soft-Start

Power-on reset (POR) occurs when V+ rises above
approximately 1V, resetting the undervoltage, over-
voltage, and thermal-shutdown fault latches. LDO5
undervoltage-lockout (UVLO) circuitry inhibits switching
when LDO5 is below 4V. DL_ is low if PRO is disabled;
DL_ is high if PRO is enabled. The output voltages
begin to ramp up once V

exceeds its 4V UVLO and

REF is in regulation. The internal digital soft-start timer
begins to ramp up the maximum-allowed current limit
during startup. The 1.7ms ramp occurs in five steps:
20%, 40%, 60%, 80%, and 100%.

Power-Good Output (PGOOD)

The PGOOD comparator continuously monitors both out-
put voltages for undervoltage conditions. PGOOD is
actively held low in shutdown, standby, and soft-start.
PGOOD releases and digital soft-start terminates when
BOTH outputs reach the error-comparator threshold.
PGOOD goes low if EITHER output turns off or is 10%
below its nominal regulation point. PGOOD is a true
open-drain output. Note that PGOOD is independent of
the state of PRO.

Fault Protection

The MAX8732/MAX8733/MAX8734 provide over/under-
voltage fault protection. Drive PRO low to activate fault
protection. Drive PRO high to disable fault protection.
Once activated, the devices continuously monitor for
both undervoltage and overvoltage conditions.

Overvoltage Protection

When the output voltage is 11% above the set voltage,
the overvoltage fault protection activates. The synchro-
nous rectifier turns on 100% and the high-side MOSFET
turns off. This rapidly discharges the output capacitors,
decreasing the output voltage. The output voltage may

dip below ground. For loads that cannot tolerate a neg-
ative voltage, place a power Schottky diode across the
output to act as a reverse-polarity clamp. In practical
applications, there is a fuse between the power source
(battery) and the external high-side switches. If the
overvoltage condition is caused by a short in the high-
side switch, turning the synchronous rectifier on 100%
creates an electrical short between the battery and
GND, blowing the fuse and disconnecting the battery
from the output. Once an overvoltage fault condition is
set, it can only be reset by toggling SHDN, ON_, or
cycling V+ (POR).

Undervoltage Protection

When the output voltage is 30% below the set voltage for
over 22ms (undervoltage shutdown blanking time), the
undervoltage fault protection activates. Both SMPSs stop
switching. The two outputs start to discharge (see the
Discharge Mode (Soft-Stop) section). When the output
voltage drops to 0.3V, the synchronous rectifiers turn on,
clamping the outputs to GND. Toggle SHDN or ON_, or
cycle V+ (POR) to clear the undervoltage fault latch.

Thermal Protection

The MAX8732/MAX8733/MAX8734 have thermal shut-
down to protect the devices from overheating. Thermal
shutdown occurs when the die temperature exceeds
+160°C. All internal circuitry shuts down during thermal
shutdown. The MAX8732/MAX8733/MAX8734 may trig-
ger thermal shutdown if LDO_ is not bootstrapped from
OUT_ while applying a high input voltage on V+ and
drawing the maximum current (including short circuit)
from LDO_. Even if LDO_ is bootstrapped from OUT_,
overloading the LDO_ causes large power dissipation
on the bootstrap switches, which may result in thermal
shutdown. Cycling SHDN, ON3, ON5, or a V+ (POR)
ends the thermal-shutdown state.

Discharge Mode (Soft-Stop)

When PRO is low and a transition to standby or shut-
down mode occurs, or the output undervoltage fault
latch is set, the outputs discharge to GND through an
internal 12 switch, until the output voltages decrease
to 0.3V. The reference remains active to provide an
accurate threshold and to provide overvoltage protec-
tion. When both SMPS outputs discharge to 0.3V, the
DL_ synchronous rectifier drivers are forced high. The
synchronous rectifier drivers clamp the SMPS outputs
to GND. When PRO is high, the SMPS outputs do not
discharge and the DL_ synchronous rectifier drivers
remain low.

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

______________________________________________________________________________________

Shutdown Mode

Drive SHDN below the precise SHDN input falling-edge
trip level to place the MAX8732/MAX8733/MAX8734
in their low-power shutdown state. The MAX8732/
MAX8733/MAX8734 consume only 6µA of quiescent
current while in shutdown mode. When shutdown mode
activates, the reference turns off, making the threshold
to exit shutdown inaccurate. To guarantee startup, drive
SHDN above 2V (SHDN input rising-edge trip level). For
automatic shutdown and startup, connect SHDN to V+.
If PRO is low, both SMPS outputs are discharged
to 0.3V through a 12 switch before entering True
ShutdownTM. The accurate 1V falling-edge threshold on
SHDN can be used to detect a specific analog voltage

level and shut down the device. Once in shutdown, the
1.6V rising-edge threshold activates, providing sufficient
hysteresis for most applications. For additional hystere-
sis, the undervoltage threshold can be made dependent
on REF or LDO_, which go to 0V in shutdown.

Power-Up Sequencing and

On/Off Controls (ON3, ON5)

ON3 and ON5 control SMPS power-up sequencing.
ON3 or ON5 rising above 2.4V enables the respective
outputs. ON3 or ON5 falling below 1.6V disables the
respective outputs.

Connecting ON3 or ON5 to REF forces the respective
outputs off while the other output is below regulation and

MODE

CONDITION

COMMENT

Power-Up

LDO5 < UVLO threshold

Transitions to discharge mode after a V+ POR and after REF becomes valid.
LDO5, LDO3, and REF remain active. DL_ is active if PRO is low.

Run

SHDN = high, ON3 or ON5
enabled

Normal operation

Overvoltage

Protection

Either output > 111% of
nominal level, PRO = low

DL_ is forced high. LDO3, LDO5 active. Exited by a V+ POR or by toggling
SHDN, ON3, or ON5.

Undervoltage

Protection

Either output < 70% of
nominal after 22ms time-
out expires and output is
enabled, PRO = low

If PRO is low, DL_ is forced high after discharge mode terminates. LDO3,
LDO5 active. Exited by a V+ POR or by toggling SHDN, ON3, or ON5.

Discharge

PRO is low and either
SMPS output is still high in
either standby mode or
shutdown mode

Discharge switch (12

) connects OUT_ to PGND. One output may still run

while the other is in discharge mode. Activates when LDO_ is in UVLO, or
transition to UVLO, standby, or shutdown has begun. LDO3, LDO5 active.

Standby

ON5, ON3 < startup
threshold, SHDN = high

DL_ stays high if PRO is low. LDO3, LDO5 active.

Shutdown

SHDN = low

All circuitry off

Thermal Shutdown

> +160°C

All circuitry off. Exited by V+ POR or cycling SHDN, ON3, or ON5.

Table 3. Operating-Mode Truth Table

SHDN

(

ON3

(

ON5

(

LDO5

LDO3

5V SMPS

3V SMPS

Low

Off

"> 2.4" => High

Low

On (after REF powers up)

Off

"> 2.4" => High

High

On (after REF powers up)

"> 2.4" => High

High

Low

On (after REF powers up)

Off

"> 2.4" => High

Low

High

On (after REF powers up)

Off

"> 2.4" => High

High

REF

On (after REF powers up)

On (after 3V SMPS is up)

"> 2.4" => High

REF

High

On (after REF powers up)

On (after 5V SMPS is up)

Table 4. Power-Up Sequencing

True Shutdown is a trademark of Maxim Integrated Products, Inc.

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

______________________________________________________________________________________

starts after that output regulates. The second SMPS
remains on until the first SMPS turns off, the device shuts
down, a fault occurs, or LDO5 goes into undervoltage
lockout. Both supplies begin their power-down sequence
immediately when the first supply turns off. Driving ON_
below 0.8V clears the overvoltage, undervoltage, and
thermal fault latches.

Adjustable-Output Feedback

(Dual-Mode FB)

Connect FB_ to GND to enable the fixed, preset SMPS
output voltages (3.3V and 5V). Connect a resistive volt-
age-divider at FB_ between OUT_ and GND to adjust
the respective output voltage between 2V and 5.5V
(Figure 11). Choose R2 to be approximately 10k, and
solve for R1 using the equation:

where V

= 2V nominal.

When using the adjustable-output mode, set the 3.3V
SMPS lower than the 5V SMPS. LDO5 connects to OUT5
through an internal switch only when OUT5 is above the
LDO5 bootstrap-switch threshold (4.56V). LDO3 con-
nects to OUT3 through an internal switch only when
OUT3 is above the LDO3 bootstrap switch threshold
(2.91V). Bootstrapping is most effective when the fixed
output voltages are used. Once LDO_ is bootstrapped
from OUT_, the internal linear regulator turns off. This

reduces internal power dissipation and improves effi-
ciency when LDO_ is powered with a high input voltage.

Design Procedure

Establish the input voltage range and maximum load
current before choosing an inductor and its associated
ripple-current ratio (LIR). The following four factors dic-
tate the rest of the design:

Input Voltage Range.

The maximum value (V+

(MAX)

)

must accommodate the maximum AC adapter volt-
age. The minimum value (V+

(MIN)

) must account for

the lowest input voltage after drops due to connec-
tors, fuses, and battery selector switches. Lower input
voltages result in better efficiency.

Maximum Load Current.

The peak load current

LOAD(MAX)

) determines the instantaneous compo-

nent stress and filtering requirements, and thus dri-
ves output capacitor selection, inductor saturation
rating, and the design of the current-limit circuit.
The continuous load current (I

LOAD

) determines the

thermal stress and drives the selection of input
capacitors, MOSFETs, and other critical heat-con-
tributing components.

Switching Frequency.

This choice determines the

basic trade-off between size and efficiency. The
optimal frequency is largely a function of maximum
input voltage and MOSFET switching losses. The
MAX8732 has a nominal switching frequency of
200kHz for the 5V SMPS and 300kHz for the 3.3V
SMPS. The MAX8733 has a nominal switching fre-
quency of 400kHz for the 5V SMPS and 500kHz for
the 3.3V SMPS. The MAX8734 has a pin-selectable
switching frequency.

Inductor Ripple Current Ratio (LIR).

LIR is the

ratio of the peak-peak ripple current to the average
inductor current. Size and efficiency trade-offs must
be considered when setting the inductor ripple cur-
rent ratio. Low inductor values cause large ripple
currents, resulting in the smallest size, but poor effi-
ciency and high output noise. The minimum practi-
cal inductor value is one that causes the circuit to
operate at critical conduction (where the inductor
current just touches zero with every cycle at maxi-
mum load). Inductor values lower than this grant no
further size-reduction benefit.

The MAX8732/MAX8733/MAX8734s' pulse-skipping
algorithm (SKIP = GND) initiates skip mode at the
critical conduction point, so the inductor's operating
point also determines the load current at which
PWM/PFM switchover occurs. The optimum point is
usually found between 20% and 50% ripple current.

OUT

MAX8732
MAX8733
MAX8734

DH_

DL_

GND

OUT_

FB_

V+

OUT_

Figure 11. Setting V

OUT_

with a Resistor-Divider

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

______________________________________________________________________________________

Inductor Selection

The switching frequency (on-time) and operating point
(% ripple or LIR) determine the inductor value as follows:

Example: I

LOAD(MAX)

= 5A, V+ = 12V, V

OUT5

= 5V, f =

200kHz, 35% ripple current or LIR = 0.35:

Find a low-loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. Ferrite cores
are often the best choice. The core must be large enough
not to saturate at the peak inductor current (I

PEAK

= I

LOAD(MAX)

+ [(LIR/2) x I

LOAD(MAX)

]

The inductor ripple current also impacts transient-
response performance, especially at low V+ - V

OUT_

differences. Low inductor values allow the inductor cur-
rent to slew faster, replenishing charge removed from
the output filter capacitors by a sudden load step. The
peak amplitude of the output transient (V

SAG

) is also a

function of the maximum duty factor, which can be cal-
culated from the on-time and minimum off-time:

where minimum off-time = 0.350µs (max) and K is from
Table 2.

Determining the Current Limit

The minimum current-limit threshold must be great
enough to support the maximum load current when the
current limit is at the minimum tolerance value. The val-
ley of the inductor current occurs at I

LOAD(MAX)

minus

half of the ripple current; therefore:

LIMIT(LOW)

> I

LOAD(MAX)

- [(LIR / 2) x I

LOAD(MAX)

]

where I

LIMIT(LOW)

= minimum current-limit threshold

voltage divided by the R

DS(ON)

of N2/N4 (MAX8734).

For the MAX8732/MAX8733/MAX8734, the minimum
current-limit threshold voltage is 93mV (ILIM_ = V

Use the worst-case maximum value for R

DS(ON)

from

the MOSFET N2/N4 data sheet and add some margin
for the rise in R

DS(ON)

with temperature. A good gener-

al rule is to allow 0.5% additional resistance for each °C
of temperature rise.

Examining the 5A circuit example with a maximum
R

DS(ON)

= 12m at high temperature reveals the following:

LIMIT(LOW)

= 93mV / 12m > 5A - (0.35 / 2) 5A

7.75A > 4.125A

7.75A is greater than the valley current of 4.125A, so
the circuit can easily deliver the full-rated 5A using the
fixed 100mV nominal current-limit threshold voltage.

Connect the source of the synchronous rectifier to a
current-sense resistor to GND (MAX8732/MAX8733),
and connect CS_ to that junction to set the current limit
for the device. The MAX8732/MAX8733/MAX8734 limit
the current with the sense resistor instead of the
R

DS(ON)

of N2/N4. The maximum value of the sense

resistor can be calculated with the equation:

LIM_

= 93mV / R

SENSE

Output Capacitor Selection

The output filter capacitor must have low enough equiv-
alent series resistance (ESR) to meet output ripple and
load-transient requirements, yet have high enough ESR
to satisfy stability requirements. The output capaci-
tance must also be high enough to absorb the inductor
energy while transitioning from full-load to no-load con-
ditions without tripping the overvoltage fault latch. In
applications where the output is subject to large load
transients, the output capacitor's size depends on how
much ESR is needed to prevent the output from dip-
ping too low under a load transient. Ignoring the sag
due to finite capacitance:

where V

DIP

is the maximum-tolerable transient voltage

drop. In non-CPU applications, the output capacitor's
size depends on how much ESR is needed to maintain
an acceptable level of output voltage ripple:

where V

P-P

is the peak-to-peak output voltage ripple.

The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as to
the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value (this is true of tanta-
lum, OS-CON, and other electrolytic-type capacitors).

LIR

ESR

P P

LOAD MAX

(

)

ESR

DIP

LOAD MAX

(

)

L K

SAG

LOAD MAX

OUT

OFF MIN

OUT

OFF MIN

(

)

+ -

(

)

(

)

(

)

kHz

(

)

5 12

200

0 35

8 3

. µ

LIR I

OUT

LOAD MAX

+ -

(

)

+ × ×

(

)

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

______________________________________________________________________________________

When using low-capacity filter capacitors such as
polymer types, capacitor size is usually determined by
the capacity required to prevent V

SAG

and V

SOAR

from

tripping the undervoltage and overvoltage fault latches
during load transients in ultrasonic mode.

For low input-to-output voltage differentials (V

/ V

OUT

< 2), additional output capacitance is required to main-
tain stability and good efficiency in ultrasonic mode.

The amount of overshoot due to stored inductor energy
can be calculated as:

where I

PEAK

is the peak inductor current.

Stability Considerations

Stability is determined by the value of the ESR zero
(f

ESR

) relative to the switching frequency (f). The point

of instability is given by the following equation:

where:

For a typical 300kHz application, the ESR zero frequen-
cy must be well below 95kHz, preferably below 50kHz.
Low-ESR capacitors (especially polymer or tantalum),
in widespread use at the time of publication, typically
have ESR zero frequencies lower than 30kHz. In the
design example used for inductor selection, the ESR
needed to support a specified ripple voltage is found
by the equation:

where LIR is the inductor ripple current ratio and I

LOAD

is the average DC load. Using LIR = 0.35 and an aver-
age load current of 5A, the ESR needed to support
50mV

P-P

ripple is 28m.

Do not place high-value ceramic capacitors directly
across the fast-feedback inputs (OUT_ to GND for inter-
nal feedback, FB_ divider point for external feedback)
without taking precautions to ensure stability. Large
ceramic capacitors can have a high-ESR zero frequency
and cause erratic, unstable operation. Adding a discrete
resistor or placing the capacitors a couple of inches
downstream from the junction of the inductor and OUT_
may improve stability.

Unstable operation manifests itself in two related but
distinctly different ways: double pulsing and fast-feed-
back loop instability. Noise on the output or insufficient
ESR may cause double pulsing. Insufficient ESR does
not allow the amplitude of the voltage ramp in the output
signal to be large enough. The error comparator mistak-
enly triggers a new cycle immediately after the 350ns
minimum off-time period has expired. Double pulsing
results in increased output ripple, and can indicate the
presence of loop instability caused by insufficient ESR.
Loop instability results in oscillations or ringing at the
output after line or load perturbations, causing the out-
put voltage to fall below the tolerance limit.

The easiest method for checking stability is to apply a
very fast zero-to-max load transient (refer to the
MAX8734 EV kit data sheet) and observe the output
voltage-ripple envelope for overshoot and ringing.
Monitoring the inductor current with an AC current
probe may also provide some insight. Do not allow
more than one cycle of ringing of under- or overshoot
after the initial step response.

Input Capacitor Selection

The input capacitors must meet the input-ripple-current
(I

RMS

) requirement imposed by the switching current.

The MAX8732/MAX8733/MAX8734 dual switching regu-
lators operate at different frequencies. This interleaves
the current pulses drawn by the two switches and
reduces the overlap time where they add together. The
input RMS current is much smaller in comparison than
with both SMPSs operating in phase. The input RMS cur-
rent varies with load and the input voltage.

The maximum input capacitor RMS current for a single
SMPS is given by:

When V+ = 2 x V

OUT_

(D = 50%), I

RMS

has maximum

current of I

LOAD

/ 2.

The ESR of the input-capacitor is important for deter-
mining capacitor power dissipation. All the power
(I

RMS2

x ESR) heats up the capacitor and reduces effi-

ciency. Nontantalum chemistries (ceramic or OS-CON)
are preferred due to their low ESR and resilience to
power-up surge currents. Choose input capacitors that
exhibit less than +10°C temperature rise at the RMS
input current for optimal circuit longevity. Place the
drains of the high-side switches close to each other to
share common input bypass capacitors.

RMS

LOAD

OUT

+ -

(

)

ESR

LIR

RIPPLE P P

LOAD

(

)

ESR

OUT

ESR

SOAR

PEAK

OUT OUT

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

______________________________________________________________________________________

Power MOSFET Selection

Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
(>5A) when using high-voltage (>20V) AC adapters.
Low-current applications usually require less attention.

Choose a high-side MOSFET (N1/N3) that has conduc-
tion losses equal to the switching losses at the typical
battery voltage for maximum efficiency. Ensure that the
conduction losses at the minimum input voltage do not
exceed the package thermal limits or violate the overall
thermal budget. Ensure that conduction losses plus
switching losses at the maximum input voltage do not
exceed the package ratings or violate the overall ther-
mal budget.

Choose a synchronous rectifier (N2/N4) with the lowest
possible R

DS(ON)

. Ensure the gate is not pulled up by the

high-side switch turning on due to parasitic drain-to-gate
capacitance, causing cross-conduction problems.
Switching losses are not an issue for the synchronous
rectifier in the buck topology since it is a zero-voltage
switched device when using the buck topology.

MOSFET Power Dissipation

Worst-case conduction losses occur at the duty-factor
extremes. For the high-side MOSFET, the worst-case
power dissipation (PD) due to the MOSFET's R

DS(ON)

occurs at the minimum battery voltage:

Generally, a small high-side MOSFET reduces switch-
ing losses at high input voltage. However, the R

DS(ON)

required to stay within package power-dissipation limits
often limits how small the MOSFET can be. The opti-
mum situation occurs when the switching (AC) losses
equal the conduction (R

DS(ON)

) losses.

Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum battery volt-
age is applied, due to the squared term in the CV

switching-loss equation. Reconsider the high-side
MOSFET chosen for adequate R

DS(ON)

at low battery

voltages if it becomes extraordinarily hot when subject-
ed to V+

(MAX)

Calculating the power dissipation in N

(N1/N3) due to

switching losses is difficult since it must allow for quan-
tifying factors that influence the turn-on and turn-off
times. These factors include the internal gate resis-
tance, gate charge, threshold voltage, source induc-
tance, and PC board layout characteristics. The

following switching-loss calculation provides only a
very rough estimate and is no substitute for bench eval-
uation, preferably including verification using a thermo-
couple mounted on N

(N1/N3):

where C

RSS

is the reverse transfer capacitance of N

(N1/N3) and I

GATE

is the peak gate-drive source/sink

current.

For the synchronous rectifier, the worst-case power dis-
sipation always occurs at maximum battery voltage:

The absolute worst case for MOSFET power dissipation
occurs under heavy overloads that are greater than
I

LOAD(MAX)

but are not quite high enough to exceed

the current limit and cause the fault latch to trip. To
protect against this possibility, "overdesign" the circuit
to tolerate:

LOAD

= I

LIMIT(HIGH)

+ (LIR / 2 ) x I

LOAD(MAX)

where I

LIMIT(HIGH)

is the maximum valley current

allowed by the current-limit circuit, including threshold
tolerance and resistance variation.

Rectifier Selection

Current circulates from ground to the junction of both
MOSFETs and the inductor when the high-side switch is
off. As a consequence, the polarity of the switching
node is negative with respect to ground. This voltage is
approximately -0.7V (a diode drop) at both transition
edges while both switches are off (dead time). The drop
is I

x R

DS(ON)

when the low-side switch conducts.

The rectifier is a clamp across the synchronous rectifier
that catches the negative inductor swing during the dead
time between turning the high-side MOSFET off and the
synchronous rectifier on. The MOSFETs incorporate a
high-speed silicon body diode as an adequate clamp
diode if efficiency is not of primary importance. Place a
Schottky diode in parallel with the body diode to reduce
the forward voltage drop and prevent the N2/N4 MOSFET
body diodes from turning on during the dead time.
Typically, the external diode improves the efficiency by
1% to 2%. Use a Schottky diode with a DC current rating
equal to 1/3 of the load current. For example, use an
MBR0530 (500mA-rated) type for loads up to 1.5A, a

PD N

OUT

IN MAX

LOAD

DS ON

( )

(

)

(

)

PD N Switching

IN MAX

RSS SW LOAD

GATE

(

)

(

)

(

)

PD N

sis

OUT

IN MIN

LOAD

DS ON

(

tan

)

(

)

(

)

(

)

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

______________________________________________________________________________________

1N5819 type for loads up to 3A, or a 1N5822 type for
loads up to 10A. The rectifier's rated reverse breakdown
voltage must be at least equal to the maximum input volt-
age, preferably with a 20% derating factor.

Boost Supply Diode

A signal diode, such as a 1N4148, works well in most
applications. Use a small (20mA) Schottky diode for
slightly improved efficiency and dropout characteris-
tics, if the input voltage can go below 6V. Do not use
large power diodes, such as 1N5817 or 1N4001, since
high-junction capacitance can force LDO5 to excessive
voltages.

Applications Information

Dropout Performance

The output voltage-adjust range for continuous-conduc-
tion operation is restricted by the nonadjustable 350ns
(max) minimum off-time one-shot. Use the slower 5V
SMPS for the higher of the two output voltages for best
dropout performance in adjustable feedback mode. The
duty-factor limit must be calculated using worst-case val-
ues for on- and off-times, when working with low input
voltages. Manufacturing tolerances and internal propaga-
tion delays introduce an error to the t

K-factor. Also,

keep in mind that transient-response performance of
buck regulators operated close to dropout is poor, and
bulk output capacitance must often be added (see the
V

SAG

equation in the Output Capacitor Selection section).

The absolute point of dropout occurs when the inductor
current ramps down during the minimum off-time
(I

DOWN

) as much as it ramps up during the on-time

). The ratio h = I

DOWN

indicates the ability to

slew the inductor current higher in response to
increased load, and must always be greater than 1. As
h approaches 1, the absolute minimum dropout point,
the inductor current is less able to increase during each
switching cycle and V

SAG

greatly increases unless

additional output capacitance is used.

A reasonable minimum value for h is 1.5, but this can
be adjusted up or down to allow tradeoffs between
V

SAG

, output capacitance, and minimum operating

voltage. For a given value of h, the minimum operating
voltage can be calculated as:

where V

DROP1

and V

DROP2

are the parasitic voltage

drops in the discharge and charge paths (see the On-

Time One-Shot section), t

OFF(MIN)

is from the EC table,

and K is taken from Table 2. The absolute minimum
input voltage is calculated with h = 1.

Operating frequency must be reduced or h must be
increased and output capacitance added to obtain an
acceptable V

SAG

if calculated V+

(MIN)

is greater than

the required minimum input voltage. Calculate V

SAG

be sure of adequate transient response if operation
near dropout is anticipated.

Dropout Design Example

MAX8733: With V

OUT5

= 5V, fsw = 400kHz, K = 2.25µs,

OFF(MIN)

= 350ns, V

DROP1

= V

DROP2

= 100mV, and h = 1.5,

the minimum V+ is:

Calculating with h = 1 yields:

Therefore, V+ must be greater than 6.65V. A practical
input voltage with reasonable output capacitance
would be 7.5V.

MIN

(

)

µ ×

(

)

0 1

0 35

2 25

0 1

6 04

MIN

(

)

µ ×

(

)

0 1

0 35

1 5

2 25

0 1

6 65

MIN

OUT

DROP

OFF MIN

DROP

(

)

(

)

(

)

MAX8732
MAX8733
MAX8734

V+

12V
POSITIVE
SECONDARY
OUTPUT

5V
MAIN
OUTPUT

DL_

DH_

T1
10µH
1:2.2

T1 = TRANSPOWER TECHNOLOGIES TTI-5870

MAX1658/
MAX1659

LDO

Figure 12. Transformer-Coupled Secondary Output

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

______________________________________________________________________________________

Use of Coupled Inductors to Create

Auxiliary Outputs

A coupled inductor or transformer can be substituted for
the inductor in the 5V or 3.3V SMPS to create an auxiliary
output (Figure 12). The MAX8732/MAX8733/MAX8734 are
particularly well suited for such applications because they
can be configured in ultrasonic or forced-PWM mode to
ensure good load regulation when the main supplies are
lightly loaded. An additional postregulation circuit can be
used to improve load regulation and limit output current.

The power requirements of the auxiliary supply must be
considered in the design of the main output. The trans-
former must be designed to deliver the required current
in both the primary and the secondary outputs with the
proper turns ratio and inductance. The power ratings of
the synchronous-rectifier MOSFETs and the current limit
in the MAX8732/MAX8733/MAX8734 must also be
adjusted accordingly. Extremes of low input-output dif-
ferentials, widely different output loading levels, and high
turns ratios can further complicate the design due to par-
asitic transformer parameters such as interwinding
capacitance, secondary resistance, and leakage induc-
tance. Power from the main and secondary outputs is
combined to get an equivalent current referred to the
main output. Use this total current to determine the cur-
rent limit (see the Determining the Current Limit section):

where I

TOTAL

is the equivalent output current referred

to the main output and P

TOTAL

is the sum of the output

power from both the main output and the secondary
output:

where L

PRIMARY

is the primary inductance, N is the

transformer turns ratio, V

SEC

is the minimum-required

rectified secondary voltage, V

FWD

is the forward drop

across the secondary rectifier, V

OUT(MIN)

is the minimum

value of the main output voltage, and V

RECT

is the on-

state voltage drop across the synchronous rectifier
MOSFET. The transformer secondary return is often con-
nected to the main output voltage instead of ground in
order to reduce the necessary turns ratio. In this case,
subtract V

OUT

from the secondary voltage (V

SEC

OUT

) in the transformer turns-ratio equation above.

The secondary diode in coupled-inductor applications
must withstand flyback voltages greater than 60V, which

usually rules out most Schottky rectifiers. Common sili-
con rectifiers, such as the 1N4001, are also prohibited
because they are too slow. This often makes fast silicon
rectifiers such as the MURS120 the only choice. The fly-
back voltage across the rectifier is related to the V

OUT

difference, according to the transformer turns ratio:

FLYBACK

= V

SEC

+ (V

- V

OUT

)

where N is the transformer turns ratio (secondary wind-
ings/primary windings), V

SEC

is the maximum secondary

DC output voltage, and V

OUT

is the primary (main) out-

put voltage. If the secondary winding is returned to V

OUT

instead of ground, subtract V

OUT

from V

FLYBACK

in the

equation above. The diode's reverse breakdown voltage
rating must also accommodate any ringing due to leak-
age inductance. The diode's current rating should be at
least twice the DC load current on the secondary output.

The optional linear postregulator must be selected to
deliver the required load current from the transformer's
rectified DC output. The linear regulator should be con-
figured to run close to dropout to minimize power dissi-
pation and should have good output accuracy under
those conditions. Input and output capacitors are cho-
sen to meet line regulation, stability, and transient
requirements. There are a wide variety of linear regula-
tors appropriate for this application; consult the specific
linear-regulator data sheet for details.

Widely different output loads affect load regulation. In
particular, when the secondary output is left unloaded
while the main output is fully loaded, the secondary out-
put capacitor may become overcharged by the leakage
inductance, reaching voltages much higher than intend-
ed. In this case, a minimum load or overvoltage protec-
tion may be required on the secondary output to protect
any device connected to this output.

PC Board Layout Guidelines

Careful PC board layout is critical to achieve minimal
switching losses and clean, stable operation. This is
especially true when multiple converters are on the
same PC board where one circuit can affect the other.
The switching power stages require particular attention
(Figure 13). Refer to the MAX1999 Evaluation Kit data
sheet for a specific layout example.

Mount all of the power components on the top side of
the board with their ground terminals flush against one
another, if possible. Follow these guidelines for good
PC board layout:

· Isolate the power components on the top side from

the sensitive analog components on the bottom side
with a ground shield. Use a separate PGND plane
under the OUT3 and OUT5 sides (called PGND3 and

LIR

PRIMARY

OUT

IN MAX

OUT

IN MAX

TOTAL

SEC

FWD

OUT MIN

RECT

× ×

(

)

(

)

(

)

TOTAL

OUT

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers

______________________________________________________________________________________

PGND5). Avoid the introduction of AC currents into
the PGND3 and PGND5 ground planes. Run the
power plane ground currents on the top side only, if
possible.

· Use a star ground connection on the power plane to

minimize the crosstalk between OUT3 and OUT5.

· Keep the high-current paths short, especially at the

ground terminals. This practice is essential for sta-
ble, jitter-free operation.

· Keep the power traces and load connections short.

This practice is essential for high efficiency. Using
thick copper PC boards (2oz vs. 1oz) can enhance
full-load efficiency by 1% or more. Correctly routing
PC board traces must be approached in terms of
fractions of centimeters, where a single milliohm of
excess trace resistance causes a measurable effi-
ciency penalty.

· CS_ (MAX8732/MAX8733)/LX_ (MAX8734) and GND

connections to the synchronous rectifiers for current
limiting must be made using Kelvin-sense connec-
tions to guarantee the current-limit accuracy. With 8-
pin SO MOSFETs, this is best done by routing power
to the MOSFETs from outside using the top copper
layer, while connecting CS_/LX_ traces inside (under-
neath) the MOSFETs.

· When trade-offs in trace lengths must be made, it is

preferable to allow the inductor charging path to be
made longer than the discharge path. For example, it
is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to

allow distance between the inductor and the syn-
chronous rectifier or between the inductor and the
output filter capacitor.

· Ensure that the OUT_ connection to C

OUT_

is short and

direct. However, in some cases it may be desirable to
deliberately introduce some trace length between the
OUT_ connector node and the output filter capacitor
(see the Stability Considerations section).

· Route high-speed switching nodes (BST_, DH_, LX_,

and DL_) away from sensitive analog areas (REF,
ILIM_, and FB_). Use PGND3 and PGND5 as an EMI
shield to keep radiated switching noise away from the
IC's feedback divider and analog bypass capacitors.

· Make all pin-strap control input connections (SKIP,

ILIM_, etc.) to GND or V

of the device.

Layout Procedure

1) Place the power components first with ground ter-

minals adjacent (N2/N4 source, C

IN_

, C

OUT_

, D1

anode). If possible, make all these connections on
the top layer with wide, copper-filled areas.

2) Mount the controller IC adjacent to the synchronous-

rectifier MOSFETs, preferably on the back side in
order to keep DH_, GND, and the DL_ gate drive
lines short and wide. The DL_ gate trace must be
short and wide, measuring 50mils to 100mils wide if
the MOSFET is 1in from the controller device.

3) Group the gate-drive components (BST_ diode and

capacitor, V+ bypass capacitor) together near the
controller device.

AGND

PGND

VIA TO OUT5

GROUND

OUT3

OUT5

VIA TO OUT3

VIA TO PGND

VIA TO LX5

V+

VIA TO LX3

USE AGND PLANE TO:
- BYPASS V

AND REF

- TERMINATE EXTERNAL FB
DIVIDER (IF USED)
- TERMINATE R

ILIM

(IF USED)
- PIN-STRAP CONTROL
INPUTS

USE PGND PLANE TO:
- BYPASS LDO_
- CONNECT PGND TO THE TOPSIDE STAR GROUND

VIAS TO GROUND

NOTE: EXAMPLE SHOWN IS FOR DUAL N-CHANNEL MOSFET.

ANALOG GROUND
PLANE ON INNER LAYER

CONNECT PGND TO AGND
BENEATH THE CONTROLLER AT
ONE POINT ONLY AS SHOWN.

VIA BETWEEN POWER

AND ANALOG GROUND

Figure 13. PC Board Layout Example

MAX8732/MAX8733/MAX8734

High-Efficiency, Quad-Output, Main Power-

Supply Controllers for Notebook Computers

______________________________________________________________________________________

4) Make the DC-DC controller ground connections as

follows: near the device, create a small analog
ground plane. Connect the small analog ground
plane to GND (Figure 13) and use the plane for the
ground connection for the REF and V

bypass

capacitors, FB dividers, and ILIM resistors (if any).
Create another small ground island for PGND, and
use the plane for the V+ bypass capacitor, placed
very close to the device. Connect the AGND and
PGND planes together at the GND pin of the device.

5) On the board's top side (power planes), make a

star ground to minimize crosstalk between the two
sides. The top-side star ground is a star connection
of the input capacitors and synchronous rectifiers.
Keep the resistance low between the star ground
and the source of the synchronous rectifiers for
accurate current limit. Connect the top-side star
ground (used for MOSFET, input, and output
capacitors) to the small island with a single short,
wide connection (preferably just a via).

Create PGND islands on the layer just below the
top-side layer (refer to the MAX1999 EV kit for an
example) to act as an EMI shield if multiple layers
are available (highly recommended). Connect each
of these individually to the star ground via, which
connects the top side to the PGND plane. Add one
more solid ground plane under the device to act as
an additional shield, and also connect the solid
ground plane to the star ground via.

6) Connect the output power planes (V

CORE

and system

ground planes) directly to the output filter capacitor
positive and negative terminals with multiple vias.

BST3

LX3

DH3

LDO3

DL3

GND

LX5

OUT3

OUT5

V+

DL5

LDO5

DH5

BST5

CS5

ILIM5

FB5

REF

FB3

ILIM3

ON5

ON3

PGOOD

CS3

QSOP

TOP VIEW

MAX8732
MAX8733

SHDN

PRO

SKIP

Pin Configurations (continued)

Chip Information

TRANSISTOR COUNT: 8335

PROCESS: BiCMOS

Part Number MAX8732