General Description
The DS2030 is a 256kb reflowable nonvolatile (NV)
SRAM, which consists of a static RAM (SRAM), an NV
controller, and an internal rechargeable manganese lithi-
um (ML) battery. These components are encased in a
surface-mount module with a 256-ball BGA footprint.
Whenever V
CC
is applied to the module, it recharges the
ML battery, powers the SRAM from the external power
source, and allows the contents of the SRAM to be modi-
fied. When V
CC
is powered down or out of tolerance, the
controller write-protects the SRAM's contents and pow-
ers the SRAM from the battery. Two versions of the
DS2030 are available, which provide either a 5% or 10%
power-monitoring trip point. The DS2030 also contains a
power-supply monitor output, RST, which can be used
as a CPU supervisor for a microprocessor.
Applications
RAID Systems and Servers
POS Terminals
Industrial Controllers
Data-Acquisition Systems
Gaming
Fire Alarms
Router/Switches
PLC
Features
Single-Piece, Reflowable, 27mm
2
PBGA Package
Footprint
Internal ML Battery and Charger
Unconditionally Write-Protects SRAM when V
CC
is Out-of-Tolerance
Automatically Switches to Battery Supply when
V
CC
Power Failures Occur
Internal Power-Supply Monitor Detects Power Fail
at 5% or 10% Below Nominal V
CC
(5V)
Reset Output can be used as a CPU Supervisor
for a Microprocessor
Industrial Temperature Range (-40°C to +85°C)
UL Recognized
DS2030Y/AB
DS2030Y/AB Single-Piece 256kb
Nonvolatile SRAM
______________________________________________ Maxim Integrated Products
1
Rev 2; 1/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Ordering Information
Pin Configuration appears at end of data sheet.
PART
TEMP RANGE
PIN-PACKAGE
SPEED (ns)
SUPPLY TOLERANCE (%)
DS2030AB-70
-40°C to +85°C
256 Ball 27mm
2
BGA Module
70
5
DS2030AB-100
-40°C to +85°C
256 Ball 27mm
2
BGA Module
100
5
DS2030Y-70
-40°C to +85°C
256 Ball 27mm
2
BGA Module
70
10
DS2030Y-100
-40°C to +85°C
256 Ball 27mm
2
BGA Module
100
10
Typical Operating Circuit
FROM EXTERNAL DECODE LOGIC
P3.6
P3.7
PSEN
P0.07
ALE
P2.06
P1.5
RST
A814
A07
DQ07
OE
WE
CE
7 BITS
8 BITS
8 BITS
SN74AC573
LATCH
D07
LE
Q07
AND
(WR)
(RD)
(INT3)
8051
MICROPROCESSOR
DS2030
32k x 8
NV SRAM
DS2030Y/AB
DS2030Y/AB Single-Piece 256kb
Nonvolatile SRAM
2
_____________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
(T
A
= -40
°C to +85°C)
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage on Any Pin Relative to Ground .................-0.3V to +6.0V
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range ...............................-40°C to +85°C
Soldering Temperature...................See IPC/JEDEC J-STD-020C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DS2030AB
4.75
5.25
Supply Voltage
V
CC
DS2030Y
4.50
5.50
V
Input Logic 1
V
IH
2.2
V
CC
V
Input Logic 0
V
IL
0
0.8
V
CAPACITANCE
(T
A
= +25
°C)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Capacitance
C
IN
Not tested
7
pF
Input/Output Capacitance
C
OUT
Not tested
7
pF
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 5V ±5% for DS2030AB, V
CC
= 5V ±10% for DS2030Y, T
A
= -40
°C to +85°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Leakage Current
I
IL
-1.0
+1.0
µA
I/O Leakage Current
I
IO
CE = V
CC
-1.0
+1.0
µA
Output-Current High
I
OH
At 2.4V
-1.0
mA
Output-Current Low
I
OL
At 0.4V
2.0
mA
Output-Current Low RST
I
OL
RST
At 0.4V (Note 1)
10.0
mA
I
CCS1
CE = 2.2V
0.5
7
Standby Current
I
CCS2
CE = V
CC
- 0.5V
0.2
5
mA
Operating Current
I
CCO1
t
RC
= 200ns, outputs open
85
mA
DS2030AB
4.50
4.62
4.75
Write Protection Voltage
V
TP
DS2030Y
4.25
4.37
4.50
V
DS2030Y/AB
DS2030Y/AB Single-Piece 256kb
Nonvolatile SRAM
_____________________________________________________________________
3
POWER-DOWN/POWER-UP TIMING
(T
A
= -40
°C to +85°C)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
CC
Fail Detect to CE and WE Inactive
t
PD
(Note 7)
1.5
µs
V
CC
Slew from V
TP
to 0V
t
F
150
µs
V
CC
Slew from 0V to V
TP
t
R
150
µs
V
CC
Valid to CE and WE Inactive
t
PU
2
ms
V
CC
Valid to End of Write Protection
t
REC
125
ms
V
CC
Fail Detect to RST Active
t
RPD
(Note 1)
3.0
µs
V
CC
Valid to RST Inactive
t
RPU
(Note 1)
225
350
525
ms
DATA RETENTION
(T
A
= +25
°C)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Expected Data-Retention Time (Per Charge)
t
DR
(Note 8)
2
3
years
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 5V ±5% for DS2030AB, V
CC
= 5V ±10% for DS2030Y, T
A
= -40
°C to +85°C.)
DS2030AB-70
DS2030Y-70
DS2030AB-100
DS2030Y-100
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
MIN
MAX
UNITS
Read Cycle Time
t
RC
70
100
ns
Access Time
t
ACC
70
100
ns
OE to Output Valid
t
OE
35
50
ns
CE to Output Valid
t
CO
70
100
ns
OE or CE to Output Active
t
COE
(Note 2)
5
5
ns
Output High Impedance from
Deselection
t
OD
(Note 2)
25
35
ns
Output Hold from Address Change
t
OH
5
5
ns
Write Cycle Time
t
WC
70
100
ns
Write Pulse Width
t
WP
(Note 3)
55
75
ns
Address Setup Time
t
AW
0
0
ns
t
WR1
(Note 4)
5
5
Write Recovery Time
t
WR2
(Note 5)
15
15
ns
Output High Impedance from WE
t
ODW
(Note 2)
25
35
ns
Output Active from WE
t
OEW
(Note 2)
5
5
ns
Data Setup Time
t
DS
(Note 6)
30
40
ns
t
DH1
(Note 4)
0
0
Data Hold Time
t
DH2
(Note 5)
10
10
ns
DS2030Y/AB
DS2030Y/AB Single-Piece 256kb
Nonvolatile SRAM
_____________________________________________________________________
5
Write Cycle 1
DATA IN STABLE
ADDRESSES
CE
WE
D
OUT
D
IN
t
WC
V
IH
V
IH
V
IH
V
IH
V
IL
V
IL
V
IL
HIGH
IMPEDANCE
V
IH
V
IH
V
IL
V
IL
V
IH
V
IL
V
IL
V
IL
V
IL
t
AW
t
WP
t
OEW
t
DH1
t
DS
t
ODW
t
WR1
(SEE NOTES 2, 3, 4, 6, 1013.)
Write Cycle 2
t
WC
t
AW
t
DH2
t
DS
t
COE
t
ODW
t
WP
t
WR2
V
IH
V
IL
V
IH
ADDRESSES
CE
WE
D
OUT
D
IN
V
IL
V
IH
V
IL
V
IH
V
IL
V
IL
V
IL
V
IL
V
IH
V
IH
V
IL
V
IH
DATA IN STABLE
V
IL
V
IH
V
IL
(SEE NOTES 2, 3, 5, 6, 1013.)
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