1
LTC1291
The LTC1291 is a data acquisition system that contains a
serial I/O successive approximation A/D converter. It uses
LTCMOS
TM
switched capacitor technology to perform a
12-bit unipolar A/D conversion. The input multiplexer can
be configured for either single-ended or differential in-
puts. An on-chip sample-and-hold is included on the "+"
input. When the LTC1291 is idle, it can be powered down
in applications where low power consumption is desired.
An external reference is not required because the LTC1291
takes its reference from the power supply (V
CC
). All these
features are packaged in an 8-pin DIP.
The serial I/O is designed to communicate without external
hardware to most MPU serial ports and all MPU parallel
I/O ports allowing data to be transmitted over three or four
wires. Given the accuracy, ease of use and small package
size, this device is well suited for digitizing analog signals
in remote applications where minimum number of inter-
connects, small physical size, and low power consump-
tion are important.
LTCMOS
TM
is a trademark of Linear Technology Corporation
Single Chip 12-Bit
Data Acquisition System
S
FEATURE
D
U
ESCRIPTIO
s
Built-In Sample-and-Hold
s
Single Supply 5V Operation
s
Power Shutdown
s
Direct 3- or 4-Wire Interface to Most MPU Serial
Ports and All MPU Parallel Ports
s
Two-Channel Analog Multiplexer
s
Analog Inputs Common Mode to Supply Rails
s
8-Pin DIP Package
s
Resolution: 12 Bits
s
Fast Conversion Time: 12
µ
s Max Over Temp.
s
Low Supply Current:
6.0mA (Typ) Active Mode
10
µ
A (Max) Shutdown Mode
KEY SPECIFICATIO S
U
+5V
CH0
GND
D
IN
D
OUT
CLK
V
CC
(V
REF
)
CS
LTC1291
2-CHANNEL
MUX*
CH1
+
0.1µF
22µF
TANTALUM
*FOR OVERVOLTAGE PROTECTION LIMIT THE INPUT CURRENT TO 15mA
PER PIN OR CLAMP THE INPUTS TO V
CC
AND GND WITH 1N4148 DIODES.
CONVERSION RESULTS ARE NOT VALID WHEN THE SELECTED CHANNEL OR
THE OTHER CHANNEL IS OVERVOLTAGED (V
IN
< GND OR V
IN
> V
CC
). SEE
SECTION ON OVERVOLTAGE PROTECTION IN THE APPLICATIONS INFORMATION.
1291 TA01
DO
MC68HC11
SCK
MISO
MOSI
2-Channel 12-Bit Data Acquisition System
U
A
O
PPLICATI
TYPICAL
CODE
0
0.5
DELTA (LSB)
0.4
0.2
0.1
0
0.5
0.2
1024
2048 2560
1291 TA02
0.3
0.3
0.4
0.1
512
1536
3072 3584 4096
Channel-to-Channel
INL Matching
2
LTC1291
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Offset Error
(Note 4)
q
±
3.0
±
3.0
±
3.0
LSB
Linearity Error (INL)
(Note 4 & 5)
q
±
0.5
±
0.5
±
0.75
LSB
Gain Error
(Note 4)
q
±
1.0
±
2.0
±
4.0
LSB
Minimum Resolution for which No
q
12
12
12
Bits
Missing Codes are Guaranteed
Analog Input Range
(Note 7)
V
On Channel Leakage Current
On Channel = 5V
q
±
1
±
1
±
1
µ
A
(Note 8)
Off Channel = 0V
On Channel = 0V
q
±
1
±
1
±
1
µ
A
Off Channel = 5V
Off Channel Lekage Current
On Channel = 5V
q
±
1
±
1
±
1
µ
A
(Note 8)
Off Channel = 0V
On Channel = 0V
q
±
1
±
1
±
1
µ
A
Off Channel = 5V
W
U
U
PACKAGE/ORDER I FOR ATIO
A
U
G
W
A
W
U
W
A
R
BSOLUTE
XI
TI
S
LTC1291BMJ8
LTC1291CMJ8
LTC1291DMJ8
LTC1291BIJ8
LTC1291CIJ8
LTC1291DIJ8
LTC1291BIN8
LTC1291CIN8
LTC1291DIN8
LTC1291BCN8
LTC1291CCN8
LTC1291DCN8
ORDER PART
NUMBER
1
2
3
4
5
6
7
8
TOP VIEW
CLK
V
CC
(V
REF
)
CH0
D
OUT
CH1
GND
N8 PACKAGE
8-LEAD PLASTIC DIP
CS
J8 PACKAGE
8-LEAD CERAMIC DIP
D
IN
(Notes 1 and 2)
Supply Voltage (V
CC
) to GND .................................. 12V
Voltage
Analog Inputs ............................ 0.3V to V
CC
+ 0.3V
Digital Inputs ........................................ 0.3V to 12V
Digital Outputs .......................... 0.3V to V
CC
+ 0.3V
Power Dissipation ............................................. 500mW
Operating Temperature Range
LTC1291BC, LTC1291CC,
LTC1291DC ............................................ 0
°
C to 70
°
C
LTC1291BI, LTC1291CI,
LTC1291DI ........................................ 40
°
C to 85
°
C
LTC1291BM, LTC1291CM,
LTC1291DM ................................... 55
°
C to 125
°
C
Storage Temperature Range ................ 65
°
C to 150
°
C
Lead Temperature (Soldering, 10 sec.)................ 300
°
C
CO VERTER A D ULTIPLEXER CHARACTERISTICS
U
U W
(Note 3)
LTC1291C
LTC1291D
LTC1291B
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
f
CLK
Clock Frequency
V
CC
= 5V (Note 6)
(Note 9)
1.0
MHz
t
SMPL
Analog Input Sample Time
See Operating Sequence
2.5
CLK Cycles
t
CONV
Conversion Time
See Operating Sequence
12
CLK Cycles
t
CYC
Total Cycle Time
See Operating Sequence (Note 6)
18 CLK
Cycles
+ 500ns
t
dDO
Delay Time, CLK
to D
OUT
Data Valid
See Test Circuits
q
160
300
ns
AC CHARACTERISTICS
(Note 3)
LTC1291B/LTC1291C/LTC1291D
0.05V to V
CC
+ 0.05V
3
LTC1291
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t
dis
Delay Time, CS
to D
OUT
Hi-Z
See Test Circuits
q
80
150
ns
t
en
Delay Time, CLK
to D
OUT
Enabled
See Test Circuits
q
80
200
ns
t
hDI
Hold Time, D
IN
after CLK
V
CC
= 5V (Note 6)
50
ns
t
hDO
Time Output Data Remains Valid after CLK
130
ns
t
WHCLK
CLK High Time
V
CC
= 5V (Note 6)
300
ns
t
WLCLK
CLK Low Time
V
CC
= 5V (Note 6)
400
ns
t
f
D
OUT
Fall Time
See Test Circuits
q
65
130
ns
t
r
D
OUT
Rise Time
See Test Circuits
q
25
50
ns
t
suDI
Setup Time, D
IN
Stable before CLK
V
CC
= 5V (Note 6)
50
ns
t
suCS
Setup Time, CS
before CLK
V
CC
= 5V (Note 6)
50
ns
t
WHCS
CS High Time During Conversion
V
CC
= 5V (Note 6)
500
ns
t
WLCS
CS Low Time During Data Transfer
V
CC
= 5V (Note 6)
18
CLK Cycles
C
IN
Input Capacitance
Analog Inputs On Channel
100
pF
Analog Inputs Off Channel
5
pF
Digital Inputs
5
pF
AC CHARACTERISTICS
(Note 3)
Note 7: Two on-chip diodes are tied to each analog input which will
conduct for analog voltages one diode drop below GND or one diode drop
above V
CC
. Be careful during testing at low V
CC
levels (4.5V), as high level
analog inputs (5V) can cause this input diode to conduct, especially at
elevated temperature, and cause errors for inputs near full scale. This spec
allows 50mV forward bias of either diode. This means that as long as the
analog input does not exceed the supply voltage by more than 50mV, the
output code will be correct.
Note 8: Channel leakage current is measured after the channel selection.
Note 9: Increased leakage currents at elevated temperatures cause the
S/H to droop, therefore it is recommended that f
CLK
125kHz at 125
°
C,
f
CLK
30kHz at 85
°
C and f
CLK
3kHz at 25
°
C.
The
q
denotes specifications which apply over the operating temperature
range; all other limits and typicals T
A
= 25
°
C.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground (unless otherwise
noted).
Note 3: V
CC
= 5V, CLK = 1.0MHz unless otherwise specified.
Note 4: One LSB is equal to V
CC
divided by 4096. For example, when V
CC
=
5V, 1LSB = 5V/4096 = 1.22mV.
Note 5: Linearity error is specified between the actual end points of the
A/D transfer curve. The deviation is measured from the center of the
quantization band.
Note 6: Recommended operating conditions.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
IH
High Level Input Voltage
V
CC
= 5.25V
q
2.0
V
V
IL
Low Level Input Voltage
V
CC
= 4.75V
q
0.8
V
I
IH
High Level Input Current
V
IN
= V
CC
q
2.5
µ
A
I
IL
Low Level Input Current
V
IN
= 0V
q
2.5
µ
A
V
OH
High Level Output Voltage
V
CC
= 4.75V, I
OUT
= 10
µ
A
4.7
V
V
CC
= 4.75V, I
OUT
= 360
µ
A
q
2.4
4.0
V
V
OL
Low Level Output Voltage
V
CC
= 4.75V, I
OUT
= 1.6mA
q
0.4
V
I
OZ
High Z Output Leakage
V
OUT
= V
CC
, CS High
q
3
µ
A
V
OUT
= 0V, CS High
q
3
µ
A
I
SOURCE
Output Source Current
V
OUT
= 0V
20
mA
I
SINK
Output Sink Current
V
OUT
= V
CC
20
mA
I
CC
Positive Supply Current
CS High
q
6
12
mA
LTC1291BC, LTC1291CC, LTC1291DC
q
5
10
µ
A
LTC1291BI, LTC1291CI, LTC1291DI,
q
5
15
µ
A
LTC1291BM, LTC1291CM, LTC1291DM
LTC1291B/LTC1291C/LTC1291D
(Note 3)
ELECTRICAL C
C
HARA TER STICS
DIGITAL A D
U
I
DC
LTC1291B/LTC1291C/LTC1291D
CS High
Power shutdown
CLK Off
4
LTC1291
Supply Current vs Supply Voltage
Supply Current vs Temperature
C
C
HARA TERISTICS
U
W
A
TYPICAL PERFOR
CE
Change in Gain vs Temperature
Change in Offset vs Supply
Voltage
SUPPLY VOLTAGE (V)
4
SUPPLY CURRENT (mA)
4
6
6
1291 G01
2
0
5
10
8
CLK = 1MHz
T
A
= 25°C
AMBIENT TEMPERATURE (°C)
50
SUPPLY CURRENT (mA)
7
8
9
30
70
1291 G02
6
5
30 10
50
90 110
4
3
10
10
130
CLK = 1MHz
V
CC
= 5V
Change in Linearity vs Supply
Voltage
Change in Gain Error vs Supply
Voltage
Change in Offset vs Temperature
Change in Linearity vs
Temperature
AMBIENT TEMPERATURE (°C)
50
0
MAGNITUDE OF LINEARITY CHANGE (LSB)
0.2
0.5
0
50
75
1291 G07
0.1
0.4
0.3
25
25
100
125
V
CC
= 5V
CLK = 1MHz
AMBIENT TEMPERATURE (°C)
50
0
MAGNITUDE OF GAIN CHANGE (LSB)
0.2
0.5
0
50
75
1291 G08
0.1
0.4
0.3
25
25
100
125
V
CC
= 5V
CLK = 1MHz
Minimum Clock Rate for
0.1 LSB Error
AMBIENT TEMPERATURE (°C)
50
MINIMUM CLK FREQUENCY* (MHz)
0.15
0.20
0.25
50
1291 G09
0.10
0.05
25
0
25
75
125
100
V
CC
= 5V
* AS THE CLK FREQUENCY IS DECREASED FROM 1MHz, MINIMUM CLK FREQUENCY (
ERROR
0.1LSB) REPRESENTS THE
FREQUENCY AT WHICH A 0.1LSB SHIFT IN ANY CODE TRANSITION FROM ITS 1MHz VALUE IS FIRST DETECTED.
SUPPLY VOLTAGE (V)
4.0
CHANGE IN LINEARITY (LSB = 1/4096
×
V
CC
(V
REF
))
0.1
0.3
0.4
6.0
1291 G04
4.5
5.0
5.5
0.2
0.5
0
SUPPLY VOLTAGE (V)
4.0
CHANGE IN GAIN ERROR (LSB = 1/4096
×
V
CC
(V
REF
))
0.1
0.3
0.4
6.0
1291 G05
0.1
0.3
0.5
4.5
5.0
5.5
0.2
0.5
0
0.2
0.4
SUPPLY VOLTAGE (V)
4.0
CHANGE IN OFFSET (LSB = 1/4096
×
V
CC
(V
REF
))
0.1
0.3
0.4
6.0
1291 G03
0.1
0.3
0.5
4.5
5.0
5.5
0.2
0.5
0
0.2
0.4
AMBIENT TEMPERATURE (°C)
50
0
MAGNITUDE OF OFFSET CHANGE (LSB)
0.2
0.5
0
50
75
1291 G06
0.1
0.4
0.3
25
25
100
125
V
CC
= 5V
CLK = 1MHz
5
LTC1291
C
C
HARA TERISTICS
U
W
A
TYPICAL PERFOR
CE
D
OUT
Delay Time vs Temperature
Maximum Clock Rate vs Source
Resistance
Maximum Filter Resistor vs
Cycle Time
CYCLE TIME (µs)
10
MAXIMUM R
FILTER
** (
)
100
1k
10k
10
1k
10k
1291 G12
1
100
+
+V
IN
C
FILTER
1µF
R
FILTER
100
0.2
MAXIMUM CLK FREQUENCY* (MHz)
0.4
0.6
0.8
1.0
1k
10k
100k
1291 G11
0
V
CC
= 5V
CLK = 1MHz
R
SOURCE
(
)
+
+IN
IN
+V
IN
R
SOURCE
AMBIENT TEMPERATURE (°C)
50
0
INPUT CHANNEL LEAKAGE CURRENT (nA)
100
300
400
500
1000
700
10
30
50
130
1291 G14
200
800
900
600
30
10
70
90 110
ON CHANNEL
OFF CHANNEL
GUARANTEED
Input Channel Leakage Current
vs Temperature
Sample-and-Hold Acquisition
Time vs Source Resistance
* MAXIMUM CLK FREQUENCY REPRESENTS THE CLK
FREQUENCY AT WHICH A 0.1LSB SHIFT IN THE
ERROR AT ANY CODE TRANSITION FROM ITS 1MHz
VALUE IS FIRST DETECTED.
**MAXIMUM R
FILTER
REPRESENTS THE FILTER RESISTOR
VALUE AT WHICH A 0.1LSB CHANGE IN FULL SCALE
ERROR FROM ITS VALUE AT R
FILTER
= 0
IS FIRST
DETECTED.
PI FU CTIO S
U
U
U
#
PIN
FUNCTION
DESCRIPTION
1
CS
Chip Select Input
A logic low on this input enables the LTC1291.
2, 3
CH0, CH1
Analog Inputs
These inputs must be free of noise with respect to GND.
4
GND
Analog Ground
GND should be tied directly to an analog ground plane.
5
D
IN
Digital Data Input
The multiplexer address is shifted into this input.
6
D
OUT
Digital Data Output
The A/D conversion result is shifted out of this output.
7
CLK
Shift Clock
This clock synchronizes the serial data transfer.
8
V
CC
(V
REF
)
Positive Supply and
This pin provides power and defines the span of the A/D converter. This supply must be kept free of noise and
Reference Voltage
ripple by bypassing directly to the analog ground plane.
AMBIENT TEMPERATURE (°C)
50
D
OUT
DELAY TIME FROM CLK
(ns)
150
200
250
50
1291 G10
100
0
25
0
25
75
125
100
V
CC
= 5V
50
MSB-FIRST DATA
LSB-FIRST DATA
R
SOURCE
+ (
)
100
1
S/H AQUISITION TIME TO 0.02% (µs)
10
100
1k
10k
1291 G13
+
V
IN
R
SOURCE
+
V
CC
= 5V
T
A
= 25°C
0V TO 5V INPUT STEP
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