LT1508

Power Factor and PWM

Controller (Voltage Mode)

, LTC and LT are registered trademarks of Linear Technology Corporation.

PFC and PWM Single Chip Solution

Synchronized Operation up to 300kHz

99% Power Factor Over 20:1 Load Current Range

Voltage Mode PWM

Instantaneous Overvoltage Protection

Dedicated Overvoltage Protection (OVP Pin)

Minimal Line Current Dead Zone

Typical 250

A Start-Up Supply Current

Line Switching Noise Filter

Low Quiescent Current: 13mA

Fast 1.5A Peak Current Gate Drivers

Separate Soft Start Control

FEATURES

DESCRIPTIO

APPLICATIO

Universal Power Factor Corrected Power Supplies
and Preregulators

The LT

1508 is a complete solution for universal off-line

switching power supplies utilizing active power factor
correction. The PFC section is identical to the LT1248 PFC
controller except the EN/SYNC pin is removed because
PFC and PWM are synchronized internally.

The voltage mode PWM section (LT1509 is the current
mode counterpart) contains all the primary side functions
to convert the PFC preregulated high voltage output to an
isolated low voltage output. The PWM duty cycle is
internally limited to 47% (maximum 50%) to prevent
transformer saturation. PWM soft start begins when the
PFC output reaches the preset voltage. In the event of brief
line loss, PWM will be shut off when the PFC output
voltage drops below 73% of the preset value.

200

1508 BD

SENSE

7.5V

7.9V

16V TO 10V

7V TO
4.7V

2.2V

25k

OUT

REF

7.5V
V

REF

OUT

SENSE

OUT

SET

LIM

RUN

OSC

55%

DELAY

200ns

BLANKING

LIM

GND1

GTDR1

16V

GND2

GTDR2

OVP

SS1

SS2

PWMOK

0.7V

NOTE: PWM PULSE IS DELAYED BY 55% DUTY CYCLE
AFTER PFC PULSE

BLOCK DIAGRA

LT1508

By using fixed high frequency PWM current averaging
without the need for slope compensation, the LT1508
achieves far lower line current distortion with a smaller
magnetic element than systems that use either peak
current detection, or zero current switching approach, in
both continuous and discontinuous modes of operation.
The LT1508 also provides filtering capability to reject line

DESCRIPTIO

switching noise which can cause instability when fed into
the multiplier. Line current dead zone is minimized with
low bias voltage at the current input to the multiplier. The
LT1508 provides many protection features including peak
current limiting and overvoltage protection. Implemented
with a very high speed process, the LT1508 can be
operated at frequencies as high as 300kHz.

ABSOLUTE

AXI

RATINGS

Supply Voltage ........................................................ 27V
GTDR Current Continuous ...................................... 0.5A
GTDR Output Energy ................................................ 5

, R

SET

, PK

LIM

Input Current .............................. 20mA

SENSE

, OVP Input Voltage .................................... V

MAX

LIM

, V

Input Voltage ................................................ 8V

SENSE

, M

OUT

Input Current ...................................

5mA

Operating Junction Temperature Range

LT1508C ................................................ 0

C to 100

LT1508I ............................................ 40

C to 125

Thermal Resistance (Junction-to-Ambient)

N Package ................................................... 100

C/W

SW Package ................................................ 120

C/W

PACKAGE/ORDER I

FOR

ATIO

Consult factory for Military grade parts.

TOP VIEW

SW PACKAGE

20-LEAD PLASTIC SO WIDE

N PACKAGE

20-LEAD PDIP

GTDR1

GND2

GND1

SET

LIM

OUT

SENSE

OUT

GTDR2

LIM

SS1

SET

SENSE

SS2

REF

OVP

JMAX

= 125

= 100

C/ W (N)

JMAX

= 125

= 120

C/ W (SW)

ORDER PART

NUMBER

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Overall

Supply Current (V

in Undervoltage Lockout)

= Lockout Voltage 0.2V

0.25

0.45

Supply Current On

11.5V

MAX

Turn-On Threshold (Undervoltage Lockout)

15.5

16.5

17.5

Turn-Off Threshold

9.5

10.5

11.5

Voltage Amplifier (PFC Section)

Voltage Amp Offset

OUT

= 3.5V

Input Bias Current

SENSE

= 0V to 7V

250

Voltage Gain

100

Voltage Amp Unity-Gain Bandwidth

MHz

Voltage Amp Output High (Internally Clamped)

11.3

13.3

Voltage Amp Output Low

1.1

Voltage Amp Short-Circuit Current

OUT

= 0V

ELECTRICAL CHARACTERISTICS

Maximum operating voltage (V

MAX

) = 25V, V

= 18V, R

SET

= 15k to GND, C

SET

= 1nF to GND, I

= 100

A, I

SENSE

= 0V, CA

OUT

= 3.5V,

OUT

= 5V, OVP = V

REF

. No load on any outputs unless otherwise noted.

LT1508CN
LT1508CSW
LT1508IN
LT1508ISW

LT1508

ELECTRICAL C

HARA TERISTICS

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Current Amplifier (PFC Section)

Current Amp Offset Voltage

SENSE

Bias Current

250

Current Amp Voltage Gain

110

Current Amp Unity-Gain Bandwidth

MHz

Current Amp Output High

7.2

8.5

Current Amp Output Low

1.1

Current Amp Short-Circuit Current

OUT

= 0V

Input Range, I

SENSE

, M

OUT

(Linear Operation)

0.3

Reference

Reference Output Voltage

REF

= 0mA, T

= 25

7.39

7.50

7.60

REF

Load Regulation

5mA < I

REF

< 0mA

REF

Line Regulation

11.5V < V

< V

MAX

REF

Short-Circuit Current

REF

= 0V

REF

Worst Case

Load, Line, Temperature

7.32

7.5

7.68

Current Limit

LIM

Offset Voltage

LIM

Input Current

LIM

= 0.1V

100

LIM

to GTDR Propagation Delay

LIM

Falling from 50mV to 50mV

400

Multiplier

Multiplier Output Current

= 100

A, R

SET

= 15k

Multiplier Output Current Offset

= 1M from I

to GND

0.05

0.5

Multiplier Maximum Output Current

= 450

A, R

SET

= 15k, VA

OUT

= 7V, M

OUT

= 0V

286

260

235

Multiplier Gain Constant (Note 1)

0.035

Input Resistance

from 50

A to 1mA

Oscillator

Oscillator Frequency

SET

= 15k, C

SET

= 1000pF

100

115

kHz

SET

= 15k, C

SET

= 1500pF

kHz

SET

Ramp Peak-to-Peak Amplitude

4.35

4.7

5.0

SET

Ramp Valley Voltage

1.15

1.3

1.55

Overvoltage Comparator (PFC Section)

Comparator Trip Voltage Ratio (V

TRIP

/ V

REF

)

1.04

1.05

1.06

Hysteresis

0.35

OVP Bias Current

OVP = 7.5V

0.2

OVP Propagation Delay

100

Gate Drivers (GTDR1 and GTDR2)

Max Output Voltage

0mA Load, 18V < V

17.5

Output High

200mA Load, 11.5V

15V

3.0

Output Low (Device Unpowered)

= 0V, 50mA Load (Sinking)

0.9

1.5

Output Low (Device Active)

200mA Load (Sinking)

0.5

10mA Load

0.2

0.4

Peak Output Current

10nF from GTDR to GND

Rise and Fall Time

1nF from GTDR to GND

Max Duty Cycle (PFC)

Max Duty Cycle (PWM) (Note 2)

Maximum operating voltage (V

MAX

) = 25V, V

= 18V, R

SET

= 15k to GND, C

SET

= 1nF to GND, I

= 100

A, I

SENSE

= 0V, CA

OUT

= 3.5V,

OUT

= 5V, OVP = V

REF

. No load on any outputs unless otherwise noted.

LT1508

(VA

OUT

The

denotes specifications which apply over the full operating

temperature range.

Note 1: Multiplier Gain Constant: K =

Note 2: GTDR2 (PWM) pulse is delayed by 53% duty cycle after GTDR1
(PFC) is set. See PFC/PWM Synchronization graph in the Typical
Performance Characteristics section.

TYPICAL PERFOR

CE CHARACTERISTICS

PFC Voltage Amplifier Open-Loop
Gain and Phase

FREQUENCY (Hz)

GAIN (dB)

100

10k

100k

1508 G01

10M

100

120

PHASE (DEG)

PHASE

GAIN

FREQUENCY (Hz)

GAIN (dB)

100

10k

100k

1508 G02

10M

100

120

PHASE (DEG)

PHASE

GAIN

PFC Current Amplifier Open-Loop
Gain and Phase

TIME

1508 G03

PFC (GTDR1)

53%

PWM (GTDR2)

PFC/PWM Synchronization

ELECTRICAL C

HARA TERISTICS

= 18V, R

SET

= 15k to GND, C

SET

= 1nF to GND, I

= 100

A, I

SENSE

= 0V, CA

OUT

= 3.5V, VA

OUT

= 5V, OVP = V

REF

. No load on any

outputs, unless otherwise noted.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Soft Start Current

SS1 Current (PFC)

SS1 = 2.5V

SS2 Current (PWM)

SS2 = 1V

Comparators in PWM Section

LIM

Input Current

LIM

= 0V, V

= 1.6V

0.3

Current Limit Comparator (CL) Threshold

> 2.6V

0.95

1.1

1.20

GTDR2 Switching Off Threshold at V

or at SS2

LIM

= 0V

Input Current

= 0V

PWMOK Comparator Low Threshold (in Terms of V

REF

)

0.57

0.63

0.70

Pin High Voltage

1mA into V

6.2

6.9

7.5

GTDR2 Turn-On Blanking Time

180

LT1508

TYPICAL PERFOR

CE CHARACTERISTICS

Reference Voltage
vs Temperature

Supply Current vs Supply Voltage

GTDR Rise and Fall Time

Start-Up Supply Current
vs Supply Voltage

OUT

Pin Characteristics

Frequency vs R

SET

and C

SET

GTDR1 Maximum Duty Cycle
vs R

SET

and C

SET

Multiplier Current

JUNCTION TEMPERATURE (

REFERENCE VOLTAGE (V)

7.536

7.524

7.512

7.500

7.488

7.476

7.464

7.452

7.440

7.428

1508 G04

150

100 125

(

300

150

1508 G05

250

500

OUT

= 7V

OUT

= 6.5V

OUT

= 6V

OUT

= 5.5V

OUT

= 5V

OUT

= 4.5V

OUT

= 4V

OUT

= 3.5V

OUT

= 3V

OUT

= 2.5V

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

1508 G06

= 25

= 125

= 55

LOAD CAPACITANCE (nF)

TIME (ns)

400

300

200

100

1508 G07

RISE TIME

NOTE: GTDR SLEWS
BETWEEN 1V AND 16V

FALL TIME

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (

550

500

450

400

350

300

250

200

150

100

1508 G08

125

SET

CAPACITANCE (pF)

200

FREQUENCY (kHz)

500

450

400

350

300

250

200

150

100

1508 G09

1400

2200

600

1000

1800

SET

= 10k

SET

= 15k

SET

= 20k

SET

= 30k

SET

CAPACITANCE (pF)

200

MAXIMUM DUTY CYCLE

1.00

0.99

0.98

0.97

0.96

0.95

0.94

0.93

0.92

0.91

0.90

1508 G10

1400

2200

600

1000

1800

SET

= 10k

SET

= 15k

SET

= 20k

SET

= 30k

OUT

VOLTAGE (V)

OUT

CURRENT (mA)

1.5

1.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

1508 G11

2.4

1.2

2.4

= 125

= 25

= 55

LT1508

TYPICAL PERFOR

CE CHARACTERISTICS

SET

Voltage vs Current

LIM

Pin Characteristics

PFC SECTION

GTDR1 (Pin 1): The PFC MOSFET gate driver is a fast
totem pole output which is clamped at 15V. Capacitive
loads like the MOSFET gates may cause overshoot. A gate
series resistor of at least 5

will prevent the overshoot.

GND2 (Pin 2): Power Ground. High current spikes occur
in this line when either GTDR1 or GTDR2 switches low.

GND1 (Pin 3): Analog Ground.

SET

(Pin 4): The capacitor from this pin to GND and R

SET

determines oscillator frequency. The oscillator ramp is 5V
and the frequency = 1.5/(R

SET

LIM

(Pin 5): The threshold of the peak current limit

comparator is GND. To set current limit, a resistor divider
can be connected from V

REF

to the current sense resistor.

OUT

(Pin 6): This is the output of the current amplifier

that senses and forces the line current to follow the
reference signal that comes from the multiplier by com-
manding the pulse width modulator. When CA

OUT

is low,

the modulator has zero duty cycle.

SENSE

(Pin 7): This is the inverting input of the current

amplifier. This pin is clamped at 0.6V by an ESD protec-
tion diode.

OUT

(Pin 8): This is the multiplier high impedance

current output and the noninverting input of the current
amplifier. This pin is clamped at 0.6V and 3V.

(Pin 9): This is the AC line voltage sensing input to the

multiplier. It is a current input that is biased at 2V to
minimize the crossover dead zone caused by low line
voltage. At the pin, a 25k resistor is in series with the
current input, so that a lowpass RC can be used to filter out
the switching noise coming down from the line with a high
line impedance environment.

OUT

(Pin 10): This is the output of the voltage error

amplifier. The output is clamped at 13.5V. When the
output goes below 2.5V, the multiplier output current is
zero.

OVP (Pin 11): This is the input to the overvoltage com-
parator. The threshold is 1.05 times the reference voltage.
When the comparator trips, the multiplier, which is quickly
inhibited, blanks PFC switching to prevent further over-
shoot. This pin is also the input to the PWMOK comparator
that releases the PWM soft start (SS2) after the PFC output
gets close to the final voltage and has a hysteresis of
approximately 150V for 382V PFC output.

REF

(Pin 12): This is the 7.5V reference. When V

goes

low, V

REF

will stay at 0V. V

REF

biases most of the internal

circuitry and can source up to 5mA externally.

SENSE

(Pin 14): This is the inverting input to the voltage

amplifier.

(For application help with the PFC portion of this chip, see the LT1248 data sheet)

CTIO

SET

CURRENT (mA)

SET

REF

(mV)

120

100

1508 G12

1.0

0.8

0.6

0.4

0.2

= 125

= 25

= 55

LIM

VOLTAGE (V)

LIM

CURRENT (

360

300

240

180

120

180

240

300

1508 G13

0.8

0.4

0.8

= 125

= 25

= 55

LT1508

SET

(Pin 15): A resistor from R

SET

to GND sets the

oscillator charging current and the maximum multiplier
output current which is used to limit the maximum line
current.

M(MAX)

= 3.75V/R

SET

SS1 (Pin 16): Soft Start. SS1 is reset to zero for low V

When V

rises above the lockout threshold, SS1 is

released to ramp up at a rate set by the internal 12

current source and an external capacitor. During this ramp
up, PFC reference voltage is equal to SS1 voltage. After
SS1 rises past 7.5V, reference voltage remains at 7.5V.

(Pin 17): This is the supply for the chip. The LT1508

has two fast gate drivers required to fast charge high
power MOSFET gate capacitances. Good supply bypass-
ing is required consisting of a 0.1

F ceramic capacitor in

parallel with a low ESR electrolytic capacitor (56

F or

higher) in close proximity to IC GND.

PWM SECTION

SS2 (Pin 13): PWM Soft Start. The comparator PWMOK
monitors the OVP pin and releases the SS2 after the PFC
output gets close to the final voltage.

(Pin 18): PWM voltage mode control voltage. Normally

connects to the optocoupler amplifier output. A pull-up
current of 50

A flows out of the pin.

LIM

(Pin 19): PWM current sense input with limit set to

1.1V.

GTDR2 (Pin 20): The PWM MOSFET gate driver is a 1.5A
fast totem pole output. It is clamped at 15V. Capacitive
loads like the MOSFET gates may cause overshoot. A gate
series resistor of at least 5

will prevent the overshoot.

APPLICATIO

S I

FOR

ATIO

Voltage Error Amplifier (PFC Section)

The voltage error amplifier has a 100dB DC gain and 3MHz
unity-gain frequency. The output is internally clamped at
13.3V with V

= 18V. Maximum error amp output voltage

decreases to V

1.5V for V

less than 12V. The

noninverting input is tied to the 7.5V

REF

through a diode

and can be pulled down with the SS1 pin. Referring to
Figure 1, V

OUT

= V

REF

[(R1 + R2)/R2]. With R1 = 1M and

R2 = 20k, V

OUT

= 382V. R1 through R4, C1 and C2 form the

compensation for the voltage loop. Gain of the voltage
error amp with the values shown is given by:

OUT

1 + j

(j)(f)(6.6)

1 + j

)

The small-signal gain for the remaining portion of the
voltage loop for frequencies below the current loop band-
width is (see Figure 2):

OUT

)(

j)(f)(C

OUT

)(V

OUT

)

REF

)(P

)

IAC

+ 25k)

0.47

7.5V

REF

1.05V

REF

OVERVOLTAGE
COMPARATOR

LT1508

20k

330k

0.047

REGULATOR OUTPUT

OUT

= 382V

1508 ˇ F01

SENSE

OVP

OUT

ERROR AMP

R1
1M

R2
20k

Figure 1

(For application help with the PFC portion of this chip, see the LT1248 data sheet)

CTIO

With V

= 120VAC, P

= 150W, R

= 0.15

, R

REF

= 4k,

IAC

= 1M, V

OUT

= 382V and C

OUT

= 470

F, V

OUT

/VA

OUT

85/(j)(f). At very low frequencies, the loop has a 40dB/
decade slope. Additional zero-pole compensation is added
at 1Hz and 11Hz. The resulting loop gain and phase margin
is shown in Figure 3. The unity-gain bandwidth is low
compared to 120Hz, which results in low distortion and a
high power factor.

LT1508

APPLICATIO

S I

FOR

ATIO

To avoid subharmonic oscillations, the amplified downslope
of the inductor current must be less than the slope of the
oscillator ramp.

CA(OUT)

OSC

)(L)(f

)

OUT

)(R

)

(5V)(500

H)(100k)

(382V)(0.15

)

= 4.4

If the current amplifier gain at 100kHz is less than 4.4,
there will be no subharmonic oscillation. The open-loop
gain of the current loop is given by:

CA(OUT)

OUT

)(R

)

(j)(2

f)(L)(V

OSC

)

3648

(j)(f)

(382V)(0.15

)

(j)(2

f)(500

H)(5V)

The current error amp, with R5 = 4k, R6 = 20k, C3 =
0.001

F and C4 = 300pF, provides zero pole compensa-

tion resulting in 16kHz loop crossover frequency. The
current amp gain at 100kHz is 1.7. The resulting current
loop gain and phase margin is shown in Figure 4.

0.15

REF

R5
4k

OUT

470

300pF

0.001

20k

SENSE

OUT

IAC

1508 ˇ F02

LT1508

Figure 2

FREQUENCY (kHz)

0.1

CURRENT LOOP GAIN (dB)

PHASE MARGIN (DEG)

100

1000

1508 ˇ F04

Figure 4

FREQUENCY (Hz)

0.1

LOOP GAIN (dB)

PHASE MARGIN (DEG)

100

1000

1508 ˇ F03

Figure 3

Current Amplifier (PFC Section)

The current amplifier has a 110dB DC gain, 3MHz unity-
gain frequency and a 2V/

s slew rate. It is internally

clamped at 8.5V. Note that in the current averaging opera-
tion, high gain at twice the line frequency is necessary to
minimize line current distortion. Because CA

OUT

may need

to swing 5V over one line cycle at high line condition,
20mV AC will be needed at the inputs of the current
amplifier for a gain of 260 at 120Hz. Especially at light load
when the current loop reference signal is small, lower gain
will distort the reference signal and line current. But, if
signal gain at switching frequency is too high, the system
behaves more like a current mode system and can cause
subharmonic oscillation.

Multiplier

The multiplier has high noise immunity and superior
linearity over its full operating range. The current gain is
I

= (I

)/(200

) with I

= (VA

OUT

2V)/ 25k. The

error amplifier output voltage required at the input to the
multiplier is:

LT1508

)(R

)(25)(R

IAC

+ 25k)

)(R

REF

)

OUT

= 2 +

See Figure 2 for R

REF

OUT

is squared in the multiplier, resulting in excellent

performance over a wide range of output power and input
voltage without the addition of feedforward line frequency
ripple. Care must be taken to avoid feeding switching
frequency noise into the multiplier from the I

pin. An

internal 25k is provided in series with the low impedance
multiplier input so that only a capacitor from the I

pin to

GND1 is required to filter noise. The maximum multiplier
output current, which ultimately limits the input line cur-
rent, is set by a resistor from the R

SET

pin to GND1

according to the formula: I

M(MAX)

= 3.75V/R

SET

. Figure 5

shows I

versus I

for various values of VA

OUT.

Note that

Figure 5 data was taken with R

SET

= 15k.

APPLICATIO

S I

FOR

ATIO

The multiplier output acts as the command signal to the
current loop error amplifier. During steady-state operation
the voltage across R

REF

= (I

)(R

REF

) = (I

)(R

). Based on

this the value for R

is determined by:

M(MAX)

)(R

REF

)(V

)(eff)

OUT

with R

SET

= 15k, I

M(MAX)

= 3.75/15k = 250

A. For a 300W

converter with an efficiency (eff) of 0.8 at low line (90V

RMS

)

and R

REF

set to 4k, R

should be less than:

(250

A)(4k)(90VAC)(0.8)

300W 2

= 0.169

A 0.15

resistor will yield a maximum peak input current

of (I

M(MAX)

)(R

REF

) = (250

A)(4k)/0.15

= 6.67A. For

a 100kHz switching frequency with R

SET

= 15k, C

SET

= 1.5/

(100kHz)(15k) = 1nF. For added protection the LT1508
provides a second independent current limit comparator.
When the input voltage to the comparator (PK

LIM

pin) dips

below 0V, GTDR1 pin quickly goes low turning off the PFC
power switch. A resistor divider from V

REF

to R

(Figure 6)

senses the voltage across the line current sense resistor
(R

) and limits the peak input line current to [(7.5V/R1) +

A] (R2/R

). The 50

A represents the PK

LIM

input

current which flows out of the PK

LIM

pin. With R1 = 10k

and R2 = 1.8k, I

= 9.6A peak above the 6.67A peak

average plus the input inductor peak ripple current.

Always use R

SET

to set the primary line current limit. The

LIM

comparator is only for secondary protection. When

the line current reaches the primary limit, V

OUT

can no

longer be supported with the given input current and
begins to fall. System stability is maintained by the current
loop which is controlled by the current amplifier. When the

Oscillator Frequency and Maximum
Line Current Setting

The oscillator frequency is set by R

SET

and C

SET

. R

SET

the resistor from the R

SET

pin to GND1 and C

SET

is the

capacitor from the C

SET

pin to GND1. R

SET

should be

determined first. The oscillator frequency, which is equal
to the switching frequency for both the PFC and PWM
section, is determined by:

1.5

SET

)(C

SET

)

OSC

(

300

150

1508 ˇ F05

250

500

OUT

= 7V

OUT

= 6.5V

OUT

= 6V

OUT

= 5.5V

OUT

= 5V

OUT

= 4.5V

OUT

= 4V

OUT

= 3.5V

OUT

= 3V

OUT

= 2.5V

Figure 5. Multiplier Current I

vs I

and VA

OUT

LINE

0.15

PKLIM

C1
1nF

7.5V

REF

LIM

C1 IS TO REJECT NOISE, CURRENT
LIMIT DELAY IS ABOUT 2

1.8k

10k

1508 ˇ F06

LT1508

Figure 6

LT1508

line current reaches the secondary limit, the comparator
takes over control and hysteresis may occur causing
audible noise.

Overvoltage Protection (PFC Section)

Because of the slow loop response necessary for power
factor correction, output overshoot can occur following a
sudden load reduction or removal. To protect downstream
components, the LT1508 provides an overvoltage com-
parator which senses the output voltage and quickly
reduces the line current demand. Referring back to Figure
1, V

OUT

is 382V and during normal operation, since no

current flows in R3, 7.5V appears at both the V

SENSE

and

OVP pins. When V

OUT

overshoots its preset value, the

overcurrent from R1 will flow through R2 as well as R3.
The voltage amplifier feedback will keep V

SENSE

at 7.5V.

Therefore, the equivalent AC resistance seen by the OVP
pin is R2 in parallel with R3 or 10k. With these values and
the overvoltage comparator trip level internally set at
1.05V

REF

, the comparator trips when V

OUT

overshoots

10%. Overvoltage trip level is given by:

R2 + R3

(%)V

OUT

= 5%

( )

For additional protection, the OVP pin can be connected
to V

OUT

through an independent resistor divider (see

Figure 7). This ensures overvoltage protection during
safety agency abnormal testing conditions, such as
opening R1 or shorting R2.

The output of the multiplier looks like a high impedance
current source. In the current loop, offset line current is
determined by multiplier offset current and input offset
voltage of the current error amplifier. A 4mV current
amplifier V

translates to 27mA line current and 6.7W

input power for 250VAC

line if a 0.15

sense resistor is

used. Under a no-load condition or when the load power
is less than the offset output power, the offset line current
could slowly charge the output to an overvoltage level.
This is because the best the overvoltage comparator can
do is to reduce the multiplier output current to zero.
Unfortunately, this does not guarantee zero output current
if the current amplifier has offset. To regulate V

OUT

under

R4
1.05M

R5
20k

R1
1M

R2
20k

SENSE

OVP

ERROR
AMP

OVERVOLTAGE
COMPARATOR

0.047

OUT

0.47

330k

OUT

1.05V

REF

OUT

= 382V

OVERVOLTAGE = 420V

1508 ˇ F07

LT1508

Figure 7

this condition, the amplifier M1 (see Block Diagram)
becomes active. When VA

OUT

reduces to 2.2V, M1 sup-

plies up to 7

A of current to the resistor at the I

SENSE

in order to cancel a negative V

and keep V

OUT

error to

within 2V.

Undervoltage Lockouts and Soft Start

The LT1508 turns on when V

reaches 16V and remains

on until V

falls below 10V, whereupon the chip enters the

lockout state. In the lockout state, the oscillator is off and
the V

REF

and gate driver pins remain low. A capacitor from

SS1 to GND1 determines the ramp-up time of the PFC
section. SS1 is released from a zero when V

rises above

the lockout threshold. Once released, an internal 14

current source ramps the voltage error amplifier's refer-
ence voltage to 7.5V. SS1 voltage then continues beyond
7.5V. A second capacitor from SS2 to GND1 determines
the start-up time from the PWM section. A PWMOK
comparator (see Block Diagram) holds SS2 low until the
OVP pin reaches 7V. This corresponds to the PFC output
voltage reaching approximately 93% of its preset voltage.
SS2 is diode coupled to the PMW comparator which is
connected to the V

pin by a second diode. Holding SS2

low at any time will disable PWM output. Once released,
the 14

A current source ramps the PWM comparator

APPLICATIO

S I

FOR

ATIO

LT1508

APPLICATIO

S I

FOR

ATIO

input up to V

and then the SS2 voltage continues beyond

. The PWMOK comparator contains hysteresis and will

pull SS2 low disabling the PWM section if the PFC output
voltage falls below approximately 62% of its preset value
(240V with nominal 382V output).

Start-Up and Supply Voltage

The LT1508 draws only 250

A before the chip starts at

16V on V

. To trickle start, a 91k resistor from the power

line to V

supplies trickle current, and C4 holds V

while switching starts (see Figure 8); then the auxiliary
winding takes over and supplies the operating current.
Note that D3 and the larger values of C3 are only necessary
for systems that have sudden large load variations down
to minimum load and/or very light load conditions. Under
these conditions the loop may exhibit a start/restart mode
because switching remains off long enough for C4 to
discharge below 10V. Large values for C3 will hold V

until switching resumes. For less severe load variations D3
is replaced with a short and C3 is omitted. The turns ratio
between the primary winding determines V

according to :

OUT

for 382V V

OUT

and 18V V

, Np/Ns

19.

Figure 8

91k

C1
2

1508 ˇ F08

C2
2

C3
390

C4
100

LINE

MAIN INDUCTOR

Output Capacitor (PFC Section)

GTDR2 (PWM) pulse is synchronized to GTDR1 (PFC) pulse
with 53% duty cycle delay to reduce RMS ripple current in the
output capacitor. See PFC/PWM Synchronization graph in
the Typical Performance Characteristics section.

The peak-to-peak 120Hz PFC output ripple is determined by:

P-P

= 2I

LOAD(DC)

(Z)

where I

LOAD(DC)

is the DC load current of the PWM stage

and Z is the capacitor impedance at 120Hz.

For 470

F, impedance is 2.8

at 120Hz. At 335W load,

LOAD(DC)

= 335V/382V = 0.88A, V

P-P

= (2)(0.88)(2.8

) =

5V. If less ripple is desired higher capacitance should be
used. The selection of the output capacitor is based on
voltage ripple, hold-up time and ripple current. Assuming
the DC converter (PWM section) is designed to operate
with 240V to 382V

, the minimum hold-up time is a

function of the energy storage capacity of the capacitor:

(0.5)C

OUT

HOLD

(382V 0.5V

)

240V

with C

OUT

= 470

F, V

P-P

= 11.5V, and P

OUT

= 335W,

HOLD

= 60ms which is 3.6 line cycles at 60Hz. The ripple

current can be divided into two major components. The
first is the 120Hz component which is related to the DC
load current as follows:

120HZ

LOAD(DC)

The second component is made up of switching frequency
components due to the PFC stage charging the capacitor
and the PWM stage discharging the capacitor. For a 300W
output PFC forward converter running from an input
voltage of 100V

RMS

, the total high frequency ripple current

was measured to be 1.79A

RMS

For the United Chemicon KMH 450V capacitor series,
ripple current at 100kHz is specified 1.43 times higher
than the 120Hz limit.

LT1508

The total equivalent 120Hz ripple in the output capacitor
can be calculated by:

1.43

RMS

120HZ

( )

= 100kHz Ripple Current.

For I

LOAD(DC)

= 0.88A, 1

120Hz

= 0.62A and the equivalent

120Hz ripple current is:

1.79
1.43

RMS

= 1.4A

RMS

0.62

( )

Table 1 lists the ripple current components from lab
measurements for various output powers and line volt-
ages. The 120Hz ripple current rating at 105

C ambient is

1.72A for the 470

F KMH 35mm

50mm capacitor. The

expected life of the output capacitor may be calculated
from thermal stress analysis:

(105

C +

) (T

)

L = (L

where

L = Expected life time

= Hours of load life at rated ripple current and rated

ambient temperature

= Capacitor internal temperature rise at rated

condition.

= (I

R)/(KA), where I is the rated cur-

rent, R is capacitor ESR and KA is a volume constant.

= Operating ambient temperature

= Capacitor internal temperature rise at operating

condition

APPLICATIO

S I

FOR

ATIO

Table 1. PFC Capacitor RMS Ripple Current

100W

200W

300W

INRMS

120HZ

100

0.2

0.6

0.41

1.18

0.62

1.79

120

0.2

0.5

0.41

0.97

0.62

1.45

230

0.2

0.53

0.41

0.87

0.62

1.26

In our example, L

= 2000 hours assuming

= 5

C at

rated 1.72A.

can then be calculated from:

RMS

1.72A

= 5

( )

1.4A

= 3.3

1.72A

( )

Assuming the operating ambient temperature is 60

C, the

approximate lifetime is:

(105

C + 5

C) (60 + 3.3

L = (2000)(2)

= 50,870 Hours

For longer life a capacitor with a higher ripple current rating
or parallel capacitors should be used.

PWM Comparators

The LT1508 includes two comparators in the PWM section
which implement voltage mode PWM control. The V

control voltage pin sets duty factor. An additional current
limit comparator turns GTDR2 off in the event the I

LIM

voltage exceeds 1.1V. On-chip blanking avoids reset due
to leading edge noise.

Typical Application

Figure 9 shows a 24VDC, 300W power factor corrected,
universal input supply. The 2-transistor forward converter
offers many benefits including low peak currents,
nondissipative snubber, 500VDC switches and automatic
core reset guaranteed by the LT1508's 50% maximum
duty cycle.

LT1508

Figure 9. 24V, 300W Off-Line PFC Supply

APPLICATIO

S I

FOR

ATIO

Danger!! Lethal Voltages Present

SENSE

OVP

R27

20k

R35

499k

R22

330k

R24

10k

0.15

91k

R33

499k

R32

499k

R34

499k

382VBUS

REF

LIM

GTDR2

LT1508

OUT

REF

LIM

GTDR1

OUT

SENSE

OUT

0.47

C30

120

35V

C26

120

35V

R25

20k

R11

C24

1nF

C29

300pF

2.2

50V

330

35V

2.2

50V

1N5818

D10

1N5818

IRFP450

ERA82-004

MURH860CT

OUT

382VBUS

ERA82-004

0.1

C23

47nF

"X"

1/2W

LINE

GND

REF

R36

4.02k

RT1

SG57

R16

15k

R26

20k

NOTE: UNLESS OTHERWISE SPECIFIED

1. ALL RESISTORS 1/4W, 5%

2. ALL CAPACITANCE VALUES IN MICROFARADS

T1: COILTRONICS CTX02-13141-X2 (407) 241-7876

T2: COILTRONICS CTX02-13063-X3

T3: BI TECHNOLOGY HM41-11510 (714) 447-2345

6.3F

90VAC TO

264VAC

Danger!! Lethal Voltages Present

In This Section

C25

1nF

C21

1nF

C22

4.7nF

C20

47nF

C32

C31

C19

10nF

C11

63V

COM

4.7nF

"Y"

C18

0.1

0.068

C33

R37

4.02k

R39

20k

R14

3.3

15V

GND2

GND1

SET

SS2

SET

SS1

15V

R21

LT1431

1508 F09

CNY17-3

R20

2.2k

R19

R31

30.1k

D11

MUR3020PT

R30

3.4k

C12

1000

35V

C13

1000

35V

24V

C16

1nF

MUR160

1N965B

15V

1N965B

15V

R41

20k

C28

100pF

R40

470

KPBC606

MUR160

IRF840

400V

C14

330

450V

C10

63V

0.51

R13

20k

R10

4.7nF

"Y"

C1: ELECTRONIC CONCEPTS 5MP12J105K

L1: COILTRONICS CTX02-13140-X3

1: JW MILLER/FUKUSHIMA MPC71

RT1: KETEMA SG57 SURGE GARD

LT1508

APPLICATIO

S I

FOR

ATIO

An LT1431 reference/amplifier coupled to a low cost
optoisolator closes the loop from secondary side to pri-
mary side. Efficiency versus power and line voltage is
shown in Figure 10. The PFC preregulator alone has
efficiency numbers between 90% and 97% over line and
load.

A 3-turn secondary added to the 70-turn primary of T1
bootstraps V

to about 15V supplying the chip's 13mA

requirement as well as about 39mA to cover the gate
current of the three FETs and high side transformer. A
0.15

sense resistor is used to sense input current and

servo to the command created by the outer voltage and
multiplier. Thus the input current follows the input line
voltage, and changes as necessary, in order to maintain
constant bank voltage. The forward converter sees a
voltage input of 382VDC unless the line voltage drops out,
in which case the 330

F main capacitor discharges to

240VDC before the PWM stage is shut down. Compared to
a typical off-line converter, the effective input voltage
range of the forward converter is much smaller, simplify-
ing the design. Additionally, the higher bus voltage pro-
vides greater hold-up times for given capacitor size.

RMS

EFFICIENCY (%)

250

1508 ˇ F1O

132

180

200W/300W

100W

30W

Figure 10

LT1508

Dimensions in inches (millimeters) unless otherwise noted.

PACKAGE DESCRIPTIO

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

N Package

20-Lead PDIP (Narrow 0.300)

(LTC DWG # 05-08-1510)

N20 0695

0.015

(0.381)

MIN

0.125

(3.175)

MIN

0.130

0.005

(3.302

0.127)

0.065

(1.651)

TYP

0.045 0.065

(1.143 1.651)

0.018

0.003

(0.457

0.076)

0.005

(0.127)

MIN

0.100

0.010

(2.540

0.254)

0.255

0.015*

(6.477

0.381)

1.040*

(26.416)

MAX

0.009 0.015

(0.229 0.381)

0.300 0.325

(7.620 8.255)

0.325

+0.025
0.015

+0.635
0.381

8.255

(

)

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)

LT1508

LINEAR TECHNOLOGY CORPORATION 1995

1508f LT/TP 0697 7K ˇ PRINTED IN USA

Dimensions in inches (millimeters) unless otherwise noted.

PACKAGE DESCRIPTIO

SW Package

20-Lead Plastic Small Outline (Wide 0.300)

(LTC DWG # 05-08-1620)

S20 (WIDE) 0396

NOTE 1

0.496 0.512*

(12.598 13.005)

0.394 0.419

(10.007 10.643)

0.037 0.045

(0.940 1.143)

0.004 0.012

(0.102 0.305)

0.093 0.104

(2.362 2.642)

0.050

(1.270)

TYP

0.014 0.019

(0.356 0.482)

TYP

NOTE 1

0.009 0.013

(0.229 0.330)

0.016 0.050

(0.406 1.270)

0.291 0.299**

(7.391 7.595)

0.010 0.029

(0.254 0.737)

NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS

DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

PART NUMBER

DESCRIPTION

COMMENTS

LT1084

5A Low Dropout Linear Regulator

Good for Post Regulation of Switching Power Supplies

LT1105

Simplified Off-Line Controller

Solution for Universal Off-Line Inputs with Output to 100W

LT1241-5

High Frequency Current Mode PWM Controller

Operates at Oscillator Frequencies up to 500kHz

LT1247

High Frequency Current Mode PWM Controller

Operates at Oscillator Frequencies up to 1MHz

LT1248

Full-Feature Average Current Mode Power Factor Controller

Provides All Features in 16-Lead Package

LT1249

Minimal Parts Count Power Factor Controller

Simplified PFC Design

LT1509

Power Factor and PWM Controller

Current Mode PWM

RELATED PARTS

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900

FAX: (408) 434-0507

TELEX: 499-3977

Part Number LT1508