ChipFind - Datasheet

Part Number HE847711

Download:  PDF   ZIP
King Billion Electronics Co., Ltd
HE847711
HE80000 SERIES
April 28, 2003
Page 1 of 26
V1.0
This specification is subject to change without notice. Please contact sales person for the latest version before use.
- Table of Contents -
1.
General Description ___________________________________________________________________1
2.
Features _____________________________________________________________________________2
3.
Functional Block Diagram______________________________________________________________2
4.
Pin Description _______________________________________________________________________3
5.
LCD RAM Map ______________________________________________________________________5
6.
LCD Power Supply____________________________________________________________________6
6.1.
LCDC Control register ______________________________________________________________6
7.
Oscillators ___________________________________________________________________________6
8.
General Purpose I/O___________________________________________________________________6
9.
Key Scan Circuit______________________________________________________________________6
10.
Timer1 ____________________________________________________________________________6
11.
Timer2 ____________________________________________________________________________6
12.
Time Base Interrupt_________________________________________________________________6
13.
Watch Dog Timer ___________________________________________________________________6
14.
Digital-to-Analog Converter __________________________________________________________6
15.
Pulse-Width Modulation _____________________________________________________________6
16.
Low Voltage Detection _______________________________________________________________6
17.
Absolute Maximum Rating ___________________________________________________________6
18.
Recommended Operating Conditions __________________________________________________6
19.
AC/DC Characteristics ______________________________________________________________6
20.
Application Circuit__________________________________________________________________6
21.
Important Note _____________________________________________________________________6
22.
Updated Record ____________________________________________________________________6
1. General Description
HE847711 is a member of 8-bit Micro-controller series developed by King Billion Electronics. Four LCD
driver configurations, 32 COM x 128 SEG, 48 COM x 112 SEG, 64 COM x 96 SEG or 80 COM x 80
SEG are available by mask option. 24 LCD segment driver pins multiplexed with I/O pins to provide
King Billion Electronics Co., Ltd
HE847711
HE80000 SERIES
April 28, 2003
Page 2 of 26
V1.0
This specification is subject to change without notice. Please contact sales person for the latest version before use.
flexibility of wide variety of combinations to suit the needs of applications. The built-in LCD power
supply is equipped with voltage charge-pump circuit to generate the high voltage required by the high
duty LCD driver, bias voltage generating circuit and input voltage regulator circuit to supply stable LCD
display effect over the wide battery life. The built-in OP comparator can be used with (light, voice,
temperature, humility) sensor and used as battery low detection. 7-bit current-type D/A converter and
PWM device provide the complete speech output mechanism. The 1M ROM Size can be used in the
storage of speech, graphic, text, etc. It is ideal for applications such as Translator, Data Bank, Educational
Toy, Digital Voice Recording System, etc.
The instruction set of HE80000 series is easy to learn and simple to use. Only about thirty instructions
with four-type addressing mode are provided. Most of instructions take only 3 oscillator clocks to execute.
The processing power is enough to most of battery operation system.
2. Features
Operation Voltage:
2.4V ~ 3.6V
System Clock:
DC ~ 8 MHz @ 3.6V
DC ~ 4 MHz @ 2.4V
Internal ROM:
1M Bytes (256 KB Program ROM + 792 KB Data ROM)
Internal RAM:
16K Bytes
Dual Clock System: Fast clock:
32768 ~ 8M Hz (No Internal Clock)
Slow clock: 32768 Hz
Operation modes:
Fast, Slow, Idle and Sleep modes.
24 ~ 48 bit bi-directional general purpose I/O port with push-pull or Open-Drain output type
selectable for each I/O pin by mask option. 24 of them are multiplexed with LCD segment
pins.
Built-in 4x20 hardware keyboard scan circuit (multiplexed with LCD SEG pin) helps to
reduce the pin counts as well as the firmware effort.
Voltage Detector with two detecting thresholds.
Four LCD configurations: 32 COM x 128 SEG, 48 COM x 112 SEG, 64 COM x 96 SEG or
80 COM x 80 SEG. All of LCD configurations are B TYPE.
Built-in LCD power supply with input voltage regulator, voltage charge pump and bias
voltage generating circuit.
One 7-bit current-type DAC output.
Single-ended Pulse Width Modulation circuit for alternative voice output.
Built-in OP comparator.
Two 16-bit timers and one Time-Base timer.
Watch Dog Timer to prevent deadlock condition.
Two external interrupts and three internal timer interrupts.
Instruction set: 32 instructions with 4 addressing mode.
3. Functional Block Diagram
SEG
LCD
8 Bit CPU
Fast Clock
FXI, FXO
King Billion Electronics Co., Ltd
HE847711
HE80000 SERIES
April 28, 2003
Page 3 of 26
V1.0
This specification is subject to change without notice. Please contact sales person for the latest version before use.
COM
Driver
OSC.
LFR, LDL
1 MB ROM
SXI, SXO
LCD Extender
Interface
Slow Clock
OSC
16 KB RAM
LVL[1..5], LCDGS,
PWM
LCD Power
Supply
TC1
PWM
PRTC, PRTD, PRT10,
TC2
VO, DAO
PRT14, PRT15, PRT17
I/O Port
DAC
TBI
SGKY[43..24]
OPO,OPIN, OPIP
Key Scan
WDT
OP Amp
4. Pin Description
HE847711
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30 31
32 33 34
35 36 37
38 39 40
41 42
43 44 45
46 47 48
49 50 51
52 53
54 55 56
57 58 59
60 61 62
63 64
65 66 67
68 69 70
71 72 73
74 75 76
77 78
79 80 81
82 83 84
85 86 87
88 89
90 91 92
93 94 95
96 97 98
99 100
101 102 103
104 105 106
107 108 109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
14
0
14
1
14
2
14
3
14
4
14
5
14
6
14
7
14
8
14
9
15
0
15
1
15
2
15
3
15
4
15
5
15
6
15
7
15
8
15
9
16
0
16
1
16
2
16
3
16
4
16
5
16
6
16
7
16
8
16
9
17
0
17
1
17
2
17
3
17
4
17
5
17
6
17
7
17
8
17
9
18
0
18
1
18
2
18
3
18
4
18
5
18
6
18
7
18
8
18
9
19
0
19
1
19
2
19
3
19
4
19
5
19
6
19
7
19
8
19
9
20
0
20
1
20
2
20
3
20
4
20
5
20
6
20
7
20
8
20
9
21
0
21
1
21
2
21
3
21
4
21
5
21
6
21
7
21
8
SEG48
SEG47
SEG46
SEG45
SEG44
SGKY43
SGKY42
SGKY41
SGKY40
SGKY39
SGKY38
SGKY37
SGKY36
SGKY35
SGKY34
SGKY33
SGKY32
SGKY31
SGKY30
SGKY29
SGKY28
SGKY27
SGKY26
SGKY25
SGKY24
PRT147
PRT146
PRT145
PRT144
PR
T
1
43
PR
T
1
42
PR
T
1
41
PR
T
1
40
PR
T
1
57
PR
T
1
56
PR
T
1
55
PR
T
1
54
PR
T
1
53
PR
T
1
52
PR
T
1
51
PR
T
1
50
PR
T
1
77
PR
T
1
76
PR
T
1
75
PR
T
1
74
PR
T
1
73
PR
T
1
72
PR
T
1
71
PR
T
1
70
CO
M3
1
CO
M3
0
CO
M2
9
CO
M2
8
CO
M2
7
CO
M2
6
CO
M2
5
C0
M2
4
C0
M2
3
C0
M2
2
C0
M2
1
C0
M2
0
C0
M1
9
C0
M1
8
C0
M1
7
C0
M1
6
C0
M1
5
C0
M1
4
C0
M1
3
C0
M1
2
C0
M1
1
C0
M1
0
C0
M9
C0
M8
C0
M7
C0
M6
C0
M5
C0
M4
C0
M3
CO
M2
CO
M1
CO
M0
LVL1 LVL2 LVL3
LVL4 LVL5 LC
AP4A
LC
AP4B
LC
AP3A
LC
AP3B
LC
AP2A
LC
AP2B
LC
AP1A
LC
AP1B
LC
D
G
S
LC
D
V
X
LC
D
V
T
B
LF
R
LD
L
GN
D
VO DA
O
OP
I
N
OP
I
P
OP
O
RS
T
P
_
N
FX
O
FX
I
TS
TP
SXO
SXI
VDD
PRT107
PRT106
PRT105
PRT104
PRT103
PRT102
PRT101
PRT100
PRTD7
PRTD6
PRTD5
PRTD4
PRTD3
PRTD2
PRTD1
PRTD0
GND_PWM
PWM
PRTC7
PRTC6
PRTC5
PRTC4
PRTC3
PRTC2
PRTC1
PRTC0
VDD_RAM
CM
S
G
3
2
CM
S
G
3
3
CM
S
G
3
4
CM
S
G
3
5
CM
S
G
3
6
CM
S
G
3
7
CM
S
G
3
8
CM
S
G
3
9
CM
S
G
4
0
CM
S
G
4
1
CM
S
G
4
2
CM
S
G
4
3
CM
S
G
4
4
CM
S
G
4
5
CM
S
G
4
6
CM
S
G
4
7
CM
S
G
4
8
CM
S
G
4
9
CM
S
G
5
0
CM
S
G
5
1
CM
S
G
5
2
CM
S
G
5
3
CM
S
G
5
4
CM
S
G
5
5
CM
S
G
5
6
CM
S
G
5
7
CM
S
G
5
8
CM
S
G
5
9
CM
S
G
6
0
CM
S
G
6
1
CM
S
G
6
2
CM
S
G
6
3
CM
S
G
6
4
CM
S
G
6
5
CM
S
G
6
6
CM
S
G
6
7
CM
S
G
6
8
CM
S
G
6
9
CM
S
G
7
0
CM
S
G
7
1
CM
S
G
7
2
CM
S
G
7
3
CM
S
G
7
4
CM
S
G
7
5
CM
S
G
7
6
CM
S
G
7
7
CM
S
G
7
8
CM
S
G
7
9
SEG79
SEG78
SEG77
SEG76
SEG75
SEG74
SEG73
SEG72
SEG71
SEG70
SEG69
SEG68
SEG67
SEG66
SEG65
SEG64
SEG63
SEG62
SEG61
SEG60
SEG59
SEG58
SEG57
SEG56
SEG55
SEG54
SEG53
SEG52
SEG51
SEG50
SEG49
Pin Name
Pin # I/O
Description
SEG[79..44]
188~218
, 1 ~ 5
O LCD segment SEG[79..44] driver outputs.
SGKY[43..24] 6 ~ 25 O
LCD segments share pads with key scan out SCNO[19..0]. The key scan function of
these pins can be disabled by mask option clearing MO_LCDKEY to `0', then
SGKY[43..24] function as LCD segment driver only. Setting MO_LCDKEY to `1'
will turn on the key scan function.
PRT14[7..0] 26 ~ 33
B/
O
8-bit bi-directional I/O port 14 is shared with LCD segment pads SEG[23..16]. The
function of the pad can be selected individually by mask options MO_LIO14[7..0].
(`1' for LCD and `0' for I/O).
The output type of I/O pad can also be selected by mask option MO_14PP[7..0] (1
for push-pull and `0' for open-drain).
King Billion Electronics Co., Ltd
HE847711
HE80000 SERIES
April 28, 2003
Page 4 of 26
V1.0
This specification is subject to change without notice. Please contact sales person for the latest version before use.
Pin Name
Pin # I/O
Description
As the output structure of I/O pad does not contain tri-state buffer. When using the
I/O as input, "1" must be outputted before reading.
PRT15[7..0] 34 ~ 41
B/
O
8-bit bi-directional I/O port 15 is shared with LCD segment pads SEG[16..8]. The
function of the pad can be selected individually by mask options MO_LIO15[7..0].
(`1' for LCD and `0' for I/O).
The output type of I/O pad can also be selected by mask option MO_15PP[7..0] (1
for push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the
I/O as input, "1" must be outputted before reading.
PRT17[7..0] 42 ~ 49
B/
O
8-bit bi-directional I/O port 17 is shared with LCD segment pads SEG[7..0]. The
function of the pad can be selected individually by mask options MO_LIO17[7..0].
(`1' for LCD and `0' for I/O).
The output type of I/O pad can also be selected by mask option MO_17PP[7..0] (1
for push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the
I/O as input, "1" must be outputted before reading.
COM[31..0] 50 ~ 81 O LCD COMMON Driver pads.
LVL1
82
B LCD Bias Voltage 1
LVL2
83
B LCD Bias Voltage 2
LVL3
84
B LCD Bias Voltage 3
LVL4
85
B LCD Bias Voltage 4
LVL5
86
B LCD Bias Voltage 5
LCAP4A
87
B Charge Pump Capacitor Pin
LCAP4B 88 B
Charge Pump Capacitor Pin.
LCAP3A
89
B Charge Pump Capacitor Pin
LCAP3B
90
B Charge Pump Capacitor Pin
LCAP2A
91
B Charge Pump Capacitor Pin
LCAP2B
92
B Charge Pump Capacitor Pin
LCAP1A 93 B
Charge Pump Capacitor Pin
LCAP1B 94 B
Charge Pump Capacitor Pin
LCDGS
95
B LCD Voltage setting. Adjust Resistor between LCDGS and LVL2 to set LVL5.
LCDVX
96
B Charge Pump Capacitor Pin
LCDVTB 97 B
Charge Pump Capacitor Pin
LFR 98
O
LCD frame signal for interfacing with LCD segment extender KDS80.
LDL 99
O
LCD data load pin for interfacing with LCD segment extender KDS80.
GND
100
P Power ground Input.
VO 101
O
DAC Voice Output. Set the bit 1 and clear the bit 0 of VOC (DA = `1' and OP = `0')
register to turn on DAC with VO output.
DAO 102
O
Alternate output of DAC. Set both bit 1 and bit 0 of VOC register (DA = `1' and OP
= `1') to turn on DAC with DAO output as well as OP comparator.
OPIN 103
I
Inverting input of OP Amp. Set the bit 0 of VOC register (OP = `1') to turn on OP
comparator.
OPIP
104
I
Non-inverting input of OP Amp.
OPO
105
O Output of OP Amp.
RSTP_N 106 I
System Reset input pin. Level trigger, active low on this pin will put the chip in reset
state.
FXO,
FXI
107, 108
O,
B
External fast clock pin. Two types of oscillator can be selected by MO_FXTAL (`0'
for RC type and `1' for crystal type). For RC type oscillator, one resistor need to be
connected between FXI and GND. For crystal oscillator, one crystal need to be
placed between FXI and FXO. Please refer to application circuit for details.
TSTP_P 109
I
Test input pin. Please bond this pad and reserve a test point on PCB for debugging.
But for improving ESD, please connect this point with zero Ohm resistor to GND
.
King Billion Electronics Co., Ltd
HE847711
HE80000 SERIES
April 28, 2003
Page 5 of 26
V1.0
This specification is subject to change without notice. Please contact sales person for the latest version before use.
Pin Name
Pin # I/O
Description
SXO,
SXI
110, 111
O,
I
External slow clock pins. Slow clock is clock source for LCD display, TIMER1,
Time-Base and other internal blocks. Both crystal and RC oscillator are provided.
The slow clock type can be selected by mask option MO_SXTAL. Choose `0' for RC
type and `1' for crystal oscillator.
VDD 112
P
Positive power Input. 0.1 µF decoupling capacitors should be placed as close to IC
VDD and GND pads as possible for best decoupling effect.
PRT10[7..0] 113~120
B
8-bit bi-directional I/O port 10. The output type of I/O pad can be selected by mask
option MO_10PP[7..0] (`1' for push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the
I/O pad as input pad, "1" must be outputted before reading.
PRTD[7..0] 121~128
B
8-bit bi-directional I/O port D. The output type of I/O pad can also be selected by
mask option MO_DPP[7..0] (`1' for push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the
I/O as input, `1' must be outputted before reading the pin.
PRTD[7..2] can be used as wake-up pins. PRTD[7..6] can be as external interrupt
sources.
GND_PWM 129
O Dedicated Ground for PWM output.
PWM 130
O
The PWM output can drive speaker or buzzer directly. Set the bit2 of VOC register
as one to turn on PWM. Using VDD & PWM to drive output device.
PRTC[7..0]
131 ~
138
B
8-bit bi-directional I/O port C. PRTC[7:4] is shared with Key Scan Dedicated Input
SCNI[3:0]. The Key Scan function can be disabled by clearing MO_LCDKEY mask
option to `0'.
The output type of I/O pad can also be selected by mask option MO_CPP[7..0] (`1'
for push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the
I/O as input, `1' must be outputted before reading the pin.
VDD_RAM 139
P Dedicated power input for RAM
CMSG[32..79] 140~187 O
COM[32..79] pads are shared with SEG[127..80] outputs. The functions of the pads
to be COM drivers or SEG drivers can be selected by mask option MO_COM[0].
Please refer to LCD driver configuration for details.
I: Input, O: Output, B: Bidirectional, P: Power.
5. LCD RAM Map
There are 4 LCD configurations as determined by mask option MO_COM[1..0]. The functions of
CMSG[79..32] are different in each configuration as listed in the following table.
MO_COM[1..0] Configuration CMSG[79..64] CMSG[63..48] CMSG[47..32]
00
32 x 128 SEG[80..95] SEG[96..111] SEG[112..127]
01
48 x 112 SEG[80..95] SEG[96..111] COM[47..32]
10
64 x 96
SEG[80..95] COM[63..48] COM[47..32]
11
80 x 80
COM[79..64] COM[63..48] COM[47..32]