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Part Number ICL7139

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3-33
August 1997
ICL7139, ICL7149
3
3
/
4
Digit,
Autoranging Multimeter
Features
· 13 Ranges - ICL7139
- 4 DC Voltage 400mV, 4V, 40V, 400V
- 1 AC Voltage 400V
- 4 DC Current 4mA, 40mA, 400mA, 4A
- 4 Resistance 4k
, 40k
, 400k
, 4M
· 18 Ranges - ICL7149
- 4 DC Voltage 400mV, 4V, 40V, 400V
- 2 AC Voltage with Optional AC Circuit
- 4 DC Current 4mA, 40mA, 400mA, 4A
- 4 AC Current with Optional AC Circuit
- 4 Resistance 4k
, 40k
, 400k
, 4M
· Autoranging - First Reading is Always on Correct Range
· On-Chip Duplex LCD Display Drive Including Three Dec-
imal Points and 11 Annunciators
· No Additional Active Components Required
· Low Power Dissipation - Less than 20mW - 1000 Hour
Typical Battery Life
· Display Hold Input
· Continuity Output Drives Piezoelectric Beeper
· Low Battery Annunciator with On-Chip Detection
· Guaranteed Zero Reading for 0V Input on All Ranges
Description
The Intersil ICL7139 and ICL7149 are high performance, low
power, auto-ranging digital multimeter lCs. Unlike other
autoranging multimeter ICs, the ICL7139 and ICL7149
always display the result of a conversion on the correct
range. There is no "range hunting" noticeable in the display.
The unit will autorange between the four different ranges. A
manual switch is used to select the 2 high group ranges. DC
current ranges are 4mA and 40mA in the low current group,
and 400mA and 4A in the high current group. Resistance
measurements are made on 4 ranges, which are divided into
two groups. The low resistance ranges are 4/40k
. The high
resistance ranges are 0.4/4M
. Resolution on the lowest
range is 1
.
Pinouts
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG. NO.
ICL7139CPL
0 to 70
40 Ld PDIP
E40.6
ICL7149CPL
0 to 70
40 Ld PDIP
E40.6
ICL7149CM44
0 to 70
44 Ld MQFP
Q44.10x10
ICL7139, ICL7149 (PDIP)
TOP VIEW
ICL7149 (MQFP)
TOP VIEW
13
1
2
3
4
5
6
7
8
9
10
11
12
14
15
16
17
18
19
20
POL/AC
BP2
BP1
V+
V-
V
REF
LO
HI
DEINT
COMMON
INT 1
INT V/
TRIPLE POINT
C
AZ
C
INT
BEEPER OUT
mA/
µ
A
V/
/A
HI
-DC/LO
-AC
HOLD
28
40
39
38
37
36
35
34
33
32
31
30
29
27
26
25
24
23
22
21
ADG
3
/E
3
B
3
/C
3
F
2
/DP
3
G
2
/E
2
A
2
/D
2
B
2
/C
2
F
1
/DP
2
G
1
/E
1
A
1
/D
1
B
1
/C
1
F
0
/DP
1
G
0
/E
0
A
0
/D
0
B
0
/C
0
LO BAT/V
M
/
µ
A
/A
k/m
OSC IN
OSC OUT
1
2
3
4
5
6
7
8
9
10
11
12 13 14 15 16 17
28
27
26
25
24
23
22
21
20
19
18
39 38 37 36 35 34
33
32
31
30
29
44 43 42 41 40
M
/
µ
A
/A
k/m
OSC IN
OSC OUT
HOLD
BEEPER OUT
mA/
µ
A
V/
/A
HI
-DC/LO
-AC
NC
ADG
3
/E
3
B
3
/C
3
F
2
/DP
3
G
2
/E
2
A
2
/D
2
POL/AC
NC
BP2
BP1
V+
NC
V-
V
REF
LO
HI
DEINT
COMMON
INT 1
INT V
/
TRIPLE POINT
C
AZ
C
INT
B
2
/C
2
F
1
/D
P
2
G
1
/E
1
A
1
/D
1
B
1
/C
1
F
0
/D
P
1
G
0
/E
0
A
0
/D
0
B
0
/C
0
NC
LO B
A
T/V
File Number
3088.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
©
Intersil Corporation 1999
3-34
Functional Block Diagram
CONTROL LOGIC
INCLUDING
AUTORANGING LOGIC
ANALOG SECTION
ANALOG SWITCHES, INTEGRATION
AND COMPARATOR
POWER
SUPPLY
SECTION
BEEPER
DRIVER
OSC
COUNTERS
DISPLAY
DRIVER
AND
LATCHES
DISPLAY
DIGITAL COMMON
SWITCHES
CRYSTAL
V+ V- COM
PIEZO
ELECTRIC
BEEPER
EXTERNAL
RESISTORS
AND CAPACITORS
ICL7139, ICL7149
3-35
Absolute Maximum Ratings
Thermal Information
Supply Voltage (V+ to V-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V
Reference Input Voltage (V
REF
to COM) . . . . . . . . . . . . . . . . . . . 3V
Analog Input Current (IN + Current or IN + Voltage) . . . . . . . 100
µ
A
Clock Input Swing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V+ to V+ -3
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . .0
o
C to 70
o
C
Thermal Resistance (Typical, Note 1)
JA
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
50
MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
(MQFP - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V+ = 9V, T
A
= 25
o
C, V
REF
adjusted for -3.700 reading on DC volts, test circuit as shown in Figure 3.
Crystal = 120kHz. (See Figure 14)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Zero Input Reading
V
IN
or I
IN
or R
IN
= 0.00
-00.0
-
+00.0
V, I,
Linearity (Best Straight Line) (Note 6)
(Notes 1 and 8)
-1
-
+1
Counts
Accuracy DC V, 400V Range Only
(Notes 1 and 8)
-
-
±
1
% of RDG
±
1
Accuracy DC V, 400V Range Excluded
(Notes 1 and 8)
-
-
±
0.30
% of RDG
±
1
Accuracy
, 4K and 400K Range
(Notes 1 and 8)
-
-
±
0.75
% of RDG
±
8
Accuracy
, 4K and 4M Range
(Notes 1 and 8)
-
-
±
1
% of RDG
±
9
Accuracy DC I, Unadjusted for Full Scale
(Notes 1 and 8)
-
-
±
0.75
% of RDG
±
1
Accuracy DC I, Adjusted for Full Scale
(Notes 1 and 8)
-
±
0.2
-
% of RDG
±
1
Accuracy AC V
At 60Hz (Notes 5, 7, and 8)
-
±
2
-
% of RDG
Open Circuit Voltage for
Measurements
R
UNKNOWN
= Infinity
-
V
REF
-
V
Noise
V
IN
= 0, DC V (Note 2, 95% of Time)
-
0.1
-
LSB
Noise
V
IN
= 0, AC V (Note 2, 95% of Time)
-
4
-
LSB
Supply Current
V
IN
= 0, DC Voltage Range
-
1.5
2.4
mA
Analog Common (with Respect to V+)
I
COMMON
< 10
µ
A
2.7
2.9
3.1
V
Temperature Coefficient of Analog Common
I
COMMON
< 10
µ
A, Temp. = 0
o
C To 70
o
C
-
-100
-
ppm/
o
C
Output Impedance of Analog Common
I
COMMON
< 10
µ
A
-
1
10
Backplane/Segment Drive Voltage
Average DC < 50mV
2.8
3.0
3.2
V
Backplane/Segment Display Frequency
-
75
-
Hz
Switch Input Current
V
IN
= V+ to V- (Note 3)
-50
-
+50
µ
A
Switch Input Levels (High Trip Point)
V+ - 0.5
-
V+
V
Switch Input Levels (Mid Trip Point)
V- + 3
-
V+ - 2.5
V
Switch Input Levels (Low Trip Point)
V-
-
V- + 0.5
V
Beeper Output Drive (Rise or Fall Time)
C
LOAD
= 10nF
-
25
100
µ
s
Beeper Output Frequency
-
2
-
kHz
Continuity Detect
Range = Low
, V
REF
= 1.00V
-
1.5
-
k
Power Supply Functional Operation
V+ to V-
7
9
11
V
Low Battery Detect
V+ to V- (Note 4)
6.5
7
7.5
V
NOTES:
1. Accuracy is defined as the worst case deviation from ideal input value including: offset, linearity, and rollover error.
2. Noise is defined as the width of the uncertainty window (where the display will flicker) between two adjacent codes.
3. Applies to pins 17-20.
4. Analog Common falls out of regulation when the Low Battery Detect is asserted, however the ICL7139 and ICL7149 will continue to
operate correctly with a supply voltage above 7V and below 11V.
5. For 50Hz use a 100kHz crystal.
6. Guaranteed by design, not tested.
7. ICL7139 only.
8. RDG = Reading.
ICL7139, ICL7149
3-36
Timing Waveform
Pin Descriptions
FIRST DEINTEGRATE
UNDERRANGE
AUTO ZERO
UNDERRANGE
UNDERRANGE
AUTO ZERO
AUTO ZERO
SECOND AUTO ZERO
FOURTH AUTO ZERO
AUTO ZERO
SECOND INTEGRATE
SECOND DEINTEGRATE
THIRD AUTO ZERO
THIRD INTEGRATE
THIRD DEINTEGRATE
FOURTH INTEGRATE
FOURTH DEINTEGRATE
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
FIRST AUTO ZERO
FIRST INTEGRATE
FIGURE 1. LINE FREQUENCY CYCLES (1 CYCLE = 1000 INTERNAL CLOCK PULSES = 2000 OSCILLATION CYCLES)
I/O
PIN NUMBER
DESCRIPTION
O
1
Segment Driver POL/AC
O
2
Backplane 2
O
3
Backplane 1
I
4
V+
I
5
V-
I
6
Reference Input
O
7
Lo
O
8
Hi
I/O
9
Deintegrate
I/O
10
Analog Common
I
11
Int I
I
12
Int V/
I
13
Triple Point
I
14
Auto Zero Capacitor (C
AZ
)
I
15
Integrate Capacitor (C
INT)
O
16
Beeper Output
I
17
mA/
µ
A
I
18
/V/A
I
19
Hi
DC/Lo
AC
I
20
Hold
O
21
Oscillator Out
I
22
Oscillator In
O
23
Segment DRIVER k/m
O
24
Segment Driver
/A
O
25
Segment Driver M
/
µ
A
O
26
Segment Driver Lo Bat/V
O
27
Segment Driver B
0
/C
0
O
28
Segment Driver A
0
/D
0
O
29
Segment Driver G
0
/E
0
O
32
Segment Driver A
1
/D
1
O
33
Segment Driver G
1
/E
1
O
34
Segment Driver F
1
/DP
1
O
35
Segment Driver B
2
/C
1
O
39
Segment Driver B
3
/C
3
O
40
Segment Driver ADG
3
/E
3
NOTE: For segment drivers, segments are listed as (segment for
backplane 1)/(segment for backplane 2). Example: pin 27; segment
B
0
is on backplane 1, segment C
0
is on backplane 2.
I/O
PIN NUMBER
DESCRIPTION
ICL7139, ICL7149
3-37
Detailed Description
General
The Functional Block Diagram shows the digital section
which includes all control logic, counters, and display drivers.
The digital section is powered by V+ and Digital Common,
which is about 3V below V+. The oscillator is also in the digi-
tal section. Normally 120kHz for rejection of 60Hz AC inter-
ference and 100kHz for rejection of 50Hz AC should be
used. The oscillator output is divided by two to generate the
internal master clock. The analog section contains the inte-
grator, comparator, reference section, analog buffers, and
several analog switches which are controlled by the digital
logic. The analog section is powered from V+ and V-.
DC Voltage Measurement
Autozero
Only those portions of the analog section which are used
during DC voltage measurements are shown in Figure 3. As
shown in the timing diagram (Figure 1), each measurement
starts with an autozero (AZ) phase. During this phase, the
integrator and comparator are configured as unity gain buff-
ers and their non-inverting inputs are connected to Common.
The output of the integrator, which is equal to its offset, is
stored on C
AZ
- the autozero capacitor. Similarly, the offset of
the comparator is stored in C
lNT
. The autozero cycle equals
1000 clock cycles which is one 60Hz line cycle with a 120kHz
oscillator, or one 50Hz line cycle with a 100kHz oscillator.
Range 1 Integrate
The ICL7139 and ICL7149 perform a full autorange search
for each reading, beginning with range 1. During the range 1
integrate period, internal switches connect the INT V/
terminal to the Triple Point (Pin 13). The input signal is inte-
grated for 10 clock cycles, which are gated out over a period
of 1000 clock cycles to ensure good normal mode rejection
of AC line interference.
LOW
BATT
DIGIT 3
2
1
0
DP3
DP2
DP1
AC
a
b
k
M
c
mAV
µ
A
g
d
e
f
FIGURE 2. DISPLAY SEGMENT NOMENCLATURE
+
-
+
-
+
-
TRIPLE
POINT
C
AZ
C
INT
R
DEINT
AZ
DEINT-
DEINT-
V
REF
INTEGRATOR
COMPARATOR
TO LOGIC SECTION
6.7V
ANALOG
V
IN
R
INTV
INT V/
80
µ
A
C
AZ
C
INT
R
DEINT
AZ
AZ
AZ
COMMON
T
T
DEINT+
DEINT+
V+
V-
T = (INT)(AR)(AZ)
AR = AUTORANGE CHOPPER
AZ = AUTOZERO
INT = INTEGRATE
V
REF
COMMON
FIGURE 3. DETAILED CIRCUIT DIAGRAM FOR DC VOLTAGE MEASUREMENT
ICL7139, ICL7149
3-38
Range 1 Deintegrate
At the beginning of the deintegrate cycle, the polarity of the
voltage on the integrator capacitor (C
INT
) is checked, and
either the DElNT+ or DElNT- is asserted. The integrator
capacitor C
INT
is then discharged with a current equal to
V
REF
/R
DElNT
. The comparator monitors the voltage on C
INT
.
When the voltage on C
INT
is reduced to zero (actually to the
V
OS
of the comparator), the comparator output switches, and
the current count is latched. If the C
INT
voltage zero-crossing
does not occur before 4000 counts have elapsed, the over-
load flag is set. "OL" (overload) is then displayed on the LCD. If
the latched result is between 360 and 3999, the count is trans-
ferred to the output latches and is displayed. When the count
is less than 360, an underrange has occurred, and the
ICL7139 and ICL7149 then switch to range 2 - the 40V scale.
Range 2
The range 2 measurement begins with an autozero cycle
similar to the one that preceded range 1 integration. Range 2
cycle length however, is one AC line cycle, minus 360 clock
cycles. When performing the range 2 cycle, the signal is inte-
grated for 100 clock cycles, distributed throughout one line
cycle. This is done to maintain good normal mode rejection.
Range 2 sensitivity is ten times greater than range 1 (100 vs
10 clock cycle integration) and the full scale voltage of
range 2 is 40V. The range 2 deintegrate cycle is identical to
the range 1 deintegrate cycle, with the result being displayed
only for readings greater than 360 counts. If the reading is
below 360 counts, the ICL7139 and ICL7149 again asserts
the internal underrange signal and proceeds to range 3.
Range 3
The range 3V or 4V full scale measurement is identical to the
range 2 measurement, except that the input signal is inte-
grated during the full 1000 clock cycles (one line frequency
cycle). The result is displayed if the reading is greater than
360 counts. Underrange is asserted, and a range 4 measure-
ment is performed if the result is below 360 counts.
Range 4
This measurement is similar to the range 1, 2 and 3 mea-
surements, except that the integration period is 10,000 clock
cycles (10 line cycles) long. The result of this measurement
is transferred to the output latches and displayed even if the
reading is less than 360.
Autozero
After finding the first range for which the reading is above
360 counts, the display is updated and an autozero cycle is
entered. The length of the autozero cycle is variable which
results in a fixed measurement period of 24,000 clock cycles
(24 line cycles).
DC Current
Figure 4 shows a simplified block diagram of the analog
section of the ICL7139 and ICL7149 during DC current
measurement. The DC current measurements are very
similar to DC voltage measurements except: 1) The input
voltage is developed by passing the input current through a
0.1
(HI current ranges), or 9.9
(LOW current ranges)
+
-
+
-
+
-
TRIPLE
POINT
C
AZ
C
INT
R
DEINT
AZ
DEINT-
DEINT-
V
REF
INTEGRATOR
COMPARATOR
TO LOGIC SECTION
6.7V
ANALOG
LOW I
R
INTI
INT I
80
µ
A
C
AZ
C
INT
R
DEINT
AZ
AZ
AZ
COMMON
T
T
DEINT+
DEINT+
V+
V-
T = (INT)(AR)(AZ)
AR = AUTORANGE CHOPPER
AZ = AUTOZERO
INT = INTEGRATE
V
REF
9.9
0.1
HIGH I
I
COMMON
FIGURE 4. DETAILED CIRCUIT DIAGRAM FOR DC CURRENT MEASUREMENT
ICL7139, ICL7149
3-39
current sensing resistor; 2) Only those ranges with 1000 and
10,000 clock cycles of integration are used; 3) The R
lNT l
resistor is 1M
, rather than the 10M
value used for the
R
lNT V
resistor.
By using the lower value integration resistor, and only the 2
most sensitive ranges, the voltage drop across the current
sensing resistor is 40mV maximum on the 4mA and 400mA
ranges; 400mV maximum on the 40mA and 4A scales. With
some increase in noise, these "burden" voltages can be
reduced by lowering the value of both the current sense
resistors and the R
lNT l
resistor proportionally. The DC
current measurement timing diagram is similar to the DC
voltage measurement timing diagram, except in the DC
current timing diagram, the first and second integrate and
deintegrate phases are skipped.
AC Voltage Measurement for ICL7139
As shown in Figure 5, the AC input voltage is applied directly
to the ICL7139 input resistor. No separate AC to DC conver-
sion circuitry is needed. The AC measurement cycle is
begun by disconnecting the integrator capacitor and using
the integrator as an autozeroed comparator to detect the
positive-going zero crossing. Once synchronized to the AC
input, the autozero loop is closed and a normal
integrate/deintegrate cycle begins. The ICL7139 resynchro-
nizes itself to the AC input prior to every reading. Because
diode D4 is in series with the integrator capacitor, only posi-
tive current from the integrator flows into the integrator
capacitor, C
lNT
. Since the voltage on C
lNT
is proportional to
the half-wave rectified average AC input voltage, a conver-
sion factor must be applied to convert the reading to RMS.
This conversion factor is
/2
2 = 1.1107, and the system
clock is manipulated to perform the RMS conversion. As a
result the deintegrate and autozero cycle times are reduced
by 10%.
AC Voltage Measurement for ICL7149
The ICL7149 is designed to be used with an optional AC to
DC voltage converter circuit. It will autorange through two
voltage ranges (400V and 40V), and the AC annunciator is
enabled. A typical averaging AC to DC converter is shown in
Figure 6, while an RMS to DC converter is shown in Figure
7. AC current can also be measured with some simple modi-
fications to either of the two circuits in Figures 6 and 7.
+
-
+
-
+
-
TRIPLE POINT
C
AZ
C
INT
AZ
DEINT
DEINT-
V
REF
INTEGRATOR
COMPARATOR
6.7V
COMMON
R
INTV
INT V/
80
µ
A
C
AZ
DEINT
AZ
AZ
~
T
T
V+
V-
T = (INT + ACS) AZ AR
AR = AUTORANGE CHOPPER
AZ = AUTOZERO
INT = INTEGRATE
AC IN
~
S = AZ · ACS · ACINT
ACS = AC SYNC
D3
ACINT
D2
ACS
D1
D4
ACINT
5
R
DEINT
C
INT
ACS
FIGURE 5. DETAILED CIRCUIT DIAGRAM FOR AC VOLTAGE MEASUREMENT FOR ICL7139 ONLY
ICL7139, ICL7149
3-40
FIGURE 6. AC VOLTAGE MEASUREMENT USING OPTIONAL AVERAGING CIRCUIT
FIGURE 7. AC VOLTAGE MEASUREMENT USING OPTIONAL RMS CONVERTER CIRCUIT
ICL7652
20M
V
IN
100k
50k
V
+
4
11
7
10
5
1
8
2
0.1
µ
F
1.0
µ
F
COM
43.2k
12
FULL
INT (V/
)
ICL7149
COMMON
-
+
20M
0.1
µ
F
V-
ICL7652
V
+
4
11
7
10
5
1
8
2
0.1
µ
F
-
+
0.1
µ
F
V-
100k
5k
SCALE
ADJUST
10
0VAC - 400VAC
0Hz - 1000Hz
AD736
V
+
2
7
3
6
8
4
5
10
µ
F
1
12
INT (V/
)
ICL7149
COMMON
+
+
2.2
µ
F
COM
FULL
10M
V
-
SCALE
ADJUST
4.99k
2.2
µ
F
5k
30k
10
V
+
V
IN
0VAC - 400VAC
50Hz - 1000Hz
+
ICL7139, ICL7149
3-41
Ratiometric
Measurement
The ratiometric
measurement is performed by first
integrating the voltage across an unknown resistor, R
X
, then
effectively deintegrating the voltage across a known resistor
(R
KNOWN1
or R
KNOWN2
of Figure 8). The shunting effect of
R
INTV
does not affect the reading because it cancels exactly
between integration and deintegration. Like the current mea-
surements, the
measurements are split into two sets of
ranges. LO
measurements use a 10k
reference resistor,
and the full scale ranges are 4k
and 40k
. HI
measure-
ments use a 1M
reference resistor, and the full scale ranges
are 0.4M
and 4M
. The measurement phases and timing
are the same as the measurement phases and timing for DC
current except: 1) During the integrate phases the input volt-
age is the voltage across the unknown resistor R
X
, and; 2)
During the deintegrate phases, the input voltage is the voltage
across the reference resistor R
KNOWN1
or R
KNOWN2
.
Continuity Indication
When the ICL7139 and ICL7149 are in the LO
measurement mode, the continuity circuit of Figure 9 will be
active. When the voltage across R
X
is less than approximately
100mV, the beeper output will be on. When R
KNOWN
is 10k
,
the beeper output will be on when R
X
is less than 1k
.
Common Voltage
The analog and digital common voltages of the ICL7139 and
ICL7149 are generated by an on-chip resistor/zener/diode
combination, shown in Figure 10. The resistor values are
chosen so the coefficient of the diode voltage cancels the
positive temperature coefficient of the zener voltage. This
voltage is then buffered to provide the analog common and
the digital common voltages. The nominal voltage between
V+ and analog common is 3V. The analog common buffer
can sink about 20mA, or source 0.01mA, with an output
impedance of 10
. A pullup resistor to V+ may be used if
more sourcing capability is desired. Analog common may be
used to generate the reference voltage, if desired.
Oscillator
The ICL7139 and ICL7149 use a parallel resonant-type
crystal in a Pierce oscillator configuration, as shown in
Figure 11, and requires no other external components. The
crystal eliminates the need to trim the oscillator frequency.
An external signal may be capacitively coupled in OSC IN,
with a signal level between 0.5V and 3V
P-P
. Because the
+
-
+
-
+
-
TRIPLE
POINT
C
AZ
C
INT
R
DEINT
AZ
INTEGRATOR
COMPARATOR
TO LOGIC SECTION
COMMON
R
INTV
INT V/
C
AZ
C
INT
R
DEINT
AZ
AZ
AZ
T
T
DEINT+
DEINT+
T = INT + DEINT
AZ = AUTOZERO
INT = INTEGRATE
V
REF
LOW
+
-
LOW
LO
HI
R
KNOWN 1
R
KNOWN 2
R
X
FIGURE 8. DETAILED CIRCUIT DIAGRAM FOR RATIOMETRIC
MEASUREMENT
+
-
COM
LO
HI
+
-
+
-
R
KNOWN
V
X
BEEPER
OUTPUT
R
UNKNOWN
V
REF
LO
2kHz
V+
V+
V
X
= 100mV
R
X
FIGURE 9. CONTINUITY BEEPER DRIVE CIRCUIT
+
-
P
+
-
P
0.3V
+
-
LOGIC
SECTION
V+
LO BAT
DIGITAL
COMMON
(INTERNAL)
3.1V
+
+
3V
-
ANALOG
COMMON
(PIN 10)
V-
6.7V
125K
5K
180K
80
µ
A
FIGURE 10. ANALOG AND DIGITAL COMMON VOLTAGE
GENERATOR CIRCUIT
+
-
ICL7139, ICL7149
3-42
OSC OUT pin is not designed to drive large external loads,
loading on this pin should not exceed a single CMOS input.
The oscillator frequency is internally divided by two to gener-
ate the ICL7139 and ICL7149 clock. The frequency should
be 120kHz to reject 60Hz AC signals, and 100kHz to reject
50Hz signals.
Display Drivers
Figure 12 shows typical LCD Drive waveforms, RMS ON, and
RMS OFF voltage calculations. Duplex multiplexing is used to
minimize the number of connections between the ICL7139
and ICL7149 and the LCD. The LCD has two separate back-
planes. Each drive line can drive two individual segments, one
referenced to each backplane. The ICL7139 and ICL7149
drive 3
3
/
4
7-segment digits, 3 decimal points, and 11 annunci-
ators. Annunciators are used to indicate polarity, low battery
condition, and the range in use. Peak drive voltage across the
display is approximately 3V. An LCD with approximately
1.4V
RMS
threshold voltage should be used. The third voltage
level needed for duplex drive waveforms is generated through
an on-chip resistor string. The DC component of the drive
waveforms is guaranteed to be less than 50mV.
Ternary Input
The
/Volts/Amps logic input is a ternary, or 3-level input.
This input is internally tied to the common voltage through a
high-value resistor, and will go to the middle, or "Volts" state,
when not externally connected. When connected to V-,
approximately 5
µ
A of current flows out of the input. In this
case, the logic level is the "Amps", or low state. When con-
nected to V+, about 5
µ
A of current flows into the input. Here,
the logic level is the "
", or high state. For other pins, see
Table 2.
Component Selection
For optimum performance while maintaining the low-cost
advantages of the ICL7139 and ICL7149, care must be
taken when selecting external components. This section
reviews specifications and performance effects of various
external components.
5M
330K
10pF
5pF
OSC OUT
OSC IN
FIGURE 11. INTERNAL OSCILLATOR CIRCUIT DIAGRAM
TABLE 2. TERNARY INPUTS CONNECTIONS
PIN
NUMBER
V+
OPEN
OR COM
V-
17
mA
µ
A
Test
18
V
Amps
19
Hi
/DC
Lo
/AC
Test
20
Hold
Auto
Test
BACKPLANE
SEGMENT ON
SEGMENT OFF
V
SEGMENT ON
V
SEGMENT OFF
V
PEAK
V
PEAK / 2
O
V
PEAK
O
V
PEAK
O
2V
PEAK
O
(VOLTAGE ACROSS ON SEGMENT)
(VOLTAGE ACROSS OFF SEGMENT)
-2V
PEAK
V
PEAK
O
-V
PEAK
V+
DCOM
V
PEAK
= 3V
±
10%
RMS ON
2.37V
RMS OFF
1.06V
V
RMS
5
8
---
V
PEAK
ON
=
V
RMS
5
8
---
V
PEAK
OFF
=
FIGURE 12. DUPLEXED LCD DRIVE WAVEFORMS
ICL7139, ICL7149
3-43
Integrator Capacitor, C
lNT
As with all dual-slope integrating convertors, the integration
capacitor must have low dielectric absorption to reduce
linearity errors. Polypropylene capacitors add undetectable
errors at a reasonable cost, while polystyrene and
polycarbonate may be used in less critical applications. The
ICL7139 and ICL7149 are designed to use a 3.3nF
(0.0033
µ
F) C
lNT
with an oscillator frequency of 120kHz and
an R
lNTV
of 10M
. With a 100kHz oscillator frequency (for
50Hz line frequency rejection), C
lNT
and R
INTV
affects the
voltage swing of the integrator. Voltage swing should be as
high as possible without saturating the integrator. Saturation
occurs when the integrator output is within 1V of either V+ or
V-. Integrator voltage swing should be about
±
2V when using
standard component values. For different R
lNTV
and
oscillator frequencies the value of C
lNT
can be calculated
from:
Integrator Resistors
The normal values of the R
lNT V
and R
lNT l
resistors are
10M
and 1M
respectively. Though their absolute values
are not critical, unless the value of the current sensing resis-
tors are trimmed, their ratio should be 10:1, within 0.05%.
Some carbon composition resistors have a large voltage
coefficient which will cause linearity errors on the 400V scale.
Also, some carbon composition resistors are very noisy. The
class "A" output of the integrator begins to have nonlinearities
if required to sink more than 70
µ
A (the sourcing limit is much
higher). Because R
lNT V
drives a virtual ground point, the
input impedance of the meter is equal to R
lNT V
.
Deintegration Resistor, R
DElNT
Unlike most dual-slope A/D converters, the ICL7139 and
ICL7149 use different resistors for integration and deintegra-
tion. R
DElNT
should normally be the same value as R
lNT V
,
and have the same temperature coefficient. Slight errors in
matching may be corrected by trimming the reference voltage.
Autozero Capacitor, C
AZ
The C
AZ
is charged to the integrator's offset voltage during
the autozero phases, and subtracts that voltage from the
input signal during the integrate phases. The integrator thus
appears to have zero offset voltage. Minimum C
AZ
value is
determined by: 1) Circuit leakages; 2) C
AZ
self-discharge;
3) Charge injection from the internal autozero switches.
To avoid errors, the C
AZ
voltage change should be less than
1/10 of a count during the 10,000 count clock cycle integra-
tion period for the 400mV range. These requirements set a
lower limit of 0.047
µ
F for C
AZ
but 0.1
µ
F is the preferred
value. The upper limit on the value of C
AZ
is set by the time
constant of the autozero loop, and the 1 line cycle time
period allotted to autozero. C
AZ
may be several 10s of
µ
F
before approaching this limit.
The ideal C
AZ
is a low leakage polypropylene or Teflon
capacitor. Other film capacitors such as polyester, polysty-
rene, and polycarbonate introduce negligible errors. If a few
seconds of settling time upon power-up is acceptable, the
C
AZ
may be a ceramic capacitor, provided it does not have
excessive leakage.
Ohm Measurement Resistors
Because the ICL7139 and ICL7149 use a ratiometric ohm
measurement technique, the accuracy of ohm reading is pri-
marily determined by the absolute accuracy of the
R
KNOWN1
and R
KNOWN2
. These should normally be 10k
and 1M
, with an absolute accuracy of at least 0.5%.
Current Sensing Resistors
The 0.1
and 9.9
current sensing resistors convert the
measured current to a voltage, which is then measured
using R
lNT l
. The two resistors must be closely matched, and
the ratio between R
lNT l
and these two resistors must be
accurate - normally 0.5%. The 0.1
resistor must be capa-
ble of handling the full scale current of 4A, which requires it
to dissipate 1.6W.
Continuity Beeper
The Continuity Beeper output is designed to drive a piezo-
electric transducer at 2kHz (using a 120kHz crystal), with a
voltage output swing of V+ to V-. The beeper output off state
is at the V+ rail. When crystals with different frequencies are
used, the frequency needed to drive the transducer can be
calculated by dividing the crystal frequency by 60.
Display
The ICL7139 and ICL7149 use a custom, duplexed drive dis-
play with range, polarity, and low battery annunciators. With
a 3V peak display voltage, the RMS ON voltage will be
2.37V minimum; RMS OFF voltage will be 1.06V maximum.
Because the display voltage is not adjustable, the display
should have a 10% ON threshold of about 1.4V. Most display
manufacturers supply a graph that shows contrast versus
RMS drive voltage. This graph can be used to determine
what the contrast ratio will be when driven by the ICL7139
and ICL7149. Most display thresholds decrease with
increasing temperature. The threshold at the maximum
operating temperature should be checked to ensure that the
"off" segments will not be turned "on" at high temperatures.
Crystal
The ICL7139 and ICL7149 are designed to use a parallel
resonant 120kHz or 100kHz crystal with no additional exter-
nal components. The R
S
parameter should be less than
25k
to ensure oscillation. Initial frequency tolerance of the
crystal can be a relatively loose 0.05%.
Switches
Because the logic input draws only about 5
µ
A, switches
driving these inputs should be rated for low current, or "dry"
operations. The switches on the external inputs must be able
to reliably switch low currents, and be able to handle
voltages in excess of 400V
AC
.
C
INT
Integrate Time
(
)
Integrate Current
(
)
×
Desired Integrator Swing
(
)
----------------------------------------------------------------------------------------------------
=
10,000 x 2 x Oscillator Period
(
)
0.4V/R
INTV
×
2V
(
)
-------------------------------------------------------------------------------------------------------------------------
=
ICL7139, ICL7149
3-44
Reference Voltage Source
A voltage divider connected to V+ and Common is the sim-
plest source of reference voltage. While minimizing external
component count, this approach will provide the same volt-
age tempco as the ICL7139 and ICL7149 Common - about
100PPM/
o
C. To improve the tempco, an ICL8069 bandgap
reference may be used (see Figure 13). The reference volt-
age source output impedance must be
R
DElNT
/4000.
Applications, Examples, and Hints
A complete autoranging 3
3
/
4
digit multimeter is shown in
Figure 14. The following sections discuss the functions of
specific components and various options.
Meter Protection
The ICL7139 and ICL7149 and their external circuitry should
be protected against accidental application of 110/220V AC
line voltages on the
and current ranges. Without the nec-
essary precautions, both the ICL7139 and ICL7149 and their
external components could be damaged under such fault
conditions. For the current ranges, fast-blow fuses should be
used between S5A in Figure 14 and the 0.1
and 9.9
shunt resistors. For the
ranges, no additional protection
circuitry is required. However, the 10k
resistor connected
to pin 7 must be able to dissipate 1.2W or 4.8W for short
periods of time during accidental application of 110V or
220V
AC
line voltages respectively.
DEINTEGRATE
INTEGRATE VOLT /
INTEGRATE CURRENT
REFERENCE INPUT
ANALOG COMMON
TRIPLE POINT
EXTERNAL
REFERENCE
10M
10K
1M
10M
10K
ICL8069
V+
FIGURE 13. EXTERNAL VOLTAGE REFERENCE CONNECTION
TO ICL7139 AND ICL7149
13
14
15
DEINT
INT (V/
)
COMMON
LO
TRIPLE
10M
POINT
HI
INT (I)
V/
/A
mA/
µ
A
ICL7139
ICL7149
HOLD
HI
-DC/LO
-AC
V
REF
V-
V+
BEEPER
DISPLAY
DRIVE
OUTPUTS
C
AZ
C
INT
OSC
OUT
OSC
IN
1-3
23-40
BEEPER
INPUTS
V/
S4A
V
A
µ
A
mA
S5A
9
12
7
8
11
10
18
17
COMMON
V+
V+
V-
µ
A
A
V
mA
S4B
10k
1M
1M
9.9
10M
A
0.1
2W
20
S3
19
S3
V+
V+
6
5
4
16
1
µ
F
ON/OFF
S1
9V
BATTERY
TANT
4.7
µ
F
PIN 4
ICL8069
PIN 10
LO BAT
AC
mAV
µ
A
10k
120kHz
CRYSTAL
0.1
µ
F
3.3nF
21
22
k
M
30K-
50K
+
+
+
-
10k
S2 CLOSED: HI
-DC
S3 CLOSED: HOLD READING
NOTES:
1. Crystal is a Statek or SaRonix CX-IV type.
2. Multimeter protection components have not been shown.
3. Display is from LXD, part number 38D8R02H (or Equivalent).
4. Beeper is from muRata, part number PKM24-4A0 (or Equivalent).
FIGURE 14. BASIC MULTIMETER APPLICATION CIRCUIT FOR ICL7139 AND ICL7149
ICL7139, ICL7149
3-45
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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Printed Circuit Board Layout Considerations
Particular attention must be paid to rollover performance,
leakages, and guarding when designing the PCB for a
ICL7139 and ICL7149 based multimeter.
Rollover Performance, Leakages, and Guarding
Because the ICL7139 and ICL7149 system measures very
low currents, it is essential that the PCB have low leakage.
Boards should be properly cleaned after soldering. Areas of
particular importance are: 1) The INT V/
and INT l Pins; 2)
The Triple Point; 3) The R
DElNT
and the C
AZ
pins.
The conversion scheme used by the ICL7139 and ICL7149
changes the common mode voltage on the integrator and
the capacitors C
AZ
and C
lNT
during a positive deintegrate
cycle. Stray capacitance to ground is charged when this
occurs, removing some of the charge on C
lNT
and causing
rollover error. Rollover error increases about 1 count for each
picofarad of capacitance between C
AZ
or the Triple Point
and ground, and is seen as a zero offset for positive volt-
ages. Rollover error is not seen as gain error.
The rollover error causes the width of the +0 count to be
larger than normal. The ICL7139 and ICL7149 will thus read
zero until several hundred microvolts are applied in the posi-
tive direction. The ICL7139 and ICL7149 will read -1 when
approximately -100
µ
V is applied.
The rollover error can be minimized by guarding the Triple
Point and C
AZ
nodes with a trace connected to the C
lNT
pin,
(see Figure 15) which is driven by the output of the integra-
tor. Guarding these nodes with the output of the integrator
reduces the stray capacitance to ground, which minimizes
the charge error on C
lNT
and C
AZ
. If possible, the guarding
should be used on both sides of the PC board.
Stray Pickup
While the ICL7139 and ICL7149 have excellent rejection of
line frequency noise and pickup in the DC ranges, any stray
coupling will affect the AC reading. Generally, the analog cir-
cuitry should be as close as possible to the ICL7139 and
ICL7149. The analog circuitry should be removed or
shielded from any 120V AC power inputs, and any AC
sources such as LCD drive waveforms. Keeping the analog
circuit section close to the ICL7139 and ICL7149 will also
help keep the area free of any loops, thus reducing magneti-
cally coupled interference coming from power transformers,
or other sources.
14 15
13
12
11
10
9
FIGURE 15. PC BOARD LAYOUT
ICL7139, ICL7149