1
®
FN4995.3
ICL3310
+3V to +5.5V, 1 Microamp, 250kbps,
RS-232 Transmitter/Receiver
The Intersil ICL3310 contains 3.0V to 5.5V powered RS-232
transmitters/receivers which meet ElA/TIA-232 and
V.28/V.24 specifications, even at V
CC
= 3.0V. Targeted
applications are PDAs, Palmtops, and notebook and laptop
computers where the low operational, and even lower
standby, power consumption is critical. Efficient on-chip
charge pumps, coupled with a manual powerdown function
reduces the standby supply current to a 1
µ
A trickle. Small
footprint packaging, and the use of small, low value
capacitors ensure board space savings as well. Data rates
greater than 250kbps are guaranteed at worst case load
conditions. This device is fully compatible with 3.3V only
systems, mixed 3.3V and 5.0V systems, and 5.0V only
systems.
The single pin powerdown function (SHDN = 0) disables all
the transmitters and receivers, while shutting down the
charge pump to minimize supply current drain.
Table 1 summarizes the features of the ICL3310, while
Application Note AN9863 summarizes the features of each
device comprising the ICL32XX 3V family.
Pinout
ICL3310 (SOIC)
TOP VIEW
Features
·
±
15kV ESD Protected (Human Body Model)
· Low Power, Pin Compatible Upgrade for 5V MAX222,
SP310A, and LT1X80/A
· Single SHDN Pin Disables Transmitters and Receivers
· Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
· Latch-Up Free
· On-Chip Voltage Converters Require Only Four External
0.1
µ
F Capacitors
· Receiver Hysteresis For Improved Noise Immunity
· Very Low Supply Current . . . . . . . . . . . . . . . . . . . . 0.3mA
· Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
· Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/
µ
s
· Wide Power Supply Range . . . . . . . Single +3V to +5.5V
· Low Supply Current in Powerdown State. . . . . . . . . .<1
µ
A
Applications
· Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Modems, Printers and other Peripherals
- Digital Cameras
- Cellular/Mobile Phones
Related Literature
· Technical Brief TB363 "Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)"
NC
C1+
V+
C1-
C2+
C2-
V-
T2
OUT
R2
IN
SHDN
GND
T1
OUT
R1
IN
R1
OUT
T2
IN
V
CC
T1
IN
R2
OUT
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
Part # Information
PART NO.
TEMP.
RANGE (
o
C)
PACKAGE
PKG. NO.
ICL3310CB
0 to 70
18 Ld SOIC
M18.3
ICL3310CB-T
0 to 70
Tape and Reel
M18.3
ICL3310IB
-40 to 85
18 Ld SOIC
M18.3
ICL3310IB-T
-40 to 85
Tape and Reel
M18.3
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
NO. OF
Tx.
NO. OF
Rx.
NO. OF
MONITOR Rx.
(R
OUTB
)
DATA
RATE
(kbps)
Rx. ENABLE
FUNCTION?
READY
OUTPUT?
MANUAL
POWER-
DOWN?
AUTOMATIC
POWERDOWN
FUNCTION?
ICL3310
2
2
0
250
NO
NO
YES
NO
Data Sheet
July 2004
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2001, 2002, 2004. All Rights Reserved
OBSOL
ETE PR
ODUCT
POSSIBL
E SUBS
TITUTE
PRODU
CT
ICL3222
2
Pin Descriptions
PIN
FUNCTION
V
CC
System power supply input (3.0V to 5.5V).
V+
Internally generated positive transmitter supply (+5.5V).
V-
Internally generated negative transmitter supply (-5.5V).
GND
Ground connection.
C1+
External capacitor (voltage doubler) is connected to this lead.
C1-
External capacitor (voltage doubler) is connected to this lead.
C2+
External capacitor (voltage inverter) is connected to this lead.
C2-
External capacitor (voltage inverter) is connected to this lead.
T
IN
TTL/CMOS compatible transmitter Inputs.
T
OUT
RS-232 level (nominally
±
5.5V) transmitter outputs.
R
IN
RS-232 compatible receiver inputs.
R
OUT
TTL/CMOS level receiver outputs.
SHDN
Active low input to shut down transmitters, receivers, and on-board power supply, to place device in low power mode.
Typical Operating Circuits
ICL3310
NOTE: The negative terminal of C
3
can be connected to either V
CC
or GND.
17
V
CC
T1
OUT
T2
OUT
T1
IN
T2
IN
T
1
T
2
0.1
µ
F
+
0.1
µ
F
+
0.1
µ
F
12
11
15
8
2
4
3
7
V+
V-
C1+
C1-
C2+
C2-
+
0.1
µ
F
5
6
R1
OUT
R1
IN
14
5k
R2
OUT
R2
IN
9
10
5k
13
C
1
C
2
+ C
3
C
4
SHDN
GND
18
+3.3V to +5V
+
0.1
µ
F
16
V
CC
TTL/CMOS
LOGIC LEVELS
RS-232
LEVELS
R
1
R
2
+
C
3
(OPTIONAL CONNECTION, NOTE)
ICL3310
3
Absolute Maximum Ratings
Thermal Information
V
CC
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
T
IN
, SHDN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
R
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
25V
Output Voltages
T
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
13.2V
R
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V
CC
+0.3V
Short Circuit Duration
T
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical, Note 1)
JA
(
o
C/W)
18 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
75
Maximum Junction Temperature (Plastic Package) . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(Lead Tips Only)
Operating Conditions
ICL3310CX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
ICL3310IX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: V
CC
= 3V to 5.5V, C
1
- C
4
= 0.1
µ
F; Unless Otherwise Specified.
Typicals are at T
A
= 25
o
C
PARAMETER
TEST CONDITIONS
TEMP
(
o
C)
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Supply Current, Powerdown
SHDN = GND
25
-
0.1
10
µ
A
Full
-
-
50
µ
A
Supply Current, Enabled
All Outputs Unloaded, SHDN = V
CC
, V
CC
= 3.15V
Full
-
0.3
3.0
mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low
T
IN
, SHDN
Full
-
-
0.8
V
Input Logic Threshold High
T
IN
, SHDN
Full
2.4
-
-
V
Input Leakage Current
T
IN
, SHDN
Full
-
±
0.01
±
1.0
µ
A
Output Leakage Current
SHDN = V
CC
Full
-
±
0.05
±
10
µ
A
Output Voltage Low
I
OUT
= 3.2mA
Full
-
-
0.4
V
Output Voltage High
I
OUT
= -1.0mA
Full
V
CC
-0.6 V
CC
-0.1
-
V
RECEIVER INPUTS
Input Voltage Range
Full
-25
-
25
V
Input Threshold Low
V
CC
= 3.3V
25
0.6
1.2
-
V
V
CC
= 5.0V
Full
0.8
1.5
-
V
Input Threshold High
V
CC
= 3.3V
25
-
1.5
2.4
V
V
CC
= 5.0V
Full
-
1.8
2.4
V
Input Hysteresis
Full
0.2
0.5
1
V
Input Resistance
Full
3
5
7
k
TRANSMITTER OUTPUTS
Output Voltage Swing
All Transmitter Outputs Loaded with 3k
to Ground
Full
±
5.0
±
5.4
-
V
Output Resistance
V
CC
= V+ = V- = 0V, Transmitter Output =
±
2V
Full
300
10M
-
Output Short-Circuit Current
Full
±
7
±
35
-
mA
Output Leakage Current
V
OUT
=
±
12V, V
CC
= 0V or 3V to 5.5V, SHDN = GND
Full
-
-
±
10
µ
A
ICL3310
4
Detailed Description
ICL3310 interface ICs operate from a single +3V to +5.5V
supply, guarantee a 250kbps minimum data rate, require
only four small external 0.1
µ
F capacitors, feature low power
consumption, and meet all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, the transmitters, and the receivers.
Charge-Pump
Intersil's new ICL3310 utilizes regulated on-chip dual charge
pumps as voltage doublers, and voltage inverters to
generate
±
5.5V transmitter supplies from a V
CC
supply as
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the
±
10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1
µ
F capacitors for the
voltage doubler and inverter functions at V
CC
= 3.3V. See
the "Capacitor Selection" section, and Table 3 for capacitor
recommendations for other operating conditions. The charge
pumps operate discontinuously (i.e., they turn off as soon as
the V+ and V- supplies are pumped up to the nominal
values), resulting in significant power savings.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip
±
5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
All transmitter outputs disable and assume a high
impedance state when the device enters the powerdown
mode (see Table 2). These outputs may be driven to
±
12V
when disabled.
All devices guarantee a 250kbps data rate for full load
conditions (3k
and 1000pF), V
CC
3.0V, with one
transmitter operating at full speed. Under more typical
conditions of V
CC
3.3V, R
L
= 3k
, and C
L
= 250pF, one
transmitter easily operates at 900kbps.
TIMING CHARACTERISTICS
Maximum Data Rate
R
L
= 3k
,
C
L
= 1000pF, One Transmitter Switching
Full
250
500
-
kbps
Transmitter Propagation Delay
Transmitter Input to
Transmitter Output,
C
L
= 1000pF
t
PHL
Full
-
0.6
3.5
µ
s
t
PLH
Full
-
0.7
3.5
µ
s
Receiver Propagation Delay
Receiver Input to Receiver
Output, C
L
= 150pF
t
PHL
Full
-
0.2
1
µ
s
t
PLH
Full
-
0.3
1
µ
s
Transmitter Output Enable Time
From SHDN Rising Edge to T
OUT
=
±
3V
25
-
50
-
µ
s
Transmitter Output Disable Time
From SHDN Falling Edge to T
OUT
=
±
5V
25
-
600
-
ns
Transmitter Skew
t
PHL
- t
PLH
(Note 2)
25
-
100
-
ns
Receiver Skew
t
PHL
- t
PLH
25
-
100
-
ns
Transition Region Slew Rate
R
L
= 3k
to 7k
,
Measured From 3V to -3V
or -3V to 3V
V
CC
= 3.3V,
C
L
= 150pF to 2500pF
25
4
-
-
V/
µ
s
V
CC
= 4.5V,
C
L
= 150pF to 2500pF
25
6
-
-
V/
µ
s
ESD PERFORMANCE
RS-232 Pins (T
OUT
, R
IN
)
Human Body Model
25
-
±
15
-
kV
IEC1000-4-2 Contact Discharge
25
-
±
8
-
kV
IEC1000-4-2 Air Gap Discharge
25
-
>±
8
-
kV
All Other Pins
Human Body Model
25
-
±
3
-
kV
NOTE:
2. Transmitter skew is measured at the transmitter zero crossing points.
Electrical Specifications
Test Conditions: V
CC
= 3V to 5.5V, C
1
- C
4
= 0.1
µ
F; Unless Otherwise Specified.
Typicals are at T
A
= 25
o
C (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(
o
C)
MIN
TYP
MAX
UNITS
ICL3310
5
Transmitter inputs float if left unconnected (there are no pull-
up resistors), and may cause I
CC
increases. Connect
unused inputs to GND for the best performance.
Receivers
The ICL3310 contains standard inverting receivers that
three-state via the SHDN control line. Receivers driving
powered down peripherals must be disabled to prevent
current flow through the peripheral's protection diodes (see
Figures 2 and 3).
All the receivers convert RS-232 signals to CMOS output
levels and accept inputs up to
±
30V while presenting the
required 3k
to 7k
input impedance (see Figure 1) even if
the power is off (V
CC
= 0V). The receivers' Schmitt trigger
input stage uses hysteresis to increase noise immunity and
decrease errors due to slow input signal transitions.
Low Power Operation
This 3V device requires a nominal supply current of 0.3mA,
even at V
CC
= 5.5V, during normal operation (not in
powerdown mode). This is considerably less than the 11mA
current required by comparable 5V RS-232 devices,
allowing users to reduce system power simply by replacing
the old style device with the ICL3310.
Low Power, Pin Compatible Replacement
Pin compatibility with existing 5V products (e.g., MAX222),
coupled with the wide operating supply range, make the
ICL3310 a potential lower power, higher performance drop-
in replacement for existing 5V applications. As long as the
±
5V RS-232 output swings are acceptable, and transmitter
pull-up resistors aren't required, the ICL3310 should work in
most 5V applications.
When replacing a device in an existing 5V application, it is
acceptable to terminate C
3
to V
CC
as shown on the "Typical
Operating Circuit". Nevertheless, terminate C
3
to GND if
possible, as slightly better performance results from this
configuration.
Powerdown Functionality
The already low current requirement drops significantly
when the device enters powerdown mode. In powerdown,
supply current drops to 1
µ
A, because the on-chip charge
pump turns off (V+ collapses to V
CC
, V- collapses to GND),
and the transmitter and receiver outputs three-state. This
micro-power mode makes these devices ideal for battery
powered and portable applications.
Software Controlled (Manual) Powerdown
The ICL3310 may be forced into its low power, standby state
via a simple shutdown (SHDN) pin (see Figure 4). Driving
this pin high enables normal operation, while driving it low
forces the IC into it's powerdown state. The time required to
exit powerdown, and resume transmission is less than 50
µ
s.
Connect SHDN to V
CC
if the powerdown function isn't
needed.
TABLE 2. POWERDOWN AND ENABLE LOGIC TRUTH TABLE
SHDN
INPUT
TRANSMITTER
OUTPUTS
RECEIVER
OUTPUTS MODE OF OPERATION
H
Active
Active
Normal Operation
L
High-Z
High-Z
Manual Powerdown
R
XOUT
GND
V
ROUT
V
CC
5k
R
XIN
-25V
V
RIN
+25V
GND
V
CC
FIGURE 1. INVERTING RECEIVER CONNECTIONS
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
OLD
V
CC
POWERED
GND
SHDN = GND
V
CC
Rx
Tx
V
CC
CURRENT
V
OUT
=
V
CC
FLOW
RS-232 CHIP
DOWN
UART
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
ICL3310
TRANSITION
DETECTOR
R
X
T
X
V
CC
V
CC
TO
V
OUT
=
HI-Z
WAKE-UP
LOGIC
POWERED
DOWN
UART
V-
ICL3310
6
Capacitor Selection
The charge pumps require 0.1
µ
F or greater capacitors for
operation with 3.3V
V
CC
5.5V. Increasing the capacitor
values (by a factor of 2) reduces ripple on the transmitter
outputs and slightly reduces power consumption. C
2
, C
3
, and
C
4
can be increased without increasing C
1
's value, however,
do not increase C
1
without also increasing C
2
, C
3
, and C
4
to
maintain the proper ratios (C
1
to the other capacitors).
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor's equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
Power Supply Decoupling
In most circumstances a 0.1
µ
F bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple V
CC
to ground with a
capacitor of the same value as the charge-pump capacitor C
1
.
Connect the bypass capacitor as close as possible to the IC.
Transmitter Outputs when Exiting
Powerdown
Figure 5 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3k
in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
High Data Rates
The ICL3310 maintain the RS-232
±
5V minimum transmitter
output voltages even at high data rates. Figure 6 details a
transmitter loopback test circuit, and Figure 7 illustrates the
loopback test result at 120kbps. For this test, all transmitters
were simultaneously driving RS-232 loads in parallel with
1000pF, at 120kbps. Figure 8 shows the loopback results for
a single transmitter driving 1000pF and an RS-232 load at
250kbps. The static transmitters were also loaded with an
RS-232 receiver.
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN
PWR
SHDN
CPU
I/O
ICL3310
MGT
LOGIC
UART
FIGURE 6. TRANSMITTER LOOPBACK TEST CIRCUIT
TIME (20
µ
s/DIV.)
T1
T2
2V/DIV.
5V/DIV.
V
CC
= +3.3V
SHDN
FIGURE 5. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
C1 - C4 = 0.1
µ
F
ICL3310
V
CC
C
1
C
2
C
4
C
3
+
+
+
+
1000pF
V+
V-
5k
T
IN
R
OUT
C1+
C1-
C2+
C2-
R
IN
T
OUT
+
V
CC
0.1
µ
F
V
CC
SHDN
ICL3310
7
Interconnection with 3V and 5V Logic
The ICL3310 directly interface with most 5V logic families,
including ACT and HCT CMOS. See Table 3 for more
information on possible combinations of interconnections.
FIGURE 7. LOOPBACK TEST AT 120kbps
FIGURE 8. LOOPBACK TEST AT 250kbps
T1
IN
T1
OUT
R1
OUT
5
µ
s/DIV.
V
CC
= +3.3V
5V/DIV.
C1 - C4 = 0.1
µ
F
T1
IN
T1
OUT
R1
OUT
2
µ
s/DIV.
5V/DIV.
V
CC
= +3.3V
C1 - C4 = 0.1
µ
F
TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
SYSTEM
POWER-SUPPLY
VOLTAGE
(V)
V
CC
SUPPLY
VOLTAGE
(V)
COMPATIBILITY
3.3
3.3
Compatible with all CMOS families.
5
5
Compatible with all TTL and CMOS
logic families.
5
3.3
Compatible with ACT and HCT
CMOS, and with TTL. Incompatible
with AC, HC, or CD4000 CMOS.
Typical Performance Curves
V
CC
= 3.3V, T
A
= 25
o
C
FIGURE 9. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
FIGURE 10. SLEW RATE vs LOAD CAPACITANCE
-6.0
-4.0
-2.0
0
2.0
4.0
6.0
1000
2000
3000
4000
5000
0
LOAD CAPACITANCE (pF)
TRANSMITT
E
R
OU
TP
UT
VOL
T
AGE (V)
1 TRANSMITTER AT 250kbps
V
OUT
+
V
OUT
-
1 TRANSMITTER AT 30kbps
LOAD CAPACITANCE (pF)
SLE
W
R
A
TE
(
V
/
µ
s)
0
1000
2000
3000
4000
5000
5
10
15
20
25
+SLEW
-SLEW
ICL3310
8
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
338
PROCESS:
Si Gate CMOS
FIGURE 11. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 12. SUPPLY CURRENT vs SUPPLY VOLTAGE
Typical Performance Curves
V
CC
= 3.3V, T
A
= 25
o
C (Continued)
0
5
10
15
20
25
30
45
35
40
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
S
U
PPLY CURRENT
(mA)
20kbps
250kbps
120kbps
SUPP
L
Y
CURRENT
(m
A)
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
0
0.5
1.0
1.5
2.0
SUPPLY VOLTAGE (V)
2.5
3.0
3.5
NO LOAD
ALL OUTPUTS STATIC
ICL3310
9
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
ICL3310
Small Outline Plastic Packages (SOIC)
NOTES:
1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension "E" does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
INDEX
AREA
E
D
N
1
2
3
-B-
0.25(0.010)
C A
M
B S
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45
o
C
H
µ
0.25(0.010)
B
M
M
M18.3
(JEDEC MS-013-AB ISSUE C)
18 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.013
0.0200
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.4469
0.4625
11.35
11.75
3
E
0.2914
0.2992
7.40
7.60
4
e
0.050 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.010
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
N
18
18
7
0
o
8
o
0
o
8
o
-
Rev. 0 12/93
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