4-1230

August 1997

HI2300

8-Bit, 18 MSPS, Video A/D Converter

with 3.3V Power Supply Operation

Features

ˇ Resolution . . . . . . . . . . . . . . . . . . . . 8-Bit

LSB (DL)

ˇ Maximum Sampling Frequency . . . . . . . . . . . 18 MSPS

ˇ Low Power Consumption at 18 MSPS (Typ)

(Reference Current Excluded) . . . . . . . . . . . . . . .18mW

ˇ Synchronizing Clamp Function

ˇ Clamp ON/OFF Function

ˇ Reference Voltage Self-Bias Circuit

ˇ Input CMOS Compatible

ˇ Three-State TTL Compatible Output

ˇ Power Supply . . . . . . . . . . . . . . . . . . . . . . . . 3.3V Single

ˇ Low Input Capacitance . . . . . . . . . . . . . . . . . . . . . . . 8pF

ˇ Reference Impedance . . . . . . . . . . . . . . . . . . 330

(Typ)

ˇ Direct Replacement for Sony CXD2300

Applications

ˇ Portable Equipment

ˇ Hand-Held Instruments

Description

The HI2300 is an 8-bit, CMOS A/D converter for video with
synchronizing clamp function and can operate on 3.3V
power supply. The adoption of 2 step-parallel method
achieves ultra-low power consumption and a maximum
conversion speed of 18 MSPS.

Pinout

HI2300

(MQFP)

TOP VIEW

Ordering Information

PART

NUMBER

TEMP.

RANGE (

PACKAGE

PKG. NO.

HI2300JCQ

-40 to 85

32 Ld MQFP

Q32.7x7-S

CLP

TEST

CLK

TEST

RBS

REF

CCP

CLE

D0
D1
D2
D3
D4
D5
D6
D7

RTS

1
2
3
4
5
6
7
8

3231 30 29 28 27 26 25

File Number

4103.1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Copyright Š Intersil Corporation 1999

4-1231

Functional Block Diagram

LOWER

DATA

LATCH

LOWER ENCODER

(4-BIT)

LOWER SAMPLING

COMPARATOR (4-BIT)

REFERENCE

SUPPLY

UPPER

DATA

LATCH

LOWER SAMPLING

COMPARATOR (4-BIT)

LOWER ENCODER

(4-BIT)

UPPER ENCODER

(4-BIT)

UPPER SAMPLING

COMPARATOR (4-BIT)

CLOCK

M - M

D0 (LSB)

D7 (MSB)

TEST

(DV

)

CLK

TEST

(OPEN)

RBS

RTS

CLP

TEST
(V

OR V

)

TEST
(V

OR V

)

CLE

CCP

REF

GENERATOR

HI2300

4-1233

Analog Input.

BRS

Generates approximately +0.4V when shorted
with V

REF

Clamp Reference Voltage Input. Clamps so
that the reference voltage and the input signal
during clamp interval are equal.

CCP

Integrates the clamp control voltage. The
relationship between the changes in CCP
voltage and in V

voltage is positive phase.

28, 31

Digital Ground.

CLE

The clamp function is enabled when
CLE = Low.
The clamp function is set to off and the
converter functions as a normal A/D converter
when CLE = High.
The clamp pulse can be measured by
connecting

CLE to DV

through a

several-hundred-ohm resistor.

Data is output when OE = Low. Pins D0 to D7
are at high impedance when OE = High.

No Connect pin.

Pin Descriptions

(Continued)

PIN NUMBER

SYMBOL

EQUIVALENT CIRCUIT

DESCRIPTION

CLAMP

PULSE

HI2300

4-1234

Absolute Maximum Ratings

= 25

Thermal Information

Supply Voltage (V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V

Reference Voltage (V

, V

) . . . . . . . . . .V

+0.5V to V

- 0.5V

Input Voltage, Analog (V

) . . . . . . . . . . . .V

+0.5V to V

- 0.5V

Input Voltage, Digital (V

, V

) . . . . . . . . .V

+0.5V to V

- 0.5V

Output Voltage, Digital (V

, V

) . . . . . .V

+0.5V to V

- 0.5V

Thermal Resistance (Typical, Note 1)

(

C/W)

MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .

122

Maximum Junction Temperature (Plastic Package) . . . . . . . . 150

Maximum Storage Temperature Range . . . . . . . . . .-65

C to 150

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300

(MQFP - Lead Tips Only)

Recommended Operating Conditions

Temperature Range (t

OPR

) . . . . . . . . . . . . . . . . . . . -40

C to 85

Supply Voltage (IDV

- AV

I). . . . . . . . . . . . . . . . . . . 0 to 100mV

Power Supply (DV

, DV

)(AV

, AV

). . . . . . . . .3.14V to 4.0V

Reference Input Voltage (V

). . . . . . . . . . . . . . . . . . . . . . . . . 0.4V

) . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8V

Analog Input (ADIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . V

to V

Clock Pulse width (t

PW1

) . . . . . . . . . . . . . . . . . . . . . . . . 27ns (Min)

PW0

). . . . . . . . . . . . . . . . . . . . . . . . . 27ns (Min)

CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications

When using a single power supply; f

= 18 MSPS, V

= 3.3V, V

= 0V, V

= 1.5V,

= 25

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Maximum Conversion Rate

Max

= 0 to 1.5V

MSPS

Minimum Conversion Rate

Min

= 1kHz Ramp

0.5

MSPS

Supply Current

= 18 MSPS, NTSC Ramp Wave Input

5.5

Reference Pin Current

REF

3.3

4.6

6.6

Analog Input Band Width

= 1.4V

P-P

, 17.9MHz

-.9

Analog Input Capacitance

= 0.75V + 0.07 V

RMS

Reference Resistance (V

to V

)

REF

230

330

440

Self Bias I

RB1

Shorts V

and V

RBS

0.33

0.36

0.39

RT1

- V

RB1

Shorts V

and V

RTS

1.30

1.39

1.48

Offset Voltage

-45

-25

-5

Digital Input Voltage

2.5

0.5

Digital Input Current

= Max

= V

= 0V

Digital Output Current

OE = V

= Min

= V

- 0.5V

-1.0

= 0.4V

3.3

Digital Output Current

OZH

OE = V

= Max

= V

OZL

= 0V

Output Data Delay

With TTL 1 Gate and 10pF Load

Three-State Output Enable Time

PZH

= 1k

, C

= 20pF, OE = 3V

PZL

Three-State Output Disable Time

PHZ

= 1k

, C

= 20pF, OE = 0V

PLZ

Integral Nonlinearity Error

= 18 MSPS

= 0 to 1.5V

+0.5

1.3

LSB

Differential Nonlinearity Error

= 18 MSPS

= 0 to 1.5V

0.3

0.5

LSB

Aperture Jitter

Sampling Delay

Clamp Offset Voltage

= DC

REF

= 0.5V

-20

+20

PWS = 3

REF

= 1.5V

-30

-10

+10

Clamp Pulse Delay

CPD

HI2300

Part Number HI2300