2-1

File Number

4634.5

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

Intersil and Design is a trademark of Intersil Corporation.

Intersil Corporation 2000

PRISMŽ is a registered trademark of Intersil Corporation. PRISM logo is a trademark of Intersil Corporation.

HFA3683A

2.4GHz RF/IF Converter and Synthesizer

The HFA3683A is a monolithic SiGe
half-duplex RF/IF transceiver designed
to operate in the 2.4GHz ISM band.
The receive chain features a low noise,
gain selectable amplifier (LNA) followed

by a down-converter mixer. An up-converter mixer and a
high performance preamplifier compose the transmit chain.
The remaining circuitry comprises a high frequency Phase
Locked Loop (PLL) synthesizer with a three wire
programmable interface for local oscillator applications.

A reduced filter count is realized by multiplexing the receive
and transmit IF paths and by sharing a common differential
matching network. Furthermore, both transmit and receive
RF amplifiers can be directly connected to mixers. The
inherent image rejection of both the transmit and receive
functions allow this economic advantage.

The HFA3683A is housed in a 64 lead TQFP package well
suited for PCMCIA board applications.

Simplified Block Diagram

Features

ˇ Highly Integrated

ˇ Multiplexed RX/TX IF Path Utilizes Single IF Filter

ˇ Programmable Synthesizer

ˇ Gain Selectable LNA

ˇ Power Management/Standby Mode

ˇ Single Supply 2.7V to 3.3V Operation

Cascaded LNA/Mixer (High Gain)

ˇ Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25dB

ˇ SSB Noise Figure. . . . . . . . . . . . . . . . . . . . . . . . . . . 3.7dB

ˇ Input IP3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -13dBm

ˇ IF Frequency . . . . . . . . . . . . . . . . . . . 280MHz to 600MHz

Cascaded LNA/Mixer (Low Gain)

ˇ Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5dB

ˇ Input P1dB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.5dBm

ˇ IF Frequency . . . . . . . . . . . . . . . . . . . 280MHz to 600MHz

Cascaded Mixer/Preamplifier

ˇ Transmit Cascaded Mixer/Preamplifier Gain . . . . . . .25dB

ˇ SSB Noise Figure. . . . . . . . . . . . . . . . . . . . . . . . . . . .10dB

ˇ Output P1dB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4dBm

ˇ IF Frequency . . . . . . . . . . . . . . . . . . . 280MHz to 600MHz

Applications

ˇ IEEE802.11 1MBPS and 2MBPS Standard

ˇ Systems Targeting IEEE802.11, 11MBPS Standard

ˇ Wireless Local Area Networks

ˇ PCMCIA Wireless Transceivers

ˇ ISM Systems

ˇ TDMA Packet Protocol Radios

Ordering Information

PART

NUMBER

TEMP. RANGE

(

PACKAGE

PKG. NO.

HFA3683AIN

-40 to 85

64 Ld TQFP

Q64.10x10

HFA3683AIN96

-40 to 85

Tape and Reel

RX_MX_OUT

PLL

MODULE

LO_IN

RX_MX_IN

RF_OUT

H/L

RX_IN

INTERFACE

TXA_OUT

TXA_IN

REF_IN

TX_MX_OUT

TX_MX_IN

CP_DO

Data Sheet

June 2000

2-2

Pinout

HFA3683A

(TQFP)

TOP VIEW

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

GND

COL_OUT

GND

RF_OUT

GND

T_RES2

BIAS2_VCC1

T_RES

T_RES1

GND

PRE_VCC1

GND

RX_MX_IN

GND

TX_MX_IN+

RX_MX_OUT+

GND

LNA_VCC1

GND

RX_IN

GND

BIAS1_VCC1

TX_VCC1

GND
GND
GND

PE2
PE1

GND

TXA_OUT

GND

TXA_IN

CLK

REF_BY

REF_IN

GND

SYN_VCC2

GND

CP_VCC2

CP_D0

GND

H/L

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

RX_MX_OUT-
TX_MX_IN-
GND
RX_LO_DRIVER_VCC1
GND
LO_VCC1
GND
LO_IN-
LO_IN+
GND
TX_LO_DRIVER_VCC1

TX_MX_VCC1
TX_MX_VCC1
TX_MX_VCC1
TX_MX_OUT
TX_MX_VCC1

Pin Description

PIN

NAME

DESCRIPTION

LNA_VCC1

Low Noise Amplifier Positive Power Supply.

RX_IN

Low Noise Amplifier RF Input, internally DC coupled and requires an external blocking capacitor. A shunt capacitor to
ground matches the input for return loss and optimum NF.

BIAS1_VCC1

Bias Positive Power Supply for the LNA and Preamplifier.

H/L

High or Low Gain Select, controls the LNA high and low gain modes.

PE2

This pin along with pin PE1 and bit M(0) of PLL_PE determine which of various operational modes will be active. Please
refer to the Power Enable Truth Table.

PE1

This pin along with pin PE2 and bit M(0) of PLL_PE determine which of various operational modes will be active. Please
refer to the Power Enable Truth Table.

TX_VCC1

Transmit Amplifier Positive Power Supply, requires a high quality decoupling capacitor and a short return path.

TXA_OUT

Transmit Amplifier Output, internally matched to 50

, requires an external DC blocking capacitor.

TX_VCC1

Transmit Amplifier Positive Power Supply.

TXA_IN

Transmit Amplifier Input, internally AC coupled.

Synthesizer Latch Enable, the serial interface is active when LE is low and the serial data is latched into defined
registers on the rising edge of LE.

DATA

Synthesizer Serial Data Input, clocked in on the rising edge of the serial clock, MSB first.

CLK

Synthesizer Clock, DATA is clocked in on the rising edge of the serial clock, MSB first.

REF_BY

Synthesizer Reference Frequency Input Bypass, internally DC coupled and requires an external bypass to ground
when REF_IN is used as a Single Ended input, alternatively, requires an external AC coupling capacitor when used as
a differential input.

REF_IN

Synthesizer Reference Frequency Input, internally DC coupled and requires an external AC coupling capacitor.

HFA3683A

2-3

SYN_VCC2

Synthesizer Positive Power Supply.

CP_VCC2

Synthesizer Charge Pump Positive Power Supply.

CP_DO

Synthesizer Charge Pump Output, feeds the PLL loop filter.

Synthesizer Lock Detect Output.

TX_MX_VCC1

Transmit Mixer Positive Power Supply.

TX_MX_OUT

Transmit Mixer RF output, internal AC coupled and internally matched to 50

TX_MX_VCC1

Transmit Mixer Positive Power Supply.

TX_MX_VCC1

Transmit Mixer Positive Power Supply.

TX_MX_VCC1

Transmit Mixer Positive Power Supply.

TX_LO_Driver_

VCC1

Transmit LO Driver Positive Power Supply.

LO_IN+

Local Oscillator Positive Input, internally AC coupled, internally matched to 50

when the LO is driven single ended

and the LO_IN- is grounded.

LO_IN-

Local Oscillator Negative Input, internally AC coupled, differential or single ended capability, ground externally for single
ended operation.

LO_VCC1

LO Buffer Positive Power Supply.

RX_LO_DRIVER

_VCC1

Receiver LO Driver Positive Power Supply.

TX_MX_IN-

Transmit Mixer Negative Input, internally DC coupled, high impedance input. Designed to share a common IF matching
network/IF SAW filter with the receive mixer. Care should be exercised regarding the PC board layout to avoid
interference and noise pickup. Layout symmetry and management of PC board parasitics is also critical for maximizing
the bandwidth of the IF matching network.

RX_MX_OUT-

Receive Mixer Negative Output, open collector, high impedance output. Designed to share a common IF matching
network/IF SAW filter with the transmit mixer. Care should be exercised regarding the PC board layout to avoid
interference and noise pickup. Layout symmetry and management of PC board parasitics is also critical for maximizing
the bandwidth of the IF matching network.

RX_MX_OUT+

Receive Mixer Positive Output, open collector, high impedance output. Designed to share a common IF matching
network/IF SAW filter with the transmit mixer. Care should be exercised regarding the PC board layout to avoid
interference and noise pickup. Layout symmetry and management of PC board parasitics is also critical for maximizing
the bandwidth of the IF matching network.

TX_MX_IN+

Transmit Mixer Positive Input, internally DC coupled, high impedance input. Designed to share a common IF matching
network/IF SAW filter with the receive mixer. Care should be exercised regarding the PC board layout to avoid
interference and noise pickup. Layout symmetry and management of PC board parasitics is also critical for maximizing
the bandwidth of the IF matching network.

RX_MX_IN

Receive Mixer RF Input, internally DC coupled and requires external AC coupling as well as RF matching. The
recommend network consists of a 3.3pF series capacitor followed by a small series inductance of 1.4nH and then a
1.2nH shunt inductor. The series inductance is best implemented on the PC board using a narrow transmission line
inductor.

PRE_VCC1

PLL Prescaler Positive Power Supply.

ITAT_RES1

Connection to external resistor sets the receive and transmit mixers tail currents, independent of Absolute Temperature.

PTAT_RES

Connection to external resistor sets the receive and transmit mixers tail currents, proportional to Absolute Temperature.

BIAS2_VCC1

Bias Positive Power Supply for the receive and transmit mixers.

ITAT_RES2

Connection to external resistor sets the LNA and Preamplifier bias currents, independent of Absolute Temperature.

RF_OUT

Low Noise Amplifier RF Output, internally AC coupled and internally matched to 50

COL_OUT

LNA Collector Output, requires a bypass capacitance which is resonant with the PC board parasitics. A small resistance
(20

)

in series with the main PC board VCC buss is recommended to provide isolation from other VCC bypass

capacitors. This ensures the image rejection performance of the LNA is maintained.

All

Others

GND

Circuit Ground Pins (Quantity 23 each).

Pin Description

(Continued)

PIN

NAME

DESCRIPTION

HFA3683A

2-4

Absolute Maximum Ratings

Thermal Information

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6V
Voltage on Any Other Pin. . . . . . . . . . . . . . . . . . . -0.3 to V

+0.3V

to V

Decouple . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +0.3V

Any GND to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +0.3V
Pins 4, 19, 52, 56, 57 and 59 . . . . . . . . . . . . . . . . . . . . . 0.3 to +0.6V

Operating Conditions

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to 85

Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 3.3V

Thermal Resistance (Typical, Note 1)

(

C/W)

TQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum Junction Temperature (Plastic Package) . . . . . . . . .150

Maximum Storage Temperature Range . . . . . . . . . . -65

C to 150

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300

(TQFP - Lead Tips Only)

CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

is measured with the component mounted on an evaluation PC board in free air.

General Electrical Specifications

PARAMETER

TEMP.

(

MIN

TYP

MAX

UNITS

Supply Voltage

Full

2.7

3.3

Receive Total Supply Current (LNA in High Gain)

Receive Total Supply Current (LNA in Low Gain)

Transmit Total Supply Current

Standby Total Supply Current (PLL and LO Buffers Active)

TX/RX Power Down Supply Current

Full

100

TX/RX/Power Down Time (Note 2)

Full

RX/TX, TX/RX Switching Time (Note 2)

Full

0.2

CMOS Low Level Input Voltage (CLK, DATA, LE) (Note 3)

Full

0.3V

CMOS High Level Input Voltage (CLK, DATA, LE) (Note 3)

Full

0.7V

3.6

CMOS High or Low Level Input Current (CLK, DATA, LE)

Full

-3.0

+3.0

Control Logic Low Level Input Voltage (H/L, PE1, PE2) (Note 4)

Full

-0.3

0.5

Control Logic High Level Input Voltage (H/L, PE1, PE2) (Notes 3 and 4)

Full

DD-0.5

NOTES:

2. TX/RX/TX switching time and power Down/Up time are dependent on external components.

3. V

is the supply voltage of external Control sources.

4. These three pins H/L, PE1 and PE2 are not connected to CMOS circuitry and have different thresholds from all other control pins.

Cascaded LNA/Mixer AC Electrical Specifications

Assumes a direct connection between the LNA and Mixer, IF = 374MHz,
LO = 2075MHz at -6dBm, V

= 2.7 Unless Otherwise Specified

PARAMETER

TEST CONDITIONS

TEMP.

(

MIN

TYP

MAX

UNITS

RF Frequency Range

Full

2400

2500

MHz

IF Frequency Range

Full

280

374

600

MHz

LO Frequency Range

Full

1800

2220

MHz

LO Input Drive Level

Single End or Differential

Full

-10

-6

dBm

Power/Voltage Gain

High Gain Mode

Full

21.5

Noise Figure SSB

Full

3.7

5.0

Input IP3

Full

-17.5

-11

dBm

Input P1dB

Full

-27.5

-22

dBm

HFA3683A

2-5

Power/Voltage Gain

Low Gain Mode

Full

-9

-5

-1

Noise Figure

Output IM3 at -4dBm Input Tones

Full

-42

-40.5

-40

dBc

Input P1dB

Full

-1

+2.5

dBm

LNA Input 50

VSWR

High Gain Mode

1.28

1.65:1

2.0:1

Low Gain Mode

1.1:1

1.3:1

2.0:1

LO 50

VSWR

LO = Single End

1.4:1

2.0:1

Differential IF Output Load

Shared with TX

200

IF Output Capacitance (Single Ended)

1.2

IF Output Resistance (Single Ended)

5.5

LO to Mixer RF Feedthrough (Uncascaded)

-50

-20

dBm

LO to LNA Input Feedthrough (Cascaded, no filter)

-69

-60

-50

dBm

Gain Switching Speed at Full Scale - High to Low

1dB settling

Full

0.03

0.1

Gain Switching Speed at Full Scale - Low to High

1dB settling

Full

0.25

0.3

Image Rejection

With Matching Network

Cascaded LNA/Mixer AC Electrical Specifications

Assumes a direct connection between the LNA and Mixer, IF = 374MHz,
LO = 2075MHz at -6dBm, V

= 2.7 Unless Otherwise Specified (Continued)

PARAMETER

TEST CONDITIONS

TEMP.

(

MIN

TYP

MAX

UNITS

Cascaded Transmit Mixer AC Electrical Specifications

Assumes a direct connection between the Mixer and Preamplifier,
F = 374MHz, LO = 2075MHz at -6dBm, VCC = 2.7 Unless Otherwise
Specified.

PARAMETER

TEST CONDITIONS

TEMP.

(

MIN

TYP

MAX

UNITS

RF Frequency Range

Full

2400

2500

MHz

IF Frequency Range

Full

280

374

600

MHz

LO Frequency Range

Full

1800

2220

MHz

Power Conversion Gain

200

In, 50

Out

Full

SSB Noise Figure

Full

Output IP3

Full

+12

+14

+20

dBm

Output P1dB

Full

dBm

LO Input Drive Level

Same as RX

Full

-10

-6

dBm

LO to Transmit Mixer RF Feedthrough (Uncascaded)

-37

-20

dBm

LO to Transmit Amp. Output Feedthrough
(Uncascaded)

-45

-30

dBm

LO to Transmit Amp. Output Feedthrough
(Cascaded, no filter)

-15

-5

dBm

Preamplifier Output 50

VSWR

2.3:1

3.0:1

LO 50

VSWR

LO = Single End

1.4:1

2.0:1

Differential IF Input Load

Shared with RX

200

IF Input Capacitance (Single Ended)

1.1

IF Input Resistance (Single Ended)

0.7

HFA3683A

Part Number HFA3683A