CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

HC5517

3 REN Ringing SLIC For ISDN Modem/TA
and WLL

he HC5517 is a ringing SLIC designed to accommodate a wide
variety of local loop applications. The various applications
include, basic POTS lines with answering machines and fax
capabilities, ISDN networks, wireless local loop, and hybrid
fiber coax (HFC) terminals. The HC5517 provides a high
degree of flexibility with open circuit tip to ring DC voltages, user
defined ringing waveforms (sinusoidal to square wave), ring trip
detection thresholds and loop current limits that can be tailored
for many applications. Additional features of the HC5517 are
complex impedance matching, pulse metering and transhybrid
balance. The HC5517 is designed for use in systems where a
separate ring generator is not economically feasible.

The device is manufactured in a high voltage Dielectric Isolation
(DI) process with an operating voltage range from -16V, for off-
hook operation and -80V for ring signal injection. The DI
process provides substrate latch up immunity, resulting in a
robust system design. Together with a secondary protection
diode bridge and "feed" resistors, the device will withstand
1000V lightning induced surges, in a plastic package.

A thermal shutdown with an alarm output and line fault
protection are also included for operation in harsh
environments.

Features

· Thru-SLIC Open Circuit Ringing Voltage up to

77V

PEAK

/54V

RMS

, 3 REN Capability at 44V

RMS

· Sinusoidal Ringing Capability

· DI Process Provides Substrate Latch Up Immunity when

Driving Inductive Ringers

· Adjustable On-Hook Voltage for Fax and Answering

Machine Compatibility

· Resistive and Complex Impedance Matching

· Programmable Loop Current Limit

· Switch Hook and Adjustable Ring Trip Detection

· Pulse Metering Capability

· Single Low Voltage Positive Supply (+5V)

Applications

· Solid State Line Interface Circuit for Wireless Local Loop,

Hybrid Fiber Coax, Set Top Box, Voice/Data Modems

· Related Literature

- AN9606, Operation of the HC5517 Evaluation Board

- AN9607, Impedance Matching Design Equations

- AN9628, AC Voltage Gain

- AN9608, Implementing Pulse Metering

- AN9636, Implementing an Analog Port for ISDN Using

the HC5517

- AN549, The HC-5502S/4X Telephone Subscriber Line

Interface Circuits (SLIC)

Block Diagram

Ordering Information

PART

NUMBER

TEMP. RANGE

(

PACKAGE

PKG. NO.

HC5517IM

-40 to 85

28 Ld PLCC

N28.45

HC5517CM

0 to 75

28 Ld PLCC

N28.45

HC5517IB

-40 to 85

28 SOIC

M28.3

HC5517CB

0 to 75

28 SOIC

M28.3

TIP FEED

TIP SENSE

RING FEED

RING SENSE 2

BAT

AGND

BGND

4-WIRE

INTERFACE

BIAS

- IN 1

OUT 1

RING

LOOP CURRENT

DETECTOR

SHD

RTD

ALM
I

LMT

FAULT

DETECTOR

CURRENT

LIMIT

TST

RDI

IIL LOGIC INTERFACE

REF

RELAY

DRIVER

RDO

2-WIRE

INTERFACE

RTI

RING TRIP

DETECTOR

RING SENSE 1

Data Sheet

July 1998

File Number

4147.2

Absolute Maximum Ratings

= 25

Thermal Information

Maximum Supply Voltages

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V

)-(V

BAT

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .90V

Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +15V

Operating Conditions

Operating Temperature Range

HC5517IM, HC5517IB . . . . . . . . . . . . . . . . . . . . . . -40

C to 85

HC5517CM, HC5517CB . . . . . . . . . . . . . . . . . . . . . . 0

C to 75

Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V to +12V
Positive Power Supply (V

) . . . . . . . . . . . . . . . . . . . . . . . +5V

Negative Power Supply (V

BAT

) . . . . . . . . . . . . . . . . . . .-16V to -80V

Thermal Resistance (Typical, Note 1)

(

C/W)

PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum Junction Temperature Plastic . . . . . . . . . . . . . . . . .150

Maximum Storage Temperature Range . . . . . . . . . . -65

C to 150

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300

(SOIC, PLCC - Lead Tips Only)

Die Characteristics

Transistor Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
Diode Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 x 120
Substrate Potential. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

BAT

Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI
ESD (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . . . . . . .500V

CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

is measured with the component mounted on an evaluation PC board in free air.

2. All grounds (AGND, BGND) must be applied before V

or V

BAT

. Failure to do so may result in premature failure of the part. If a user wishes

to run separate grounds off a line card, the AG must be applied first.

Electrical Specifications

Unless Otherwise Specified, Typical Parameters are at T

= 25

C, Min-Max Parameters are over

Operating Temperature Range, V

BAT

= -24V, V

= +5V, AGND = BGND = 0V. All AC Parameters are specified

at 600

2-Wire terminating impedance.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

RINGING TRANSMISSION PARAMETERS

RING

Input Impedance

(Note 3)

5.4

4-Wire to 2-Wire Gain

RING

to Vt-r (Note 3)

V/V

AC TRANSMISSION PARAMETERS

RX Input Impedance

300Hz to 3.4kHz (Note 3)

108

TX Output Impedance

300Hz to 3.4kHz (Note 3)

4-Wire Input Overload Level

300Hz to 3.4kHz R

= 1200

, 600

Reference

(Note 3)

+1.0

PEAK

2-Wire Return Loss

Matched for 600

(Note 3)

SRL LO

ERL

SRL HI

2-Wire Longitudinal to Metallic Balance
Off Hook

Per ANSI/IEEE STD 455-1976 (Note 3)
300Hz to 3400Hz

4-Wire Longitudinal Balance Off Hook

300Hz to 3400Hz (Note 3)

Low Frequency Longitudinal Balance

LINE

= 40mA T

= 25

C (Note 3)

dBrnC

Longitudinal Current Capability

LINE

= 40mA T

= 25

C (Note 3)

RMS

Insertion Loss

0dBm at 1kHz, Referenced 600

2-Wire/4-Wire (Includes external transhybrid
amplifier with a gain of 3)

0.05

0.2

4-Wire/2-Wire

0.05

0.2

4-Wire/4-Wire (Includes external transhybrid
amplifier with a gain of 3)

0.25

HC5517

Frequency Response

300Hz to 3400Hz (Note 3) Referenced to
Absolute Level at 1kHz, 0dBm Referenced 600

0.02

0.06

Level Linearity

Referenced to -10dBm (Note 3)

2-Wire to 4-Wire and 4-Wire to 2-Wire

+3 to -40dBm

0.08

-40 to -50dBm

0.12

-50 to -55dBm

0.3

Absolute Delay

(Note 3)

2-Wire/4-Wire

300Hz to 3400Hz

1.0

4-Wire/2-Wire

300Hz to 3400Hz

1.0

4-Wire/4-Wire

300Hz to 3400Hz

0.95

1.5

Transhybrid Loss

= 1V

P-P

at 1kH (Notes 3, 4)

Total Harmonic Distortion
2-Wire/4-Wire, 4-Wire/2-Wire, 4-Wire/4-Wire

Reference Level 0dBm at 600

300Hz to 3400Hz (Note 3)

-50

Idle Channel Noise
2-Wire and 4-Wire

(Note 3)
C-Message

dBrnC

Psophometric (Note 3)

-87

dBmp

Power Supply Rejection Ratio

(Note 3)
30Hz to 200Hz, R

= 600

to 2-Wire

to 4-Wire

BAT

to 2-Wire

BAT

to 4-Wire

to 2-Wire

(Note 3)
200Hz to 16kHz, R

= 600

to 4-Wire

BAT

to 2-Wire

BAT

to 4-Wire

DC PARAMETERS

Loop Current Programming

Limit Range

(Note 5)

Accuracy

Loop Current During Power Denial

= 200

Fault Currents

TIP to Ground (Note 3)

RING to Ground

120

TIP and RING to Ground (Note 3)

150

Switch Hook Detection Threshold

Ring Trip Comparator Voltage Threshold

-0.28

-0.24

-0.22

Thermal ALARM Output (Note 3)

Safe Operating Die Temperature Exceeded

140

160

Electrical Specifications

Unless Otherwise Specified, Typical Parameters are at T

= 25

C, Min-Max Parameters are over

Operating Temperature Range, V

BAT

= -24V, V

= +5V, AGND = BGND = 0V. All AC Parameters are specified

at 600

2-Wire terminating impedance. (Continued)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

HC5517

Dial Pulse Distortion (Note 3)

0.1

0.5

Uncommitted Relay Driver

On Voltage V

(RDO) = 30mA

0.2

0.5

Off Leakage Current

100

TTL/CMOS Logic Inputs (F0, F1, RS, TST, RDI)

Logic `0' V

0.8

Logic `1' V

2.0

5.5

Input Current (F0, F1, RS, TST, RDI)

IIH, 0V

-1

Input Current (F0, F1, RS, TST, RDI)

IIL, 0V

-100

Logic Outputs

Logic `0' V

LOAD

= 800

0.1

0.5

Logic `1' V

LOAD

= 40

2.7

Power Dissipation On Hook

= +5V, V

BAT

= -80V, R

LOOP

300

= +5V, V

BAT

= -48V, R

LOOP

150

Power Dissipation Off Hook

= +5V, V

BAT

= -24V, R

LOOP

= 600

= 25mA

280

= +5V, V

BAT

= -80V, R

LOOP

= +5V, V

BAT

= -48V, R

LOOP

= +5V, V

BAT

= -24V, R

LOOP

1.9

BAT

= +5V, V

- = -80V, R

LOOP

3.6

= +5V, V

- = -48V, R

LOOP

2.6

= +5V, V

- = -24V, R

LOOP

1.8

UNCOMMITTED OP AMP PARAMETERS

Input Offset Voltage

Input Offset Current

Differential Input Resistance (Note 3)

Output Voltage Swing (Note 3)

= 10k

P-P

Small Signal GBW (Note 3)

MHz

NOTES:

3. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial

design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and specification com-
pliance.

4. For transhybrid circuit as shown in Figure 10.

5. Application limitation based on maximum switch hook detect limit and metallic currents. Not a part limitation.

Electrical Specifications

Unless Otherwise Specified, Typical Parameters are at T

= 25

C, Min-Max Parameters are over

Operating Temperature Range, V

BAT

= -24V, V

= +5V, AGND = BGND = 0V. All AC Parameters are specified

at 600

2-Wire terminating impedance. (Continued)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

HC5517

Functional Diagram

PLCC/SOIC

Over Voltage Protection and Longitudinal Current
Protection

The SLIC device, in conjunction with an external protection
bridge, will withstand high voltage lightning surges and
power line crosses.

High voltage surge conditions are as specified in Table 1.

The SLIC will withstand longitudinal currents up to a
maximum or 30mA

RMS

, 15mA

RMS

per leg, without any

performance degradation

HC5517 TRUTH TABLE

ACTION

Loop power Denial Active

Power Down Latch RESET

Power on RESET

RD Active

Normal Loop feed

REF

VRX

OUT 1

R/20

R/2

TIP

90K

RING

4.5K

25K

100K

4.5K

90K

+2V

OP AMP

RING

RF2

BIAS

NETWORK

AGND

IIL LOGIC INTERF

TSD

RFC

ALM

RTD

SHD

TST

BAT

-IN 1

BGND

R = 108k

100K

90K

RTI

ILMT

SENSE

SENSE 1

RING

SENSE 2

RDI

RDO

THERM

LTD

SHD

RTD

FAULT

DET

REF

VB/2

TABLE 1.

PARAMETER

TEST

CONDITION

PERFORMANCE

(MAX)

UNITS

Longitudinal
Surge

s Rise/

1000

s Fall

1000 (Plastic)

PEAK

Metallic Surge

s Rise/

1000

s Fall

1000 (Plastic)

PEAK

T/GND

s Rise/

1000

s Fall

1000 (Plastic)

PEAK

R/GND

50/60Hz Current

T/GND

11 Cycles

700 (Plastic)

RMS

R/GND

Limited to
10A

RMS

HC5517

Circuit Operation and Design Information

The HC5517 is a voltage feed current sense Subscriber Line
Interface Circuit (SLIC). This means that for long loop appli-
cations the SLIC provides a constant voltage to the tip and
ring terminals while sensing the tip to ring current. For short
loops, where the loop current limit is exceeded, the tip to ring
voltage decreases as a function of loop resistance.

The following discussion separates the SLIC's operation into
its DC and AC path, then follows up with additional circuit
design and application information.

DC Operation of Tip and Ring Amplifiers

SLIC in the Active Mode

The tip and ring amplifiers are voltage feedback op amps
that are connected to generate a differential output (e.g. if tip
sources 20mA then ring sinks 20mA). Figure 1 shows the
connection of the tip and ring amplifiers. The tip DC voltage
is set by an internal +2V reference, resulting in -4V at the
output. The ring DC voltage is set by the tip DC output volt-
age and an internal V

BAT

/2 reference, resulting in V

BAT

+4V

at the output. (See Equation 1, Equation 2 and Equation 3.)

Current Limit

The tip feed to ring feed voltage (Equation 1 minus
Equation 3) is equal to the battery voltage minus 8V. Thus,
with a 48 (24) volt battery and a 600

loop resistance,

including the feed resistors, the loop current is 66.6mA
(26.6mA).

short

loops

the

line

resistance

often

approaches zero and the need exists to control the
maximum DC loop current.

Current limiting is achieved by a feedback network (Figure 1)
that modifies the ring feed voltage (V

) as a function of the

loop current. The output of the Transversal Amplifier (TA) has
a DC voltage that is directly proportional to the loop current.
This voltage is scaled by R

and R

. The scaled voltage is

the input to a transconductance amplifier (GM) that
compares it to an internal reference level. When the scaled
voltage

exceeds

the

internal

reference

level,

the

transconductance amplifier sources current. This current
charges C

in the positive direction causing the ring feed

voltage (V

) to approach the tip feed voltage (V

). This

effectively reduces the tip feed to ring feed voltage (V

T-R

and holds the maximum loop current constant.

The maximum loop current is programed by resistors R

and R

as shown in Equation 4 (Note: R

is typically

100k

Figure 2 illustrates the relationship between V

T-R

and the

loop resistance. The conditions are shown for a battery volt-
age of -24V and the loop current limit set to 25mA. For a infi-
nite loop resistance both tip feed and ring feed are at -4V
and -20V respectively. When the loop resistance decreases
from infinity to about 640

the loop current (obeying Ohm's

Law) increases from 0mA to the set loop current limit. As the
loop resistance continues to decrease, the ring feed voltage
approaches the tip feed voltage as a function of the pro-
gramed loop current limit (Equation 4).

TIPFEED

R 2

-----------

(EQ. 1)

RINGFEED

BAT

---------------

R
R

----

TIPFEED

R
R

----

(EQ. 2)

RINGFEED

BAT

(EQ. 3)

FIGURE 1. OPERATION OF THE TIP AND RING AMPLIFIERS

OUT1

RING

BAT

90k

R/20

R/2

TIP FEED

RING FEED

OUT1

, V

GROUNDED FOR

TIP

RING

TRANSVERSAL

RF2

90k

INTERNAL

DC ANALYSIS

AMP

+2V REF

LIMIT

0.6

(

)

(

)

200xR

(

)

---------------------------------------------

(EQ. 4)

-25

-20

-15

-10

-5

LOOP RESISTANCE (

)

CONSTANT VOLTAGE

REGION

TIP AND RING V

GE (V)

FIGURE 2. V

T-R

vs R

BAT

= -24V,

LIMIT

= 25mA

)

250

500

750

RING FEED

= -20V

TIP FEED

= -4V

CURRENT LIMIT

REGION I

LOOP

= 25mA

HC5517

AC Voltage Gain Design Equations

The HC5517 uses feedback to synthesize the impedance at
the 2-wire tip and ring terminals. This feedback network
defines the AC voltage gains for the SLIC.

The 4-wire to 2-wire voltage gain (V

to V

) is set by the

feedback loop shown in Figure 3. The feedback loop senses
the loop current through resistors R

and R

, sums their

voltage drop and multiplies it by 2 to produce an output volt-
age at the V

pin equal to +4R

. The V

voltage is

then fed into the -IN1 input of the SLIC's internal op amp.
This signal is multiplied by the ratio R

and fed into the

tip current summing node via the OUT1 pin. (Note: the inter-
nal V

BAT

/2 reference (ring feed amplifier) and the internal

+2V reference (tip feed amplifier) are grounded for the AC
analysis.)

The current into the OUT1 pin is equal to:

Equation 6 is the node equation for the tip amplifier summing
node. The current in the tip feedback resistor (I

) is given in

Equation 7.

The AC voltage at V

is then equal to:

and the AC voltage at V

is:

The values for R

and R

are selected to match the

impedance

requirements

tip

and

ring,

for

information reference AN9607 "Impedance Matching Design
Equations for the HC5509 Series of SLICs". The following
loop current calculations will assume the proper R

and R

values for matching a 600

load.

The loop current (

) with respect to the feedback network,

is calculated in Equations 11 through 14. Where R

= 40k

, R

= 600

= R

= 50

Substituting the expressions for V

and V

Equation 12 simplifies to:

Solving for

results in:

Equation 14 is the loop current with respect to the feedback
network. From this, the 4-wire to 2-wire and the 2-wire to
4-wire AC voltage gains are calculated. Equation 15 shows
the 4-wire to 2-wire AC voltage gain is equal to one.

Equation 16 shows the 2-wire to 4-wire AC voltage gain is
equal to negative one-third.

Impedance Matching

The feedback network, described above, is capable of
synthesizing both resistive and complex loads. Matching the
SLIC's 2-wire impedance to the load is important to maxi-
mize power transfer and minimize the 2-wire return loss. The
2-wire return loss is a measure of the similarity of the imped-
ance of a transmission line (tip and ring) and the impedance
at it's termination. It is a ratio, expressed in decibels, of the
power of the outgoing signal to the power of the signal
reflected back from an impedance discontinuity.

Requirements for Impedance Matching

Impedance matching of the HC5517 application circuit to the
transmission line requires that the impedance be matched to
points "A" and "B" in Figure 3. To do this, the sense resistors
R

, R

and R

must be accounted for by the feed-

back network to make it appear as if the output of the tip and
ring amplifiers are at points "A" and "B". The feedback network
takes a voltage that is equal to the voltage drop across the
sense resistors and feeds it into the summing node of the tip
amplifier. The effect of this is to cause the tip feed voltage to
become more negative by a value that is proportional to the
voltage drop across the sense resistors R

and R

. At the

same time the ring amplifier becomes more positive by the

OUT1

--------------------

-------

(EQ. 5)

--------------------

-------

-----------

(EQ. 6)

--------------------

-------

-----------

(EQ. 7)

( )

(EQ. 8)

-------

(EQ. 9)

-------

(EQ. 10)

--------------------------------------------------------------------------

(EQ. 11)

-------

--------------------------------------------------------------------------

(EQ. 12)

400 I

800

----------------------------------------

(EQ. 13)

600

-----------

(EQ. 14)

-----------

(

)

---------------------

600

-----------

600

(

)

---------------------------

(EQ. 15)

OUT1

-------------------

-------

(

)

-------------------------------------

200

600

-----------

( )

600

-----------

600

(

)

----------------------------------

1
3

---

(EQ. 16)

HC5517

same amount to account for resistors R

and R

The net effect cancels out the voltage drop across the feed
resistors. By nullifying the effects of the feed resistors the
feedback circuitry becomes relatively easy to match the
impedance at points "A" and "B".

IMPEDANCE MATCHING DESIGN EQUATIONS

Matching the impedance of the SLIC to the load is
accomplished by writing a loop equation starting at V

and

going around the loop to V

. The loop equation to match the

impedance of any load is as follows (Note: V

= 0 for this

analysis):

Equation 19 can be separated into two terms, the feedback

(-8R

)) and the loop impedance (+4R

The result is shown in Equation 20. Figure 4 is a schematic
representation of Equation 15.

To match the impedance of the SLIC to the impedance of the
load, set:

If R

is made to equal 8R

then:

-R

= R

OUT1

GROUNDED FOR AC ANALYSIS

-------

TIP

(

)

------------------------------

-------

RX
R

-------------

FIGURE 3. AC VOLTAGE GAIN AND IMPEDANCE MATCHING

OUT1

BAT

90k

R/2

RING

R/20

RING

-IN

-------

(EQ. 17)

-------

(EQ. 18)

-------

(EQ. 19)

-------------

-------

(EQ. 20)

8RS

-------

LOAD

SLIC

FIGURE 4. SCHEMATIC REPRESENTATION OF EQUATION 20

-------

(EQ. 21)

(EQ. 22)

HC5517

Therefore to match the HC5517, with R

equal to 50

, to a

600

load:

and:

To prevent loading of the V

output, the value of R

and R

are typically scaled by a factor of 100:

Since the impedance matching is a function of the voltage
gain, scaling of the resistors to achieve a standard value is
recommended.

For complex impedances the above analysis is the same.

Reference application note AN9607 ("Impedance Matching
Design Equations for the HC5509 Series of SLICs") for the
values of KR

and KR

for several worldwide Typical line

impedances.

Tip-to-Ring Open-Circuit Voltage

The tip-to-ring open-circuit voltage, V

, of the HC5517 is

programmable to meet a variety of applications. The design
of the HC5517 defaults the value of V

to:

The HC5517 application circuit overrides the default V

operation when operating from a -80V battery. While operat-
ing from a -80V battery, the SLIC will be in either the ringing
mode or on-hook standby mode. In the ringing mode, V

designed to switch from 0V (centering voltage) to -47V
(Maintenance Termination Unit voltage). The centering volt-
age is active during the ringing portion of the ringing wave-
form and the Maintenance Termination Unit (MTU) voltage is
active during the silent portion of the ringing signal. In the
on-hook standby mode, the application circuit is designed to
maintain V

at the MTU voltage.

Centering Voltage Application Circuit Overview

The centering voltage is used during ringing to center the
DC outputs of the tip feed and ring feed amplifiers. Centering
the amplifier outputs allows for the maximum undistorted
voltage swing of the ringing signal. Without centering, the
output of each amplifier would saturate at ground or V

BAT

minimizing the ringing capability of the HC5517. The
required centering voltage, V

, is +1.8V

when operating

from a -80V battery.

Centering Voltage Application Circuit Operation

The circuit used to generate the centering voltage is shown
in Figure 5.

The circuitry within the dotted lines is internal to the
HC5517. The value of the resistor designated as R is 108k

and the resistor R/20 is 5.4k

. The tip amplifier gain of

20V/V amplifies the +1.8V

at V

to +36V

and adds it to

the internal 4V

offset, generating -40V

at the tip

amplifier output. The -40V

offset also sums into the ring

amplifier, adding to the battery voltage, achieving -40V at the
ring amplifier output.

Centering Voltage Design Equations

The centering voltage (V

) is dependent on the battery

voltage. A battery voltage of -80V requires a +1.8V

centering voltage. The equation used to calculate the
centering voltage is shown below.

The DC voltage at the outputs of the centered tip and ring
amplifiers can be calculated from Equation 28 and
Equation 29.

The shunt resistor of the divider network, R

, is not

determined from a design equation. It is selected based on
the trade-off of power dissipation in the voltage divider (low
value of R

) and loading affects of the internal R/20 resistor

(high value of R

). The suggested range of R

is between

1.0k

and 2.0k

. The application circuit design equation

used to calculate the value of R

of the divider network is

as follows:

8 50

(

)

400

(EQ. 23)

600

200

400

(EQ. 24)

40k

(EQ. 25)

40k

100 Resistive

200

(

)

Reactive

100

--------------------------

(EQ. 26)

BAT

FIGURE 5. CENTERING VOLTAGE APPLICATION CIRCUIT

RING FEED
AMPLIFIER

90k

TIP FEED

AMPLIFIER

R/20

R/2

+5V

RING

+2V

TO ZENER
DIODE D

BAT

-----------------

BAT

---------------

(EQ. 27)

20V

(

)

(EQ. 28)

BAT

20V

(

)

(EQ. 29)

HC5517

where: V

D13

forward drop of D

, 0.63V.

forward drop of D

, 0.54V.

is the shunt resistor of the divider, 1.1k

is the input impedance of V

RING

, 5.4k

is the required centering voltage, 1.8V, V

BAT

= -80V.

is the +5V supply.

Centering Voltage Logic Control

The pnp transistor T

is used to defeat the voltage divider

formed by R

, R

, D

and D

. When T

is off (RC is logic

high), +5V

is divided to produce +1.8V

at the V

RING

input. When T

is on (RC is logic low), its emitter base volt-

age of +0.9V

is divided resulting in +0.2V at the anode of

, hence reverse biasing the diode (D

) and floating the

RING

pin.

MTU Voltage Application Circuit Overview

According to Bellcore specification TR-NWT-000057, an
MTU

voltage

may

required

some

operating

companies. The minimum allowable voltage to meet MTU
requirements is -42.75V, which is used by measurement
equipment to verify an active line. Also, some facsimile and
answering machines use the MTU voltage as an indication
that the telephone is on-hook or not answered. In addition to
the Bellcore specification, FCC Part 68.306 requires that the
maximum tip to ground or ring to ground voltage not exceed
-56.5V for hazardous voltage limitations. These two require-
ments have been combined and the resulting range is
defined as the MTU voltage. The HC5517 application circuit
can be programmed to any voltage within this range using
the zener clamping circuit.

MTU Voltage Application Circuit Operation

The circuit used to generate the MTU voltage is shown in
Figure 6.

The ring feed amplifier DC output voltage, V

RDC

, is a

function of the internal V

BAT

/2 reference and external zener

diode D

. When the magnitude of V

BAT

/2 is less than the

zener voltage, the zener is off and the input to the ring feed
amplifier is V

BAT

/2. When the magnitude of V

BAT

/2 is

greater than the zener voltage, the zener conducts and
clamps the noninverting terminal of the ring amplifier to the
zener voltage.

Internal to the HC5517 are connections to the tip feed amplifier
output and V

BAT

/2 reference. The DC voltage at the tip feed

output, V

TDC

, is a constant -4V during on-hook standby.

MTU Voltage Design Equations

The following equations are used to predict the DC output of
the ring feed amplifier, V

RDC

Where V

is the zener diode voltage of D

and V

and

are the saturation voltages of T

. Using Equations 31

and 32, the tip-to-ring open-circuit voltage can be calculated
for any value of zener diode and battery voltage.

Figure 7 plots V

as a function of battery voltage. The

graph illustrates the clamping function of the zener circuitry.

MTU Voltage Logic Control

The same pnp transistor, T

, that is used to control the

centering voltage is also used to control the MTU voltage.
The application circuit uses T

to ground or float the anode

of the zener diode D

. When RC is a logic low (T

on) the

anode of D

is referenced to ground through the collector

base junction of the transistor. Current then flows through
the zener, allowing the ring amplifier input to be clamped.
When RC is a logic high (T

off) the anode of D

floats,

inhibiting the clamping action of the zener.

HC5517 Modes of Operation

The four modes of operation of the HC5517 Ringing SLIC
are ringing, on-hook standby, off-hook active and power
denial. Three control signals select the operating mode of

D13

(

)

(

)

(

)

----------------------------------------------------------------------------------------------------

(EQ. 30)

FIGURE 6. RING FEED AMPLIFIER CIRCUIT CONNECTIONS

TIP FEED OUTPUT

REF

RING FEED
AMPLIFIER

90K

+5V

BAT

-----------------

BAT

---------------

RDC

BAT

---------------

(EQ. 31)

BAT

---------------

RDC

(

)

(

)

(EQ. 32)

BAT

---------------

TDC

BAT

---------------

(EQ. 33)

BAT

---------------

TDC

(

)

(

)

(EQ. 34)

TIP T

RING

OPEN CIRCUIT V

GE (V)

+50

+40

+30

+20

+10

-16

-28

-40

-52

-58

-68

-80

FIGURE 7. V

AS A FUNCTION OF BATTERY VOLTAGE

HC5517

the SLIC. The signals are Battery Switch, F1 and Ring
Cadence (RC). The active application circuit and active
supervisory function are different for each mode, as shown
in the Table 2.

Mode Control Signals

The Battery Switch selects between the -80V and -24V
supplies. The Battery Switch circuitry is described in the
"Operation of the Battery Switch" section. A system alterna-
tive to the battery switch signal is to use a buffered version of
the SHD output to select the battery voltage. Another alter-
native is to control the output of a programmable battery
supply, removing the battery switch entirely from the applica-
tion circuit. F1 is used to put the SLIC in the power denial
mode. RC drives the base of T

, which is the transistor used

to control the centering voltage and MTU voltage. The three
control signals can be driven from a TTL logic source or an
open collector output

RINGING MODE

The ringing state, as the name indicates, is used to ring the
telephone with a -80V battery supply. The SLIC is designed
for balanced ringing with a differential gain of 40V/V across tip
and ring. Voltage feed amplifiers operating in the linear mode
are used to amplify the ringing signal. The linear amplifier
approach allows the system designer to define the shape and
amplitude of the ringing waveform. Both supervisory function
outputs, SHD and RTD, are active during ringing.

Spectral Content of the Ringing Signal

The shape of the waveform can range from sinusoidal to
trapezoidal. Sinusoidal waveforms are spectrally cleaner
than trapezoidal waveforms, although the latter does result
in lower power dissipation across the SLIC for a given RMS
amplitude. Systems where the ringing signal will be in prox-
imity to digital data lines will benefit from the sinusoidal ring-
ing capability of the HC5517. The slow edge rates of a
sinusoid will minimize coupling of the large amplitude ringing
signal. The linear amplifier architecture of the HC5517
allows the system designer to optimize the design for power
dissipation and spectral purity.

Amplitude of the Ringing Signal

Amplitude control is another benefit of the linear amplifier
architecture. Systems that require less ringing amplitude are
able to do so by driving the HC5517 with a lower level ringing
waveform. Solutions that use saturated amplifiers can only
vary the amplitude of the ringing signal by changing the
negative battery voltage to the SLIC.

HC5517 Through SLIC Ringing

The HC5517 is designed with a high gain input, V

RING

, that

the system drives while ringing the phone. V

RING

is one of

many signals summed at the inverting input to the tip feed
amplifier. The gain of the V

RING

signal through the tip feed

amplifier is set to 20V/V. The output of the tip feed amplifier
is summed at the inverting input of the ring feed amplifier,
configured for unity gain. The result is a differential gain of
40V/V across tip and ring of the ringing signal.

The ringing function requires an input ringing waveform and
a centering voltage. The ringing waveform is the signal from
the 4-wire side that is amplified by the SLIC to ring the tele-
phone. The centering voltage, as previously discussed, is a
positive DC offset that is applied to the V

RING

input along

with the ringing waveform. The HC5517 application circuit
provides the centering voltage, simplifying the system
interface to an AC coupled ringing waveform.

Ringer Equivalence Number

Before any further discussion, the Ringer Equivalence
Number or REN must be discussed. Based on FCC Part
68.313 a single REN can be defined as 5k

, 7k

or 8k

AC impedance at the ringing frequency. The ringing fre-
quency is based on the ringing types listed in Table 1 of the
FCC specification. The impedance of multiple REN is the
paralleling of a single REN. Therefore 5 REN can either be
1k

, 1.4k

or 1.6k

. The 7k

model of a single REN will be

used throughout the remainder of the data sheet.

Ringing Waveform

An amplitude of 1.2V

RMS

will deliver approximately 46V

RMS

to a 1 REN load, and 42V

RMS

to a 3 REN load. The ampli-

tude is REN dependent and is slightly attenuated by the
feedback scheme used for impedance matching. The ringing
waveform is cadenced, alternating between a 20Hz burst
and a silent portion between bursts. Bellcore specification
TR-NWT-000057 defines seven distinct ringing waveforms or
alerting (ringing) patterns. The following table lists each type.

Figure 8 shows the relationship of the cadenced ringing
waveform and the Battery Switch and RC control signals.
Also shown are the states of the MTU voltage and the
centering voltage.

The state of Battery Switch is indicated by the desired
battery voltage to the SLIC. The RC signal is used to enable
and disable the centering voltage and MTU voltage. RC
follows the ring signal in that it is high during the 20Hz burst
and low during the static part of the waveform.

Open Circuit Voltage During the Ringing Mode

The mutually exclusive relationship of the centering voltage
and MTU implies that both functions will not exist at the
same time. During the silent portion of the ringing waveform

TABLE 1. DISTINCTIVE ALERTING PATTERNS

PATTERN

INTERVAL DURATION IN SECONDS

RINGING SILENT RINGING SILENT RINGING SILENT

0.4

0.2

0.4

0.2

0.8

4.0

0.2

0.1

0.2

0.1

0.6

4.0

0.8

0.4

0.8

0.4

0.2

0.6

4.0

1.2

4.0

0.2

0.3

0.2

1.0

0.2

0.3

4.0

HC5517

the HC5517 application circuit meets the hazardous voltage
requirements of FCC Part 68.306 by forcing the MTU volt-
age. Without the zener clamping solution, a programmable
power supply would have to be designed. The intervals listed
in Table 1 would require the power supply to switch voltages
and settle to stable operation well within 100ms. The design
of such a power supply may prove quite a challenge. The
zener solution provides a cost effective, low impact to
meeting a wide variety of tip to ring open circuit voltages.

Ringing Design Equations

The differential tip to ring voltage during ringing, as a
function of REN, can be approximated from Equation 35.

The voltage V

RING

is defined as the RMS amplitude of the

input ringing signal. V

TRO

is the open circuit tip to ring differ-

ential output voltage, calculated as V

RING

multiplied by the

differential gain of 40V/V. The REN impedance is shown as
R

. Figure 9 shows the relationship of REN load to maxi-

mum differential tip to ring RMS voltage during ringing. The
maximum ringing signal amplitude herein assumes an infi-
nite source and sink capability of the tip feed and ring feed
amplifiers. Due to the amplifier output design, the HC5517 is
limited to 3 REN ringing capability for this reason.

ON-HOOK STANDBY MODE

On-hook standby mode is with the phone on-hook (i.e., not
answered) and ready to accept an incoming voice signal or elec-
tronic data. The HC5517 application circuit is designed to main-
tain the MTU voltage during this mode of operation. During this
mode, the SHD output is valid and the RTD output is invalid.

OFF-HOOK ACTIVE MODE

Off-hook active accommodates voice and data communica-
tions, including pulse metering, with a battery voltage of
-24V. The MTU voltage during this mode is defeated by the
zener clamp design regardless of the state of RC. It is
important to have RC low to disable the ringing voltage.
Only the SHD output is valid during this mode.

POWER DENIAL MODE

The HC5517 will enter the power denial mode whenever F1
is a logic low. During power denial, the tip and ring amplifiers
are active. The DC voltages of both amplifiers are near
ground, resulting in a maximum loop current of 7mA. Both
the SHD and the RTD detector output are invalid.

Table 2 summarizes the operating modes of the HC5517
application circuit. The table indicates the valid detectors in
each mode as well as valid application circuit operation.

FIGURE 8. RINGING WAVEFORM AND CONTROL SIGNALS

CADENCED

WAVEFORM

OFF

CENTERING

VOLTAGE

OFF

MTU

BATTERY

SWITCH

-80V

-24V

(

)

RING

5.4e3

------------------

0.702

(

)

200

(

)

TRO

108e3

(

)

---------------------------------------------------

108e3

(EQ. 35)

FIGURE 9. MAXIMUM RINGING OUTPUT VOLTAGE

RING

= 1.2V

RMS

)

MAXIMUM RINGING

AMPLITUDE (RMS)

46.00

47.00

45.00

44.00

43.00

42.00

41.00

40.00

39.00

1 REN

2 REN

3 REN

4 REN

5 REN

HC5517

Operation of the Battery Switch

The battery switch is used to select between the off-hook
battery of -24V and the ringing/standby battery of -80V.
When T

is off (battery switch is logic low) the MOSFET T

is off and the -24V battery is supplied to the SLIC through
D

. When T

is on (battery switch is logic high) current

flows through the collector of T

turning on the zener D

When D

turns on, the gate of the MOSFET is positive with

respect to the drain (-80V) and T

turns on. Turning T

connects the -80V battery to the SLIC through D

. This in

turn reverse biases D

, isolating the two supplies.

Transhybrid Balance

(Voice Signal)

The purpose of the transhybrid circuit is to remove the
receive signal (V-REC) from the transmit signal (V-XMIT),
thereby preventing an echo on the transmit side. This is
accomplished by using an external op amp (usually part of
the CODEC) and by the inversion of the signal from the
SLIC's 4-wire receive port (V

) to the SLIC's 4-wire

transmit port (OUT1).

The external transhybrid circuit is shown in Figure 10. The
effects of capacitors C

, C

and C

are negligible and there-

fore omitted from the analysis. The input signal (V-REC) will
be subtracted from the output signal (V-XMIT) if I

equals I

are equal and opposite in phase. A node analysis yields the
following equation:

The value of R

is then:

Given that OUT1 is equal to -1/3 of V-REC (Equation 16) and
V-REC is equal to VTR (A

4-Wire-2-Wire

= 1, Equation 15),

then R

= 3R

A transhybrid balance greater than 30dB can

be achieved by using 1% resistors values.

Transhybrid Balance

(Pulse Metering)

Transhybrid balance of the pulse metering signal is
accomplished in 2 stages. The first stage uses the SLIC's
internal op amp to invert the phase of the pulse metering sig-
nal. The second stage sums the inverted pulse metering sig-
nal with the incoming signal for cancellation in the
transhybrid amplifier. A third network can be added to offset
both tip and ring by the peak amplitude of the pulse metering
signal. This will allow both the maximum voice and pulse
metering signals to occur at the same time with no distortion.

Pulse Metering

Pulse metering or Teletax is used outside the United States
for billing purposes at pay phones. A 12kHz or 16kHz burst
is injected into the 4-wire side of the SLIC and transmitted
across the tip and ring lines from the central office to the pay
phone. For more information about pulse metering than cov-
ered here reference application note AN9608 "Implementing
Pulse Metering for the HC5509 Series of SLICs".

TABLE 2. HC5517 APPLICATION CIRCUIT OPERATING MODES SUMMARY

BATTERY

SWITCH

MODE

DETECTORS VALID

APPLICATION CIRCUIT VALID

SHD

RTD

MTU

CENTERING

-24V

Power Denial

-24V

Invalid

-24V

Off-Hook Active

-24V

Invalid

-80V

Power Denial

-80V

Invalid

-80V

On-Hook Standby

-80V

Ringing

(Note)

NOTE: During Ringing, the SHD output will be active for both on-hook and off-hook conditions. The AC current, for the on-hook condition, exceeds
the SHD threshold of 12mA. Valid off-hook detection during ringing is provided by the RTD output only.

V REC

---------------------

OUT1

-----------------

(EQ. 36)

V REC

OUT1

---------------------

(EQ. 37)

FIGURE 10. TRANSHYBRID CIRCUIT (VOICE SIGNAL)

EXTERNAL

TRANSHYBRID CIRCUIT

SUMMING NODE CANCELS OUT

INCOMING AC TRANSMISSION FROM

OUT GOING TRANSMISSION

INCOMING
AC TRANSMISSION

180

PHASE

SHIFT

OF AC

SIGNAL

-IN1

OUT1

V-XMIT

V-REC

HC5517

OUTGOING

AC TRANSMISSION

HC5517

Inverting Amplifier (A1)

The pulse metering signal is injected in the -IN1 pin of the
SLIC. This pin is the inverting input of the internal amplifier
(A

) that is used to invert the pulse metering signal for later

cancellation. The components required for pulse metering
are C

and R

, are shown in Figure 11. The pulse metering

signal is AC coupled to prevent a DC offset on the input of
the internal amplifier. The value of C

should be 10

F. The

expression for the voltage at OUT1 is given in Equation 38.

The first term is the gain of the feedback voltage from the
2-wire side and the second term is the gain of the injected
pulse metering signal. The effects of C

and C

are

negligible and therefore omitted from the analysis.

The injected pulse metering output term of Equation 38 is
shown below in Equation 39 and rearranged to solve for R

in Equation 40.

The ratio of R

to R

is set equal to one and results in unity

gain of the pulse metering signal from 4-wire side to 2-wire
side. The value of R

is considered to be a constant since it

is selected based on impedance matching requirements.

Cancellation of the Pulse Metering Signal

The transhybrid cancellation technique that is used for the
voice signal is also implemented for pulse metering. The
technique is to drive the transhybrid amplifier with the signal
that is injected on the 4-wire side, then adjust its level to
match the amplitude of the feedback signal, and cancel the
signals at the summing node of an amplifier.

NOTE: The CA741C operational amplifier is used in the application
as a "stand in" for the operational amplifier that is traditionally located
in the CODEC, where transhybrid cancellation is performed.

Referring to Figure 3, V

is the 2-wire feedback used to

drive the internal amplifier (A1) which in turn drives the
OUT1 pin of the SLIC. The voltage measured at V

related to the loop impedance as follows:

For a 600

termination and a pulse metering gain (G

) of

1, the feedback voltage (V

) is equal to one third the

injected pulse metering signal of the 4-wire side. Note,
depending upon the line impedance characteristics and the
degree of impedance matching, the pulse metering gain may
differ from the voice gain. The pulse metering gain (G

)

must be accounted for in the transhybrid balance circuit.

The polarity of the signal at OUT1 (Equation 38) is opposite
of V

allowing the circuit of Figure 12 to perform the final

stage of transhybrid cancellation.

The following equations do not require much discussion.
They are based on inverting amplifier design theory. The
voice path V

signal has been omitted for clarity. All refer-

ence designators refer to components of Figures 11 and 12.

The first term refers to the signal at OUT1 and the second
term refers to the 4-wire side pulse metering signal. Since
ideal transhybrid cancellation implies V

TXO

equals zero

when a signal is injected on the 4-wire side, V

TXO

is set to

zero and the resulting equation is shown below.

Rearranging terms of Equation 43 and solving for R

results

in Equation 44. This is the only value to be calculated for the
transhybrid cancellation. All other values either exist in the
application circuit or have been calculated in previous
sections of this data sheet.

The value of R

(Figure 12) is 12.37k

given the following

set of values:
R

= 40k

= 600

= 8.25k

= 40k

= 1

Substituting the same values into Equation 41 and Equation 42,
it can be shown that the signal at OUT

is equal to -2/3V

This result, along with Equation 44 where R

equals to 2/3R4,

indicates the signal levels into the transhybrid amplifier are
equalized by the amplifier gains and opposite in polarity,
thereby achieving transhybrid balance at V

TXO

OUT

TO EXTERNAL

TRANSHYBRID AMP

FIGURE 11. PULSE METERING PHASE SHIFT AMPLIFIER

DESIGN

OUT1

-------

(EQ. 38)

OUT1

injected

(

)

-------

(EQ. 39)

(EQ. 40)

200

-------------

(EQ. 41)

TXO

OUT

CA741C

FIGURE 12. CANCELLATION OF THE PULSE METERING SIGNAL

TXO

-----------

------------

-------

(EQ. 42)

-----------

------------

-------

(EQ. 43)

-------

200

--------------------------------

-------

(EQ. 44)

HC5517

Additional Tip and Ring Offset Voltage

A DC offset is required to level shift tip and ring from ground
and V

BAT

respectively. By design, the tip amplifier is offset

4V below ground and the ring amplifier is offset 4V above
V

BAT

. The 4V offset was designed so that the peak voice

signal could pass through the SLIC without distortion. There-
fore, to maintain distortion free transmission of pulse meter-
ing and voice, an additional offset equal to the peak of the
pulse metering signal is required.

The tip and ring voltages are offset by a voltage divider
network on the V

pin. The V

pin is a unity gain input

designed as the 4-wire side voice input for the SLIC.
Figure 13 details the circuit used to generate the additional
offset voltage.

The amplifier shown is the tip amplifier. Other signals are con-
nected to the summing node of the amplifier but only those
components used for the offset generation are shown. The off-
set generated at the output of the tip amplifier is summed at the
ring amplifier inverting input to provide a positive offset from the
battery voltage. The connection to the ring amplifier was omit-
ted from Figure 13 for clarity, refer to Figure 3 for details.

The term V

PMO

is defined to be the offset required for the

pulse metering signal. The value of the offset voltage is cal-
culated as the peak value of the pulse metering signal.
Equation 45 assumes the amplitude of the pulse metering
signal is expressed as an RMS voltage.

The value of R

can be calculated from the following

equation:

The component labeled R is the internal summing resistor of
the tip amplifier and has a typical value of 108k

. The value

of R

should be selected in the range of 4.99k

and 10k

Staying within these limits will minimize the parallel loading
effects of the internal resistor R on R

as well as minimize

the constant power dissipation introduced by the divider.

Solving Equation 45 for 1V

RMS

results in a 1.414V

requirement for V

PMO

. Setting R

of Equation 46 to 10k

and substituting the values for V

PMO

and R yields 23.2k

for

. The value of R

can be rounded to the nearest standard

value without significantly changing the offset voltage.

Single Low Voltage Supply Operation

The application circuit shown Figure 15 requires 2 low
voltage supplies (+5V, -5V). The following application offers
away to make use of a 2.5V reference, provided with some
CODEC, to operate the transhybrid balance amplifier from
a single +5V supply. The implementation is shown in
Figure 14. Notice that the three inputs from the SLIC must all
be AC coupled to insure the proper DC gain through the
CODECs internal op amp. The resistor Ra is not used for
gain setting and is only intended to balance the DC offsets
generated by the input bias current of the CODEC amplifier.
If the DC offsets generated by the input bias currents are
negligible, then Ra may be omitted from the circuit. Ca may
be required for decoupling of the voltage reference pin and
does not contribute to the response of the amplifier.

Layout Guidelines and Considerations

The printed circuit board trace length to all high impedance
nodes should be kept as short as possible. Minimizing length
will reduce the risk of noise or other unwanted signal pickup.
The short lead length also applies to all high gain inputs. The
set of circuit nodes that can be categorized as such are:

· V

pin 27, the 4-wire voice input.

· -IN1 pin 13, the inverting input of the internal amplifier.

· V

REF

pin 3, the noninverting input to ring feed amplifier.

· V

RING

pin 24, the 20V/V input for the ringing signal

· U1 pin 2, inverting input of external amplifier.

For multi layer boards, the traces connected to tip should not
cross the traces connected to ring. Since they will be carrying
high voltages, and could be subject to lightning or surge
depending on the application, using a larger than minimum
trace width is advised.

The 4-wire transmit and receive signal paths should not
cross. The receive path is any trace associated with the V

input and the transmit path is any trace associated with V

output. The physical distance between the two signal paths
should be maximized to reduce crosstalk.

The mode control signals and detector outputs should be
routed away from the analog circuitry. Though the digital
signals are nearly static, care should be taken to minimize
coupling of the sharp digital edges to the analog signals.

2-WIRE SIDE

TO VOICE INPUT OF

TRANSHYBRID AMP

+5V

4-WIRE SIDE
VOICE INPUT

PMO

FIGURE 13. PULSE METERING OFFSET GENERATION

PMO

(EQ. 45)

------------------

PMO

--------------------------

(EQ. 46)

OUT

CODEC

0.1

24.9k

0.1

24.9k

FIGURE 14. SINGLE LOW VOLTAGE SUPPLY OPERATION

2.4V
REF

HC5517

The part has two ground pins, one is labeled AGND and the
other BGND. Both pins should be connected together as
close as possible to the SLIC. If a ground plane is available,
then both AGND and BGND should be connected directly to
the ground plane.

A ground plane that provides a low impedance return path
for the supply currents should be used. A ground plane
provides isolation between analog and digital signals. If the
layout density does not accommodate a ground plane, a
single point grounding scheme should be used.

Application Pin Descriptions

PLCC

SYMBOL

DESCRIPTION

AGND

Analog Ground - To be connected to zero potential. Serves as a reference for the transmit output and receive input
terminals.

Positive Voltage Source - Most Positive Supply.

REF

Ring amplifier reference override. An external voltage connected to this pin will override the internal V

BAT

/2 reference.

Power Denial -A low active TTL compatible logic control input. When enabled, the output of the ring amplifier will ramp
close to the output voltage of the tip amplifier.

TTL compatible logic control input that must be tied high for proper SLIC operation.

SHD

Switch Hook Detection - An active low TTL compatible logic output. Indicates an offhook condition.

RTD

Ring Trip Detection - An active low TTL compatible logic output. Indicates an off-hook condition when the phone is
ringing.

TST

A TTL logic input. A low on this pin will keep the SLIC in a power down mode. The TST pin in conjunction with the ALM pin
can provide thermal shutdown protection for the SLIC. Thermal shutdown is implemented by a system controller that
monitors the ALM pin. When the ALM pin is active (low) the system controller issues a command to the TST pin (low) to
power down the SLIC. The timing of the thermal recovery is controlled by the system controller.

ALM

A TTL compatible active low output which responds to the thermal detector circuit when a safe operating die
temperature has been exceeded.

LMT

Loop Current Limit - Voltage on this pin sets the short loop current limiting conditions using a resistive voltage divider.

OUT1

The analog output of the spare operational amplifier.

-IN1

The inverting analog input of the spare operational amplifier. Note that the non-inverting input of the amplifier is
internally connected to AGND.

TIP

SENSE

An analog input connected to the TIP (more positive) side of the subscriber loop through a feed resistor and ring relay
contact. Functions with the RING terminal to receive voice signals from the telephone and for loop monitoring
purpose.

RING SENSE 1

An analog input connected to the RING (more negative) side of the subscriber loop through a feed resistor. Functions

with the TIP terminal to receive voice signals from the telephone and for loop monitoring purposes.

RING SENSE 2

This is an internal sense mode that must be tied to RING SENSE 1 for proper SLIC operation.

Receive Input, 4-Wire Side - A high impedance analog input. AC signals appearing at this input drive the Tip Feed
and Ring Feed amplifiers deferentially.

Not used in this application.This pin should be left floating.

Transmit Output, 4-Wire Side - A low impedance analog output which represents the differential voltage across TIP
and RING. Since the DC level of this output varies with loop current, capacitive coupling to the next stage is necessary.

RDI

TTL compatible input to drive the uncommitted relay driver.

RDO

This is the output of the uncommitted relay driver.

BGND

Battery Ground - To be connected to zero potential. All loop current and some quiescent current flows into this
terminal.

Not used in this application. This pin should be either grounded or left floating.

RING

Ring signal input (0V to 3V

PEAK

at 20Hz).

This is the output of the tip amplifier.

This is the output of the ring amplifier.

BAT

The negative battery source.

RTI

Ring Trip Input - This pin is connected to the external negative peak detector output for ring trip detection.

HC5517

Applications Circuit

Pinouts

HC5517 (PLCC)

TOP VIEW

HC5517 (SOIC)

TOP VIEW

VRING

RING SENSE 2

RING SENSE 1

BGND

RDO

RDI

GND

ILMT

OUT 1

-IN 1

TIP SENSE

VREF

SHD

RTD

TST

ALM

AGND

VREF

SHD

RTD

TST

ALM

ILMT

OUT 1

-IN 1

TIP SENSE

RTI

VRING

RDO

RING SENSE 2

RING SENSE 1

BAT

BGND

RDI

TIP

ILIMT 11

26 RF

25 TF

14 TIP SENSE

HC5517

BAT

FO 5

RING

V-TELETAX

-80V

-24V

BGND

RING

SHD

RTD ALM TST RS

+5V

-IN1 13

OUT1 12

F1 4

RDI 20

RDO

RING

RTI 28

27 V

BAT

22 BGND

1 AGND

2 V

15 RING SENSE 1

16 RING SENSE 2

+5V

PULSE METERING OPTION

V-XMIT

V-REC

-5V

+5V

FIGURE 15. APPLICATION CIRCUIT

Diode bridge optional for in-house use.

Not required for MOSFETs with body diodes.

SWITCH

BAT

HC5517

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

Sales Office Headquarters

NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240

EUROPE
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Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05

ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029

HC5517EVAL Evaluation Board Parts List

COMPONENT

VALUE

TOLERANCE

RATING

COMPONENT

VALUE

TOLERANCE

RATING

SLIC

HC5517

n/a

, C

0.1

20%

50V

, R

24.9k

1/4W

, C

20%

20V

8.25k

1/4W

, C

0.47

20%

20V

12.1k

1/4W

, C

0.01

20%

100V

, R

40k

1/4W

1.0

20%

50V

(Not Provided)

23.2k

1/4W

100

20%

(Not Provided)

10k

1/4W

0.1

20%

100V

100k

1/4W

0.5

20%

50V

11-14

1/4W

, C

3300pF

20%

100V

47k

1/4W

1-4

, D

1N4007

100V, 1A

1.5M

1/4W

, D

1N914

100V, 1A

56.2k

1/4W

1N4744

15V, 1W

1.1k

1/4W

1N5255

28V, 1/2-

Wire

825

1/4W

NTE 383

100V, 1A

, R

10k

1/4W

2N2907

60V,150mA

47k

1/4W

RFP2N10 or
equivalent

100V, 2A

25-27

560

1/4W

F1, RC, BATTERY

SPDT Toggle switches, center off.

20k

Potentiometer

1/4W

CA741C OpAmp

47k

1/4W

Textool Socket

228-5523

, C

0.01

20%

50V

HC5517

Part Number HC5517