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Part Number EL4544

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1
®
FN7362.1
EL4544
Triple 16x5 Differential Crosspoint Switch
Capable of Operation in Single-Ended or
Differential Input Modes
The EL4544 is a high bandwidth 16-channel differential RGB
to 5-channel RGB single-ended RGB-HV video crosspoint
switch with embedded sync extraction. Four 16-channel
input muxes, each capable of receiving a complete RGB
video signal, and five output muxes, each capable of
"seeing" any one of the four RGB inputs. Additionally, the
fifth input mux has an overlay "screen on screen" function
that can be displayed in conjunction with any of the stacked
RGB inputs.
The EL4544 has a fast disable feature to reduce power
consumption. The device also provides a presence of signal
indicator by looking for syncs on a designated channel.
Features
· Serial programming of switch array
· Parallel or serial modes
· High Z output disable
· Drives 150
loads
· 60MHz 0.1dB gain flatness
· -3dB bandwidth of 300MHz
· Crosstalk rejection: 75dB @ 100MHz
· Channels settle to 5% within 10ns after overlay switching
· 356-pin BGA packaging
· Pb-free plus anneal available (RoHS compliant)
Applications
· Video switching
Ordering Information
PART
NUMBER
PACKAGE
TAPE &
REEL
PKG. DWG. #
EL4544IGZ
(See Note)
356-Pin
(27x27mm) BGA
(Pb-Free)
-
-
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Data Sheet
August 1, 2005
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
2
FN7362.1
August 1, 2005
Pinout
EL4544
(356-PIN BGA)
TOP VIEW
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
2
3
1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
Vp
Vm
BpF BpE BpD BpC BpB BpA Bp9 Bp8 Bp7 Bp6 Bp5 Bp4 Bp3 Bp2 Bp1 Bp0
Vm
Vp
Vm
Vm
BnF BnE BnD BnC BnB BnA Bn9 Bn8 Bn7 Bn6 Bn5 Bn4 Bn3 Bn2 Bn1 Bn0
Vm
Vm
RpF RnF TMon1 Vm
Vm
Vm
Vm
Vm
Vm
Vp
Vm
Vm
Vm
Vm
Vm
Vm
Vm TMon2 GnF GpF
RpE RnE
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
GnE GpE
RpD RnD
Vm
Vm
Vm
Vm
GnD GpD
RpC RnC
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
GnC GpC
RpB RnB
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
GnB GpB
RpA RnA
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
GnA GpA
Rp9
Rn9
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Gn9 Gp9
Rp8
Rn8
Vp
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vp
Gn8 Gp8
Rp7
Rn7
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Gn7 Gp7
Rp6
Rn6
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Gn6 Gp6
Rp5
Rn5
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Gn5 Gp5
Rp4
Rn4
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Gn4 Gp4
Rp3
Rn3
R
AZ
G
AZ
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
NC
NC
Gn3 Gp3
Rp2
Rn2 Trans Ref
OL
Vdp Chip Gn2 Gp2
Rp1
Rn1
Cal
R
OL
B
AZ
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
sEn Reset Gn1 Gp1
G
OL
sDo
Rp0
Rn0
Vp
Ovl
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
Vm
sClk
Vp
Gn0 Gp0
B
OL
sDi
VpS
Hs
Vs
VmS
Hd
Vd
VmD VpC
Hc
Vc
VmC VpB
Hb
Vb
VpA
Ha
Va
VmA
VpD
VmB
Rs
Gs
Bs
RefS
Gd
Bd
RefD
Rc
Gc
Bc
RefC
Rb
Gb
Bb
Ra
Ga
Ba
RefA
Rd
RefB
= EMPTY LOCATION (UNPOPULATED)
= BALLGRID
EL4544
3
FN7362.1
August 1, 2005
Absolute Maximum Ratings
(T
A
= 25°C)
V
SA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
S
V
SD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3V
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80mA
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C
Recommended Operating Temperature . . . . . . . . . .-40°C to +85°C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
Electrical Specifications
V
SA
= 5V, V
SD
= 3.3V, Gain = 2, R
L
= 150
, C
L
= 2.7pF, T
A
= 25°C.
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
MAX
UNIT
SUPPLY CHARACTERISTICS
V
SA
Recommended Analog Supply Voltage
4.75
5.0
5.25
V
V
SD
Recommended Digital Supply Voltage
2.4
3.3
3.6
V
I
SD
Digital Supply Current
3
10
mA
I
SA
Analog Supply Current
Enabled - no load, all amplifiers enabled
685
790
mA
Disabled
33
50
mA
PSRR
Power Supply Rejection Ratio
4.75V to 5.25V
40
dB
CHARACTERISTICS OF DIFFERENTIAL INPUTS
CMRR
Input Common Mode Rejection Ratio
0V to 1.5V
45
66
dB
A
V
Gain Accuracy for A, B, C, D, S Channels Range of Deviation from gain of 2 (excluding
overlay)
1.85
2.0
2.15
V
N
Input Referred Voltage Noise
A
V
= +2
40
nV/
Hz
V
OS
Input Referred Offset Voltage
Includes muxes and output amps; A, B, C, D
channels
-80
0
80
mV
S channel in auto-calibration mode
-10
5
12
mV
V
IN
Maximum Recommended Input Range
V
SA
V
C
IN
Input Capacitance
2
pF
R
IN
Input Resistance, Single-ended
1100
1320
1550
V
INSET
Input Biasing Voltage
1.49
1.53
1.57
V
OVERLAY INPUT CHARACTERISTICS
V
OS
Input Referred Offset Voltage
S channel overlay inputs at A
V
= 2
-10
5
12
mV
OVERLAY SWITCHING CHARACTERISTICS
P
APERTURE
Pixel Mux Aperture of Uncertainty
5% setting for max signal charge
10
ns
A
V
Gain Accuracy for S Channel
S channel overlay input
OUTPUT CHARACTERISTICS
Output
Impedance
Enabled
100
m
Disabled
10
M
V
OUT
Maximum Recommended Output Range
0
3.3
V
I
OUT
Output Current
Short-circuit (5
)
60
mA
AC PERFORMANCE
SR
Slew Rate
2V
P-P
symmetrical, R
L
= 150
, A
V
= 2,
guaranteed by design
800
V/µs
EL4544
4
FN7362.1
August 1, 2005
BW
-3dB Bandwidth
-3dB, 200mV
P-P
, load of 150
300
MHz
0.1dB Bandwidth
0.1dB, 200mV
P-P
, load of 150
60
MHz
Settling Time
1% Settling Time
2V
O
step, load of 150
10
ns
Crosstalk
Hostile Crosstalk Between any 2
Channels
100MHz
-70
dB
Worst Case Hostile Crosstalk One
Channel Affected by all Other Channels
Running the Same Signal
100MHz
-50
dB
Electrical Specifications
V
SA
= 5V, V
SD
= 3.3V, Gain = 2, R
L
= 150
, C
L
= 2.7pF, T
A
= 25°C.
(Continued)
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
MAX
UNIT
EL4544
5
FN7362.1
August 1, 2005
I/O Block Diagram of Video Signals
SYNC
B15
G15
R15
16x2:1
MUX
Ai
R
G
B
H
V
R0
L
L
2
2
2
B15
G15
R15
16x2:1
MUX
Bi
R
G
B
H
V
R0
B15
G15
R15
16x2:1
MUX
Ci
R
G
B
H
V
R0
B15
G15
R15
16x2:1
MUX
Di
R
G
B
H
V
R0
R
G
B
H
V
L
L
2
2
2
R
G
B
H
V
L
L
2
2
2
R
G
B
H
V
L
L
2
2
2
R
G
B
H
V
Rs
Gs
Bs
Hs
Vs
OutA =
(Ra, Ga, Ba + Ha, Va)
Ai
Bi
Ci
Di
Ax
Bx
Cx
Dx
Sx
OutB =
(Rb, Gb, Bb + Hb, Vb)
OutC =
(Rc, Gc, Bc + Hc, Vc)
OutD =
(Rd, Gd, Bd + Hd, Vd)
OutS = (Rs, Gs, Bs, Hs, Vs)
Ro
Go
Bo
Rs
Gs
Bs
2
2
2
Rso
Gso
Bso
L
L
Hs
Vs
OutSO = (Rso, Gso, Bs, Hs, Vs)
TRANSPARENT
OVERLAY
CALIBRATE/HOLD
2:1 PIXEL MUX
4x5 XPOINT MUX
NOTES:
1. Each output group is a 5 element vector
(R, G, B + H, V)
2. Each input group is a 3 element vector
(R, G, B)
3. All outputs drive back terminated 75
cable
SDI (SERIAL DATA INPUT)
SCLK (SERIAL CLOCK)
SEN (SERIAL CLOCK ENABLE/LATCH)
SDO (SERIAL DATA OUTPUT)
RESET (CLEARS ALL REGISTERS)
CONTROL REGISTERS
WHEN HI, DATA IS CLOCKED IN, WHEN
LO, DATA IS LATCHED TO ENABLE SELECTION
SYNC
SYNC
SYNC
2
2
2
2
2
2
2
2
2
2
2
2
INPUT GAIN
SELECTION
OUTPUT GAIN
SELECTION
EL4544