P-DSO-28-14

Data Sheet

2003-03-06

TrilithIC

Data Sheet

BTS 7751 G

Overview

1.1

Features

· Quad D-MOS switch driver
· Free configurable as bridge or quad-switch
· Optimized for DC motor management applications
· Low R

DS ON

: 70 m

high-side switch, 45 m low-

side switch (typical values @ 25

°C)

· Maximum peak current: typ. 14 A @ 25

°C=

· Very low quiescent current: typ. 5

µA @ 25 °C=

· Small outline, enhanced power P-DSO-package
· Full short-circuit-protection
· Operates up to 40 V
· Status flag diagnosis
· Overtemperature shut down with hysteresis
· Internal clamp diodes
· Open load detection in Off-mode
· Under-voltage detection with hysteresis
· PWM frequencies up to 1 kHz

1.2

Description

The BTS 7751 G is part of the TrilithIC family containing three dies in one package:
One double high-side switch and two low-side switches. The drains of these three
vertical DMOS chips are mounted on separated lead frames. The sources are connected
to individual pins, so the BTS 7751 G can be used in H-bridge- as well as in any other
configuration. Both the double high-side and the two low-side switches of the
BTS 7751 G are manufactured in SMART SIPMOS

technology which combines low

DS ON

vertical DMOS power stages with CMOS control circuitry. The high-side switch is

fully protected and contains the control and diagnosis circuitry. Also the low-side
switches are fully protected, the equivalent standard product is the BSP 78.
In contrast to the BTS 7750 G, the BTS 7751 G offers an open load in Off-mode
detection and slightly increased current limitation.

Type

Ordering Code

Package

BTS 7751 G

Q67007-A9553

P-DSO-28-14

BTS 7751 G

Data Sheet

2003-03-06

1.3

Pin Configuration
(top view)

Figure 1

28 DL1

25 DL1

27 SL1

26 SL1

24 DHVS

23 SH1

22 SH1

21 SH2

20 SH2

19 DHVS

18 DL2

15 DL2

16 SL2

17 SL2

DL1

DHVS

N.C.

DL1

IL1

GND

IH1

IH2

DHVS

DL2

N.C.

DL2

IL2

HS-Leadframe

LS-Leadframe

BTS 7751 G

Data Sheet

2003-03-06

Pins written in bold type need power wiring.

1.4

Pin Definitions and Functions

Pin No.

Symbol

Function

1, 3, 25, 28

DL1

Drain of low-side switch1, lead frame 1

IL1

Analog input of low-side switch1

N.C.

not connected

5, 10, 19, 24

DHVS

Drain of high-side switches and power supply voltage,
lead frame 2

GND

Ground

IH1

Digital input of high-side switch1

Status of high-side switches; open Drain output

IH2

Digital input of high-side switch2

N.C.

not connected

12, 14, 15, 18

DL2

Drain of low-side switch2, lead frame 3

IL2

Analog input of low-side switch2

16,17

SL2

Source of low-side switch2

20,21

SH2

Source of high-side switch2

22,23

SH1

Source of high-side switch1

26,27

SL1

Source of low-side switch1

To reduce the thermal resistance these pins are direct connected via metal bridges to the lead frame.

BTS 7751 G

Data Sheet

2003-03-06

1.5

Functional Block Diagram

Figure 2
Block Diagram

SH2

DHVS

IL1

GND

IH1

SL2

IH2

IL2

SL1

DL2

SH1

DL1

5,10,19,24

20,21

16, 17

Biasing and Protection

Diagnosis

Driver

OUT

0 L L

0 1 L H
1 0 H L
1 1 H H

22, 23

1,3,25,28

26, 27

12,14,15,18

Protection

Gate

Driver

Protection

Gate

Driver

BTS 7751 G

Data Sheet

2003-03-06

1.6

Circuit Description

Input Circuit
The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with
hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into
the necessary form for driving the power output stages. The inputs are protected by ESD
clamp-diodes.
The inputs IL1 and IL2 are connected to the internal gate-driving units of the N-channel
vertical power-MOS-FETs.

Output Stages
The output stages consist of an low

DS ON

Power-MOS H-bridge. In H-bridge

configuration, the D-MOS body diodes can be used for freewheeling when commutating
inductive loads. If the high-side switches are used as single switches, positive and
negative voltage spikes which occur when driving inductive loads are limited by
integrated power clamp diodes.

Short Circuit Protection
The outputs are protected against
output short circuit to ground
output short circuit to the supply voltage, and
overload (load short circuit).
An internal OP-Amp controls the Drain-Source-Voltage by comparing the DS-Voltage-
Drop with an internal reference voltage. Above this trippoint the OP-Amp reduces the
output current depending on the junction temperature and the drop voltage.
In the case of overloaded high-side switches the status output is set to low.
The fully protected low-side switches have no status output.

Overtemperature Protection
The high-side and the low-side switches also incorporate an overtemperature protection
circuit with hysteresis which switches off the output transistors. In the case of the high-
side switches, the status output is set to low.

Under voltage-Lockout (UVLO)
When

reaches the switch-on voltage

UVON

the IC becomes active with a hysteresis.

The High-Side output transistors are switched off if the supply voltage

drops below

the switch off value

UVOFF.

BTS 7751 G

Data Sheet

2003-03-06

Open Load Detection
Open load is detected by voltage measurement in Off state. If the output voltage exceeds
a specified level the error flag is set with a delay.

Status Flag
The status flag output is an open drain output with Zener-diode which requires a pull-up
resistor, c.f. the application circuit on page 14. Various errors as listed in the table
"Diagnosis" are detected by switching the open drain output ST to low. Forward current
in the integrated body diode of the high-side switch may cause undefined voltage levels
at the corresponding status output. The open load detection can be used to detect a
short to Vs as long as both low-side switches are off and R

is disconnected from 5V

by BCR192W.

Truth table and Diagnosis (valid only for the High-Side-Switches)

Flag

IH1

IH2

SH1

SH2

ST Remarks

Inputs

Outputs

Normal operation;
identical with functional truth table

0
0
1
1

0
1
0
1

L
L
H
H

L
H
L
H

1
1
1
1

stand-by mode
switch2 active
switch1 active
both switches
active

Open load at high-side switch 1

Open load at high-side switch 2

0
1
X
X

X
X
0
1

Z
H
X
X

X
X
Z
H

0
1
0
1

detected

Overtemperature high-side switch1

0
1

X
X

L
L

X
X

1
0

detected

Overtemperature high-side switch2

X
X

0
1

X
X

L
L

1
0

detected

Overtemperature both high-side switches

0
X
1

0
1
X

L
L
L

1
0
0

detected
detected

Under voltage

not detected

Inputs:

Outputs:

Status:

0 = Logic LOW

Z = Output in tristate condition

1 = No error

1 = Logic HIGH

L = Output in sink condition

0 = Error

X = don't care

H = Output in source condition

X = Voltage level undefined

BTS 7751 G

Data Sheet

2003-03-06

Electrical Characteristics

3.1

Absolute Maximum Ratings
40

°C <

< 150

°C

Parameter

Symbol

Limit Values Unit Remarks

min.

max.

High-Side-Switches (Pins DHVS, IH1,2 and SH1,2)

Supply voltage

0.3

Supply voltage for full short
circuit protection

S(SCP)

HS-drain current*

7.5

= 25°C;

< 100 ms

HS-input current

Pin IH1 and IH2

HS-input voltage

Pin IH1 and IH2

Note: * single pulse ** internally limited

Status Output ST

Status pull up voltage

0.3

5.4

Status Output current

Pin ST

Low-Side-Switches (Pins DL1,2, IL1,2 and SL1,2)

Drain-Source-Clamp voltage

DSL

= 0 V;

1 mA

Supply voltage for short
circuit protection

DSL(SCP)

= 5 V

= 10 V

LS-drain current*

7.5

= 25°C;

< 100 ms

LS-input voltage

0.3

Note: * single pulse ** internally limited

Temperatures

Junction temperature

150

°C

Storage temperature

stg

150

°C

BTS 7751 G

Data Sheet

2003-03-06

Note: Maximum ratings are absolute ratings; exceeding any one of these values may

cause irreversible damage to the integrated circuit.

Note: In the operating range the functions given in the circuit description are fulfilled.

Thermal Resistances (one HS-LS-Path active)

LS-junction case

thjC L

K/W measured to pin 3 or 12

HS-junction case

thjC H

K/W measured to pin 19

Junction ambient

thja

= T

j(HS)

/(P

(HS)

(LS)

)

thja

K/W device soldered to

reference PCB with
6 cm

cooling area

ESD Protection (Human Body Model acc. MIL STD 883D, method 3015.7 and EOS/
ESD assn. standard S5.1 - 1993)

Input LS-Switch

ESD

Input HS-Switch

ESD

Status HS-Switch

ESD

Output LS and HS-Switch

ESD

all other pins connected
to Ground

3.2

Operating Range
40

°C <

< 150

°C

Parameter

Symbol

Limit Values Unit

Remarks

min.

max.

Supply voltage

UVOFF

After

rising

above

UVON

Input voltages

0.3

Input voltages

0.3

Output current

Junction temperature

150

°C

3.1

Absolute Maximum Ratings (cont'd)
40

°C <

< 150

°C

Parameter

Symbol

Limit Values Unit Remarks

min.

max.

BTS 7751 G

Data Sheet

2003-03-06

3.3

Electrical Characteristics

SH1

SH2

SL1

SL2

= 0 A; 40

°C <

< 150

°C; 8 V <

< 18 V

unless otherwise specified
Parameter

Symbol

Limit Values

Unit Test Condition

min.

typ.

max.

Current Consumption HS-switch

Quiescent current

µA

IH1 = IH2 = 0 V

= 25

°C

µA

IH1 = IH2 = 0 V

Supply current

2.2

4.2

IH1 or IH2 = 5 V

= 12 V

4.4

8.4

IH1 and IH2 = 5 V

= 12 V

Leakage current of
high-side switch

SH LK

µA

= 0 V

Leakage current through
logic GND in free wheeling
condition

LKCL

= 3 A

Current Consumption LS-switch

Input current

µA

= 5 V;

normal operation

160

300

µA

= 5 V;

failure mode

Leakage current of low-side
switch

DL LK

µA

= 0 V

Under Voltage Lockout (UVLO) HS-switch

Switch-ON voltage

UVON

4.8

increasing

Switch-OFF voltage

UVOFF

1.8

3.5

decreasing

Switch ON/OFF hysteresis

UVHY

UVON

UVOFF

BTS 7751 G

Data Sheet

2003-03-06

Output stages

Inverse diode of high-side
switch; Forward-voltage

0.8

1.2

= 3 A

Inverse diode of low-side
switch; Forward-voltage

0.8

1.2

= 3 A

Static drain-source
on-resistance of high-side
switch

DS ON H

= 1 A

= 25

°C

Static drain-source
on-resistance of low-side
switch

DS ON L

= 1 A;

= 5 V

= 25

°C

Static path on-resistance

DS ON

285

DS ON H

+ R

DS ON L

= 1 A;

Short Circuit of high-side switch to GND

Initial peak SC current

SCP H

= 40 °C

11.5

= + 25 °C

11.5

= + 150 °C

Short Circuit of high-side switch to

Output pull-down-resistor

DSL

= 3 V

Short Circuit of low-side switch to

Initial peak SC current

SCP L

= 40

°C

= 25

°C

11.5

= 150

°C

Note:

Integrated protection functions are designed to prevent IC destruction under fault conditions. Protection
functions are not designed for continuous or repetitive operation.

3.3

Electrical Characteristics (cont'd)

SH1

SH2

SL1

SL2

= 0 A; 40

°C <

< 150

°C; 8 V <

< 18 V

unless otherwise specified
Parameter

Symbol

Limit Values

Unit Test Condition

min. typ.

max.

BTS 7751 G

Data Sheet

2003-03-06

Thermal Shutdown

Thermal shutdown junction
temperature

j SD

155

180

190

°C

Thermal switch-on junction
temperature

j SO

150

170

180

°C

Temperature hysteresis

°C

jSD

jSO

Status Flag Output ST of high-side switch

Low output voltage

ST L

0.2

0.6

= 1.6 mA

Leakage current

ST LK

µA

= 5 V

Zener-limit-voltage

ST Z

5.4

= 1.6 mA

Open load detection in Off condition

Open load detection
voltage

OUT(OL)

1.8

2.8

Switching times of high-side switch

Turn-ON-time;
to 90%

180

µs

Load

= 12

= 12 V

Turn-OFF-time;
to 10%

OFF

180

µs

Load

= 12

= 12 V

Slew rate on 10 to 30%

dV/dt

1.2

µs R

Load

= 12

= 12 V

Slew rate off 70 to 40%

-dV/
dt

OFF

1.5

µs R

Load

= 12

= 12 V

Note:

switching times are not subject to produvtion tests - specified by design

3.3

Electrical Characteristics (cont'd)

SH1

SH2

SL1

SL2

= 0 A; 40

°C <

< 150

°C; 8 V <

< 18 V

unless otherwise specified
Parameter

Symbol

Limit Values

Unit Test Condition

min.

typ.

max.

BTS 7751 G

Data Sheet

2003-03-06

Note: The listed characteristics are ensured over the operating range of the integrated

circuit. Typical characteristics specify mean values expected over the production
spread. If not otherwise specified, typical characteristics apply at

= 25

°C and

the given supply voltage.

Switching times of low-side switch

Turn ON time to 10%

= 0 to 10 V

150

µs

Load

= 10

= 12 V

Turn OFF time;
to 90%

OFF

150

µs

Load

= 10

= 12 V

Slew rate on 70 to 50%

= 0 to 10 V

-dV/dt

1.5

µs R

Load

= 4.7

= 12 V

Slew rate off 50 to 70%

= 0 to 10 V

dV/dt

OFF

1.5

µs R

Load

= 4.7

= 12 V

Note:

switching times are not subject to produvtion tests - specified by design

Control Inputs of high-side switches GH 1, 2

H-input voltage

IH High

2.5

L-input voltage

IH Low

Input voltage hysteresis

IH HY

0.3

H-input current

IH High

µA

= 5 V

L-input current

IH Low

µA

= 0.4 V

Input series resistance

2.7

5.5

Zener limit voltage

IH Z

5.4

= 1.6 mA

Control Inputs GL1, 2

Gate-threshold-voltage

IL th

0.9

1.7

2.2

= 2 mA

3.3

Electrical Characteristics (cont'd)

SH1

SH2

SL1

SL2

= 0 A; 40

°C <

< 150

°C; 8 V <

< 18 V

unless otherwise specified
Parameter

Symbol

Limit Values

Unit Test Condition

min. typ.

max.

BTS 7751 G

Data Sheet

2003-03-06

Figure 3
Test Circuit

HS-Source-Current

Named during Short
Circuit

Named during Leakage-
Cond.

SH1,2

SCP H

DL LK

SH2

DHVS

IL1

GND

IH1

SL2

5,10,19,24

20,21

16,17

Biasing and Protection

22,23

1,3,25,28

IH2

IL2

26,27

12,14,15,18

SL1

DL2

SH1

DL1

GND

LKCL

=12V

100µF

470nF

FH1,2

SH2

DL2

SH1

DL1

DL LK 2

DL LK 1

DSL1

-V

FL1

DSL2

-V

FL2

-V

FH2

DSH2

-V

FH1

DSH1

UVON

UVOFF

SL2

SL1

SCP L 1

SCP L 2

IL2

IL th 2

IL1

IL th 1

STL

STZ

IH1

IH2

Gate

Driver

Gate

Driver

Diagnosis

ST LK

IH1

IL1

IL2

Protection

Gate

Driver

Protection

Gate

Driver

BTS 7751 G

Data Sheet

2003-03-06

Figure 4
Application Circuit

SH2

DHVS

IL1

GND

IH1

SL2

5,10,19,24

20,21

16,17

TLE

4278G

=12V

D01
Z39

10µF

47nF

Reset

Watchdog

22µF

WD R

GND

µP

Protection

Gate

Driver

Protection

Gate

Driver

Biasing and Protection

22,23

1,3,25,28

IH2

IL2

26,27

12,14,15,18

SL1

DL2

SH1

DL1

100 k

10 k

Gate

Driver

Gate

Driver

Diagnosis

In case of V

DSL

<-0.6V or reverse battery the current into the µC might be limited by external resitors to protect the µC

optional for
open load
in off

1 k

to µC

BCR192W

BTS 7751 G

Data Sheet

2003-03-06

Package Outlines

18.1

-0.4

Index Marking

2.45

-0.1

7.6

10.3

±0.3

-0.2

0.2

2.65 max

-0.2

1.27

0.23

+0.09

0.1

0.4

0.35 x 45°

+0.8

+0.15

0.35

8° max

0.2 28x

2) Does not include dambar protrusion of 0.05 max per side

1) Does not include plastic or metal protrusions of 0.15 max rer side

GPS05123

P-DSO-28-14
(Plastic Transistor Single Outline Package)

051

Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book "Package Information".

Dimensions in mm

SMD = Surface Mounted Device

BTS 7751 G

Data Sheet

2003-03-06

Edition 2003-01

Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81669 München, Germany

Infineon Technologies AG 3/13/03.

Attention please!

The information herein is given to describe certain components and shall not be considered as a guarantee of
characteristics.

Terms of delivery and rights to technical change reserved.

We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.

Infineon Technologies is an approved CECC manufacturer

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For further information on technology, delivery terms and conditions and prices please contact your nearest Infi-
neon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list).

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Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
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of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.

Part Number BTS7751G