Key Features
x
SCSI Plug and Play
-- Host bus adapter with 3 SCSI connectors
x
Ultra-Fast response for Fast-20 SCSI
x
Split disconnect for mixing 16-bit (wide) or
8-bit (narrow) buses
x
35MHz channel bandwidth
x
Sleep-mode current less than 150µA
x
NO external compensation capacitors
x
Compatible with active negation drivers
x
Hot swap compatible
x
Superior replacement for the LX5121 and
UCC5621
Block Diagrams
+
Enable
Logic
Current
Biasing
Circuit
24mA Current
Limiting Circuit
Term Power
DATA OUTPUT
PIN DB (0)
1 of 27 Channels
DISCONNECT 1
V
TERM
V
TERM
DISCONNECT 2
1.4V
2.85V
5121_01.eps
2
2
7-Line Plug and Pla
7-Line Plug and Pla
y
y
SCSI T
SCSI T
er
er
minat
minat
or
or
The 27-channel IMP5121 SCSI terminator is part of IMP's family of high-
performance SCSI terminators that deliver true UltraSCSI performance.
The BiCMOS design offers superior performance over first generation
linear regulator/resistor based terminators.
IMP's new architecture employs high-speed adaptive elements for each
channel, thereby providing the fastest response possible - typically
35MHz, which is 100 times faster than the older linear regulator termi-
nator approach. The bandwidth of terminators based on the older
regulator/resistor terminator architecture is limited to 500kHz since a
large output stabilization capacitor is required. The IMP architecture
eliminates the external output compensation capacitor and the need
for transient output capacitors while maintaining pin compatibility
with first generation designs. Reduced component count is inherent
with the IMP5121.
The IMP5121 architecture tolerates marginal system designs. A key
improvement offered by the IMP5121 lies in its ability to insure reliable,
error-free communications even in systems which do not adhere to rec-
ommended SCSI hardware design guidelines, such as improper cable
lengths and impedance. Frequently, this situation is not controlled by the
peripheral or host designer.
For portable and configurable peripherals, the IMP5121 can be placed in
a sleep mode with TTL compatible signals. Quiescent current is less than
150
µ
A when disabled.
For Host Bus Adapters and three SCSI connectors, the
IMP5121 has multiple disable pins for Plug and Play SCSI
capability. It also splits the upper nine termination lines for
mixing 16-bit (wide) and 8-bit (narrow) buses with minimal
board trace capacitance.
© 2002 IMP, Inc. 408-432-9100/www.impweb.com
1
IMP5121
IMP5121
D
ATA
C
OMMUNICATIONS
2
408-432-9100/www.impweb.com © 2002 IMP, Inc.
Pin Configuration
Ordering Information
Absolute Maximum Ratings
1
16
T6
15
DISCONNECT 2
14
DISCONNECT 1
13
GND
12
GND
11
GND
10
GND
9
T5
8
T4
1
T19
22
T22
19
T9
18
T8
17
T7
29 T13
30 T14
31 V
1
32 GND
DB Package
33 GND
34 GND
35 GND
36 NC
37 T15
7
T3
38 T16
6
W2
39 T17
5
W1
40 N1
4
T2
41 T18
3
T1
42 T25
2
T20
43 T26
44 T27
23 T23
26 NC
20
T10
25 T11
21
T21
24 T24
27 NC
28 T12
5121_02.eps
IMP5121
SSOP-44
16
T6
15
DISCONNECT 2
14
DISCONNECT 1
13
GND
12
HEAT SINK
HEAT SINK
HEAT SINK
HEAT SINK
HEAT SINK
HEAT SINK
GND
11
GND
10
GND
9
T5
8
T4
1
T19
28
T22
19
T9
18
T8
17
T7
41
T13
42
T14
43
V
1
44
GND
PW Package
45 HEAT SINK
HEAT SINK
HEAT SINK
HEAT SINK
HEAT SINK
HEAT SINK
GND
46 GND
47 GND
48 NC
49 T15
7
T3
50 T16
6
W2
51 T17
5
W1
52 N1
4
T2
53 T18
3
T1
54 T25
2
T20
55 T26
56 T27
29 T23
38
NC
20
T10
37
T11
21
T21
36
T24
22
35
23
34
24
33
25
32
26
31
27
30
39
NC
40
T12
5121_02a.eps
IMP5121
TSSOP-56
r
e
b
m
u
N
t
r
a
P
e
g
n
a
R
e
r
u
t
a
r
e
p
m
e
T
e
g
a
k
c
a
P
B
D
C
1
2
1
5
P
M
I
0°
5
2
1
o
t
C
°C
P
O
S
S
c
i
t
s
a
l
P
n
i
p
-
4
4
W
P
C
1
2
1
5
P
M
I
0°
5
2
1
o
t
C
°C
P
O
S
S
T
c
i
t
s
a
l
P
n
i
p
-
6
5
3
t
a
.
1
0
t
_
1
2
1
5
Thermal Data
TermPwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . +7V
Continuous Output Voltage Range . . . . . . . . 0V to 5.5V
Continuous Disable Voltage Range . . . . . . . . 0V to 5.5V
Operating Junction Temperature . . . . . . . . . . 150
°
C
Note:
1. Exceeding these ratings could cause damage to the device. All
voltages are with respect to Ground. Currents are positive
into, negative out of the specified terminal.
Storage Temperature Range . . . . . . . . . . . . . . 65
°
C to 150
°
C
Lead Temperature (Soldering, 10 sec.) . . . . . . 300
°
C
PW and DB Package
Thermal Resistance Junction-to-Ambient,
JA
. . . . . . 50
°
C/W
Junction Temperature Calculation: T
J
= T
A
+ (P
D
x
JA
).
The
JA
numbers are guidelines for the thermal performance of the
device/pc-board system. All of the ambient airflow is assumed.
IMP5121
IMP5121
© 2002 IMP, Inc.
Data Communications 3
Recommended Operating Conditions
r
e
t
e
m
a
r
a
P
l
o
b
m
y
S
n
i
M
p
y
T
x
a
M
s
t
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U
e
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t
l
o
V
r
w
p
m
r
e
T
V
M
R
E
T
0
.
4
5
.
5
V
e
g
a
t
l
o
V
t
u
p
n
I
e
l
b
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L
h
g
i
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V
H
I
2
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R
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T
V
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a
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o
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t
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p
n
I
e
l
b
a
s
i
D
l
e
v
e
L
w
o
L
V
L
I
0
8
.
0
V
C
1
2
1
5
P
M
I
e
g
n
a
R
e
r
u
t
a
r
e
p
m
e
T
n
o
i
t
c
n
u
J
g
n
i
t
a
r
e
p
O
0
5
2
1
C
°
.
l
a
n
o
i
t
c
n
u
f
s
i
e
c
i
v
e
d
e
h
t
h
c
i
h
w
r
e
v
o
e
g
n
a
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h
t
e
t
a
c
i
d
n
i
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n
o
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t
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d
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o
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i
t
a
r
e
p
o
d
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d
n
e
m
m
o
c
e
R
.
2
:
e
t
o
N
s
p
e
.
2
0
t
_
5
2
2
5
Electrical Characteristics
Unless otherwise specified, these specifications apply at an ambient operating temperature of T
A
=
25
°
C. TermPwr = 4.75V. Low duty cycle
pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.
r
e
t
e
m
a
r
a
P
l
o
b
m
y
S
s
n
o
i
t
i
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n
o
C
n
i
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p
y
T
x
a
M
s
t
i
n
U
e
g
a
t
l
o
V
h
g
i
H
t
u
p
t
u
O
V
T
U
O
5
6
.
2
5
8
.
2
V
t
n
e
r
r
u
C
y
l
p
p
u
S
r
w
P
m
r
e
T
I
C
C
n
e
p
O
=
s
e
n
il
a
t
a
d
ll
A
12
0
2
A
m
.
0
=
s
e
n
il
a
t
a
d
ll
A
5V
5
3
6
0
7
6
e
l
b
a
s
i
D
s
n
i
P
2
,
1
V
8
.
0
<
0
5
0
5
1
A
µ
t
n
e
r
r
u
C
t
u
p
t
u
O
I
T
U
O
V
T
U
O
V
5
.
0
=
0
2
2
2
4
2
A
m
t
n
e
r
r
u
C
t
u
p
n
I
t
c
e
n
n
o
c
s
i
D
I
N
I
V
0
=
s
n
i
P
T
C
E
N
N
O
C
S
I
D
0
1
A
µ
t
n
e
r
r
u
C
e
g
a
k
a
e
L
t
u
p
t
u
O
I
L
O
V
,
V
8
.
0
<
s
n
i
P
T
C
E
N
N
O
C
S
I
D
O
V
2
.
0
=
1
A
µ
h
t
d
i
w
d
n
a
B
l
e
n
n
a
h
C
W
B
5
3
z
H
M
l
e
n
n
a
h
C
r
e
p
,
t
n
e
r
r
u
C
k
n
i
S
n
o
i
t
a
n
i
m
r
e
T
I
K
N
I
S
V
T
U
O
V
4
=
7
A
m
s
p
e
.
3
0
t
_
1
2
1
5
IMP5121
IMP5121
4
408-432-9100/www.impweb.com © 2002 IMP, Inc.
Application Information
IMP5121 Maximizes Line Current
Cable transmission theory suggests to optimize signal speed and
quality, the termination should act both as an ideal voltage refer-
ence when the line is released (deasserted) and as an ideal
current source when the line is active (asserted). Common active
terminators which consist of linear regulators in series with resis-
tors (typically 110
) are a compromise. With coventional linear
terminators as the line voltage increases the amount of current
decreases linearly by the equation;
The IMP5121, with its unique new architecture, applies the max-
imum amount of current regardless of line voltage until the
termination high threshold (2.85V) is reached.
Acting as a near ideal line terminator, the IMP5121 closely repro-
duces the optimum case when the device is enabled. To enable
the device the DISC1 and DISC2 pins must be driven per Table 1.
When enabled, quiescent current is 12mA and the device will
respond to line demands by delivering 24mA on assertion and by
imposing 2.85V on de-assertion.
Disable/Sleep Mode
Disable mode places the device in a sleep state, where quiescent
current is reduced to less than 150
µ
A. When disabled, all
outputs are in a high impedance state. Sleep mode can be used
for power conservation or to remove the terminator from the
SCSI chain.
An additional feature of the IMP5121 is its compatibility with
active negation drivers.
V
V
R
I
REF
LINE
-
(
)
=
.
Figure 3.
5121_03.eps
1 Meter, AWG 28
IMP5121
Receiver
Driver
IMP5121
Figure 1. Receiving Waveform 20MHz
Figure 2. Driving Waveform 20MHz
IMP5121
IMP5121
© 2002 IMP, Inc.
Data Communications 5
1
T
C
E
N
N
O
C
S
I
D
2
T
C
E
N
N
O
C
S
I
D
1
W
2
W
1
N
8
1
T
-
1
T
7
2
T
-
9
1
T
H
L
C
D
C
D
C
D
d
e
l
b
a
n
E
d
e
l
b
a
s
i
D
L
H
C
D
C
D
C
D
d
e
l
b
a
s
i
D
d
e
l
b
a
n
E
L
L
C
D
C
D
C
D
d
e
l
b
a
s
i
D
d
e
l
b
a
s
i
D
H
H
H
H
H
d
e
l
b
a
n
E
d
e
l
b
a
n
E
H
H
H
H
L
d
e
l
b
a
n
E
d
e
l
b
a
n
E
H
H
H
L
H
d
e
l
b
a
n
E
d
e
l
b
a
n
E
H
H
H
L
L
d
e
l
b
a
s
i
D
d
e
l
b
a
n
E
H
H
L
H
H
d
e
l
b
a
n
E
d
e
l
b
a
n
E
H
H
L
H
L
d
e
l
b
a
s
i
D
d
e
l
b
a
n
E
H
H
L
L
H
d
e
l
b
a
s
i
D
d
e
l
b
a
s
i
D
H
H
L
L
L
d
e
l
b
a
s
i
D
d
e
l
b
a
s
i
D
s
p
e
.
4
0
t
_
1
2
1
5
Table 1. Power Up/ Power Down Function Table
Figure 4. Plug and Play Diagram
Application Information
IMP5121
Internal Wide
Internal Narrow
External
Wide
5121_05.eps
For Plug and Play SCSI auto-termination
disabling, connect pin 50 of the External Wide
SCSI connector to W1 of the IMP5121,
connect pin 50 of the Internal Wide SCSI
connector to W2 of the IMP5121, and connect
pin 22 of the Internal Narrow connector to N1
of the IMP5121.
IMP5121
IMP5121
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