1
IDTQS3ST253
HIGH-SPEED CMOS SYNCHROSWITCH DUAL 4:1 MUX
INDUSTRIAL TEMPERATURE RANGE
NOVEMBER 1999
1999 Integrated Device Technology, Inc.
DSC-5533/-
c
IDTQS3ST253
INDUSTRIAL TEMPERATURE RANGE
QUICKSWITCH
®
PRODUCTS
HIGH-SPEED CMOS SYNCHRO-
SWITCHTM DUAL 4:1 MUX/DEMUX
WITH ACTIVE TERMINATORS
DESCRIPTION:
The QS3ST253 is a high-speed CMOS dual 4:1 multiplexer/demultiplexer
with active terminators (bus-hold circuits) on the demux side. Port selection
and connection, controlled by SEL signals, can be either asynchronous or
synchronous. In the synchronous mode, the A, B, C, or D port to Y port
connection is updated on the rising edge of the input clock CLK. Once the
port-to-port connection is made, data flow can be bi-directional with a typical
250ps propagation delay through the switch. Clock Enable, overriding
Asynchronous Enable, and Asynchronous Select controls provide addi-
tional design flexibility.
The bus-hold circuits latch the last data driven on the demux side,
providing infinite hold time and glitch-free signal transitions. Synchronous
controls and bus-hold ease timing constraints in many high speed data mux/
demux applications, such as bank interleaving.
The QS3ST253 is characterized for operation at -40°C to +85°C.
Y
0
Y
1
A
0
B
0
C
0
A
1
C
1
D
0
B
1
D
1
T
T
T
T
T
T
T
T
T
=
R
CLK
CLKE Nn
O E
0
SY N C
O E
1
SE L
0
CO NTRO L
LO G IC
SE L
1
Bank 0
Bank 1
FUNCTIONAL BLOCK DIAGRAM
FEATURES:
-
Enhanced N channel FET with no inherent diode to Vcc
-
Bidirectional signal flow
-
Flow-through pinout
-
Zero propagation delay, zero ground bounce
-
2 banks of 4:1 Mux/Demux
-
Port select synchronous to the clock
-
Undershoot clamp diodes on all switch and control pins
-
Clock enable and Asynchronous enable
-
"Bus-hold" terminators on the Demux side
-
Asynchronous SEL option
-
Break-before-make feature
-
Available in 20-pin QSOP Packages
-
Bus-hold eliminates floating bus lines and reduces static power
consumption
APPLICATIONS
-
Video, audio, graphics switching, muxing
2
INDUSTRIAL TEMPERATURE RANGE
IDTQS3ST253
HIGH-SPEED CMOS SYNCHROSWITCH DUAL 4:1 MUX
PIN CONFIGURATION
NC
A
0
A
1
B
0
B
1
GND
2
3
4
5
6
7
8
13
14
15
16
17
18
19
20
1
9
10
11
12
Vcc
CLKEN
CLK
SYNC
C
0
C
1
D
0
D
1
OE
0
SEL
1
Y
0
Y
1
SEL
0
OE
1
SO20-8
QSOP
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Description
Max.
Unit
V
TERM(2)
Supply Voltage to Ground
0.5 to +7
V
V
TERM(3)
DC Switch Voltage V
S
0.5 to +7
V
V
TERM(3)
DC Input Voltage V
IN
0.5 to +7
V
V
AC
AC Input Voltage (pulse width
20ns)
-3
V
I
OUT
DC Output Current
120
mA
P
MAX
Maximum Power Dissipation (T
A
= 85
°
C)
.82
W
T
STG
Storage Temperature
65 to +150
°C
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. Vcc Terminals.
3. All terminals except Vcc.
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz, V
IN
= 0V, V
OUT
= 0V)
Pins
Typ.
Max.
(1)
Unit
Control Inputs
4
5
pF
Quickswitch Channels
Demux
5
7
pF
(Switch OFF)
Mux
13
14
pF
NOTE:
1. This parameter is guaranteed at characterization but not production
tested.
PIN DESCRIPTION
Pin Names
I/O
Description
A
0
- D
0
I/O
Bank 0 Demux Ports
A
1
- D
1
I/O
Bank 1 Demux Ports
Y
0
, Y
1
I/O
Mux Port
SEL
0,
SEL
1
I
Select Inputs
CLK
I
Clock
CLKEN
I
Clock Enable
OE
0,
OE
1
I
Output Enable
SYNC
I
Synchronous Enable
3
IDTQS3ST253
HIGH-SPEED CMOS SYNCHROSWITCH DUAL 4:1 MUX
INDUSTRIAL TEMPERATURE RANGE
2:1
M U X
SE L
0
C LK EN
C LK
SY N C
O E
0
2:1
M U X
D
Q
To Ba nk 0 Sw itches
To Bank 1 Sw itches
2:1
M U X
SE L
1
2:1
M U X
D
Q
O E
1
D EC O DE
LO GIC
AN D
SW ITC H
C ON TRO L
CONTROL LOGIC
FUNCTION TABLE
(1)
Control Inputs
Port Status
SYNC
OE
0
OE
1
CLK
CLKEN
SEL
0
SEL
1
Y
0
Y
1
L
L
L
L
L
L
A
0
A
1
L
L
L
L
H
L
B
0
B
1
L
L
L
L
L
H
C
0
C
1
L
L
L
L
H
H
D
0
D
1
L
H
H
L
X
X
Hold Previous Data
(2)
(Switch OFF)
Hold Previous Data
(2)
(Switch OFF)
L
L
L
H
X
X
Hold Previous Mux connection
(3)
(Switch ON)
Hold Previous Mux connection
(3)
(Switch ON)
L
H
H
H
X
X
Hold Previous Data
(4)
(Switch OFF)
Hold Previous Data
(4)
(Switch OFF)
H
L
L
X
X
L
L
A
0
A
1
H
L
L
X
X
H
L
B
0
B
1
H
L
L
X
X
L
H
C
0
C
1
H
L
L
X
X
H
H
D
0
D
1
H
H
H
X
X
X
X
Hold Previous Data
(2)
(Switch OFF)
Hold Previous Data
(2)
(Switch OFF)
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
= Low-to-High Transition
2. Mux switches are turned off and the terminators (last value latches) hold the previous data state. The port connections can be changed by the SEL
input.
3. The contents of the "Mux select register" are unchanged and the previous Mux connection is unchanged. The output (Mux port) data state will
depend on the present data state of the input (Demux port).
4. The contents of the "Mux select register" are unchanged and the last value latch holds the previous data state.
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INDUSTRIAL TEMPERATURE RANGE
IDTQS3ST253
HIGH-SPEED CMOS SYNCHROSWITCH DUAL 4:1 MUX
R
ON
(ohms)
V
IN
(Volts)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
2
4
6
8
10
12
14
16
TYPICAL ON RESISTANCE vs V
IN
AT V
CC
= 5V
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= -40°C to +85°C, V
CC
= 5.0V ± 10%
Symbol
Parameter
Test Conditions
Min.
Typ.
(1)
Max.
Unit
V
IH
Input HIGH Voltage
Guaranteed Logic HIGH for Control Pins
2
--
--
V
V
IL
Input LOW Voltage
Guaranteed Logic LOW for Control Pins
--
--
0.8
V
I
IN
Input Leakage Current (Control Inputs)
0V
V
IN
Vcc
--
0.01
±1
µ
A
I
OZ
Off-State Current (Hi-Z)
0V
Y
Vcc
--
0.01
±1
µ
A
R
ON
Switch On Resistance
(2)
Vcc = Min., V
IN
= 0V
,
I
ON
= 30mA
--
7
9
Vcc = Min., V
IN
= 2.4V
,
I
ON
= 15mA
--
10
13
I
BHL
Input Hold Current
(3,4)
Vcc = Min.
V
IN
= 0.8V
60
--
--
µ
A
I
BHH
(A, B, C, D)
Switch OFF
V
IN
= 2V
60
--
--
I
BH
Input Current
(5)
Vcc = Max.
V
IN
= 0V or Vcc
--
--
±50
µ
A
(A, B, C, D)
0.8 < V
IN
< 2V
--
--
±500
NOTES:
1. Typical values are at V
CC
= 5.0V, T
A
= 25°C.
2. Measured by voltage drop between A/B/C/D and Y pin at indicated current through the switch. R
ON
is guaranteed but not production tested.
3. I
BHL
is the minimum sustaining "sink" current at the input for V
IN
= 0.8V. This parameter signifies the latching capability of the bus-hold circuit in
logic LOW state.
4. I
BHH
is the minimum sustaining "source" current at the input for V
IN
= 2V. This parameter signifies the latching capability of the bus-hold circuit in
logic HIGH state.
5. I
BH
is the magnitude of the input current specified under two conditions:
a)
Input voltage at GND or Vcc. This indicates the input current under steady-state condition.
b)
Input voltage between 0.8V and 2V (TTL input threshold range). This indicates the maximum input current during transient condition. The
driver connected to the input must overcome this current requirement in order to switch the logic state of the bus-hold circuit.
5
IDTQS3ST253
HIGH-SPEED CMOS SYNCHROSWITCH DUAL 4:1 MUX
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions
(1)
Max.
Unit
I
CCQ
Quiescent Power Supply Current
V
CC
= Max., V
IN
= GND or Vcc, f = 0
3
µ
A
I
CC
Power Supply Current per Control Input HIGH
(2)
V
CC
= Max., V
IN
= 3.4V, f = 0
1.5
mA
I
CCD
Dynamic Power Supply Current per MHz
(3)
V
CC
= Max., A/B/C/D and Y pins open
Control Input Toggling at 50% Duty Cycle
0.25
mA/MHz
NOTES:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.
2. Per TLL driven input (V
IN
= 3.4V, control inputs only). A/B/C/D and Y pins do not contribute to
Icc
.
3. This current applies to the control inputs only and represents the current required to switch internal capacitance at the specified frequency. The
A/B/C/D and Y inputs generate no significant AC or DC currents as they transition. This parameter is guaranteed but not production tested.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
T
A
= -40°C to +85°C, V
CC
= 5.0V ± 10%
C
LOAD
= 50pF, R
LOAD
= 500
unless otherwise noted.
Symbol
Parameter
Min.
Typ.
Max.
Unit
t
PLH
t
PHL
Data Propagation Delays
(1,2)
A/B/C/D to Y, Y to A/B/C/D
--
0.25
--
ns
t
SEC
Clock Enable to Clock Setup Time
3
--
--
ns
t
HEC
Clock Enable to Clock Hold Time
0
--
--
ns
t
CSO
Clock to Switch Turn-On Delay
(3)
0.5
--
7
ns
t
ASO
Asynchronous Select to Switch Turn-On Delay
(3)
0.5
--
7
ns
t
W
Clock Pulse Width HIGH
3
--
--
ns
t
SCS
SEL to Clock Setup Time
3
--
--
ns
t
HCS
SEL to Clock Hold Time
0
--
--
ns
t
PZL
t
PZH
Asynchronous Enable to Switch Turn-On Delay
(3)
1.5
--
5.2
ns
t
PLZ
t
PHZ
Asynchronous Enable to Switch Turn-Off Delay
(1,3)
1.5
--
4.8
ns
NOTES:
1. This parameter is guaranteed but not production
tested.
2. The bus switch contributes no propagation delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time
constant for the switch alone is of the order of 0.25ns for 50pF. Since this time constant is much smaller than the rise and fall times of typical
driving signals, it adds very little propagation delay to the system. Propagation delay of the bus switch, when used in a system, is determined by the
driving circuit on the driving side of the switch and its interaction with the load on the driven side.
3. Minimums guaranteed but not production
tested.
6
INDUSTRIAL TEMPERATURE RANGE
IDTQS3ST253
HIGH-SPEED CMOS SYNCHROSWITCH DUAL 4:1 MUX
TIMING WAVEFORMS - SYNCHRONOUS MODE, DEMUX FUNCTION
SY NC
CLK EN
CLK
SEL
0
, S EL
1
Port Y
Port A
Port D
HO LD PR EVIO US DATA, DATA 1
HO LD PR EVIO US DATA, DATA 2
DATA 1
DATA 2
INV ALID D ATA
DATA
1
DATA 0
INV ALID D ATA
t
SEC
t
HEC
t
SC S
t
HC S
t
SC S
t
HC S
t
PLH ,
t
PHL
t
CSO
t
PLH ,
t
PHL
t
CSO
O E
0
, O E
1
DATA 1
DATA 2
DATA 0
EXAMPLE: PORT A TO PORT D/PORT Y
7
IDTQS3ST253
HIGH-SPEED CMOS SYNCHROSWITCH DUAL 4:1 MUX
INDUSTRIAL TEMPERATURE RANGE
TIMING WAVEFORMS - SYNCHRONOUS MODE, MUX FUNCTION
S Y N C
C L K E N
C L K
S E L 0
P o rt A
P o rt B
P o rt Y
D A T A 1
D A T A 2
IN V A L ID D A T A
D A T A 3
D A T A 4
t
S E C
t
H E C
t
S C S
t
H C S
t
S C S
t
H C S
D A T A 1
D A T A 2
D A T A 3
D A T A 4
t
C S O
t
P L H ,
t
P H L
t
C S O
t
P L H ,
t
P H L
EXAMPLE: PORT A/PORT D TO PORT Y
8
INDUSTRIAL TEMPERATURE RANGE
IDTQS3ST253
HIGH-SPEED CMOS SYNCHROSWITCH DUAL 4:1 MUX
TIMING WAVEFORMS - ASYNCHRONOUS MODE, MUX FUNCTION
SYNC
Port A
Port D
Port Y
INVALID
DATA
DATA1
DATA2
INVALID D ATA
DATA3
INVALID DATA
DATA1
DATA2
DATA3
DATA3
t
PLH ,
t
PHL
t
PLH ,
t
PHL
t
ASO
t
PLZ,
t
PHZ
t
PZL,
t
PZH
SEL
0
, SEL
1
OE
0
, OE
1
EXAMPLE: PORT A/PORT D TO PORT Y
9
IDTQS3ST253
HIGH-SPEED CMOS SYNCHROSWITCH DUAL 4:1 MUX
INDUSTRIAL TEMPERATURE RANGE
I
B H
+500
Sinking
C urrent
( + )
I
BHL
I
B H
I
BH H
+60
+20
60
20
+60 I
B HL
0.8V
2V
V
IH
60 I
B HL
V
IL
Sourcing
C urrent
( )
I
B H
500
Vcc
+20 I
BH
20 I
BH
Voltage
V
T
V-I CHARACTERISTICS OF BUS-HOLD CIRCUIT
V
T
Threshold Voltage
1.5V
V
IL
.8 V
IH
2V
ACTIVE TERMINATOR OR BUS-HOLD CIRCUIT
The Active Terminator circuit, also known as the bus-hold circuit, is configured as a "weak latch" with positive feedback. When connected to a
TTL or CMOS input port, the bus-hold circuit holds the last logic state at the input when the input is "disconnected" from the driver. When the output
of a device connected to such an input attempts a logic level transition, it will overdrive the bus-hold circuit. The primary benefit of a bus-hold circuit
is that it prevents CMOS inputs from floating, a situation which should be avoided to prevent spurious switching of inputs and unnecessary power
dissipation. Bus-hold is a better solution than the traditional approach of using resistive termination to Vcc or GND to prevent bus floating, because
the bus-hold circuit does not consume any static power.
This figure shows the input V-I characteristics of a typical bus-hold implementation. The input characteristics resemble a resistor. As the input
voltage is increased from 0 volts, the input "sink" current increases linearly. When the TTL threshold of the circuit is reached (typically 1.5 volts), the
latch changes the logic state due to positive feedback and the direction of the current is reversed. As the input voltage is further increased towards
Vcc, the input "source" current begins to decrease, reaching the lowest level at V
IN
= Vcc.
10
INDUSTRIAL TEMPERATURE RANGE
IDTQS3ST253
HIGH-SPEED CMOS SYNCHROSWITCH DUAL 4:1 MUX
ORDERING INFORMATION
ID T Q S
X X X X X
X X
P ack ag e
D e vice Typ e
B la n k
Ind u stria l (-4 0 °C to + 85 °C )
Q ua rte r S ize S m a ll O u tlin e P a cka g e (S O 2 0-8 )
Q
3 S T 2 5 3
H ig h S p e e d C M O S S yn ch ro S w itch D u a l 4 :1
M u x/D e m u x w ith A ctive T e rm in a to rs
X
P ro cess
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